1 /*- 2 * Copyright (c) 2008, Pyun YongHyeon <yongari@FreeBSD.org> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice unmodified, this list of conditions, and the following 10 * disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 * 27 * $FreeBSD: src/sys/dev/jme/if_jmevar.h,v 1.1 2008/05/27 01:42:01 yongari Exp $ 28 * $DragonFly: src/sys/dev/netif/jme/if_jmevar.h,v 1.8 2008/11/26 11:55:18 sephe Exp $ 29 */ 30 31 #ifndef _IF_JMEVAR_H 32 #define _IF_JMEVAR_H 33 34 #include <sys/queue.h> 35 #include <sys/callout.h> 36 #include <sys/taskqueue.h> 37 38 /* 39 * JMC250 supports upto 1024 descriptors and the number of 40 * descriptors should be multiple of JME_NDESC_ALIGN. 41 */ 42 #define JME_TX_DESC_CNT_DEF 384 43 #define JME_RX_DESC_CNT_DEF 256 44 45 #define JME_NDESC_ALIGN 16 46 #define JME_NDESC_MAX 1024 47 48 /* 49 * Tx/Rx descriptor queue base should be 16bytes aligned and 50 * should not cross 4G bytes boundary on the 64bits address 51 * mode. 52 */ 53 #define JME_TX_RING_ALIGN 16 54 #define JME_RX_RING_ALIGN 16 55 #define JME_TSO_MAXSEGSIZE 4096 56 #define JME_TSO_MAXSIZE (65535 + sizeof(struct ether_vlan_header)) 57 #define JME_MAXTXSEGS 32 58 #define JME_RX_BUF_ALIGN sizeof(uint64_t) 59 #define JME_SSB_ALIGN 16 60 61 #define JME_ADDR_LO(x) ((uint64_t) (x) & 0xFFFFFFFF) 62 #define JME_ADDR_HI(x) ((uint64_t) (x) >> 32) 63 64 #define JME_MSI_MESSAGES 8 65 #define JME_MSIX_MESSAGES 8 66 67 /* Water mark to kick reclaiming Tx buffers. */ 68 #define JME_TX_DESC_HIWAT(sc) \ 69 ((sc)->jme_tx_desc_cnt - (((sc)->jme_tx_desc_cnt * 3) / 10)) 70 71 /* 72 * JMC250 can send 9K jumbo frame on Tx path and can receive 73 * 65535 bytes. 74 */ 75 #define JME_JUMBO_FRAMELEN 9216 76 #define JME_JUMBO_MTU \ 77 (JME_JUMBO_FRAMELEN - sizeof(struct ether_vlan_header) - \ 78 ETHER_HDR_LEN - ETHER_CRC_LEN) 79 #define JME_MAX_MTU \ 80 (ETHER_MAX_LEN + sizeof(struct ether_vlan_header) - \ 81 ETHER_HDR_LEN - ETHER_CRC_LEN) 82 /* 83 * JMC250 can't handle Tx checksum offload/TSO if frame length 84 * is larger than its FIFO size(2K). It's also good idea to not 85 * use jumbo frame if hardware is running at half-duplex media. 86 * Because the jumbo frame may not fit into the Tx FIFO, 87 * collisions make hardware fetch frame from host memory with 88 * DMA again which in turn slows down Tx performance 89 * significantly. 90 */ 91 #define JME_TX_FIFO_SIZE 2000 92 /* 93 * JMC250 has just 4K Rx FIFO. To support jumbo frame that is 94 * larger than 4K bytes in length, Rx FIFO threshold should be 95 * adjusted to minimize Rx FIFO overrun. 96 */ 97 #define JME_RX_FIFO_SIZE 4000 98 99 #define JME_DESC_INC(x, y) ((x) = ((x) + 1) % (y)) 100 101 struct jme_txdesc { 102 struct mbuf *tx_m; 103 bus_dmamap_t tx_dmamap; 104 int tx_ndesc; 105 struct jme_desc *tx_desc; 106 }; 107 108 struct jme_rxdesc { 109 struct mbuf *rx_m; 110 bus_dmamap_t rx_dmamap; 111 struct jme_desc *rx_desc; 112 }; 113 114 struct jme_chain_data{ 115 bus_dma_tag_t jme_ring_tag; 116 bus_dma_tag_t jme_buffer_tag; 117 bus_dma_tag_t jme_ssb_tag; 118 bus_dmamap_t jme_ssb_map; 119 bus_dma_tag_t jme_tx_tag; 120 struct jme_txdesc *jme_txdesc; 121 bus_dma_tag_t jme_rx_tag; 122 struct jme_rxdesc *jme_rxdesc; 123 bus_dma_tag_t jme_tx_ring_tag; 124 bus_dmamap_t jme_tx_ring_map; 125 bus_dma_tag_t jme_rx_ring_tag; 126 bus_dmamap_t jme_rx_ring_map; 127 bus_dmamap_t jme_rx_sparemap; 128 129 int jme_tx_prod; 130 int jme_tx_cons; 131 int jme_tx_cnt; 132 133 int jme_rx_cons; 134 int jme_rxlen; 135 struct mbuf *jme_rxhead; 136 struct mbuf *jme_rxtail; 137 }; 138 139 struct jme_ring_data { 140 struct jme_desc *jme_tx_ring; 141 bus_addr_t jme_tx_ring_paddr; 142 struct jme_desc *jme_rx_ring; 143 bus_addr_t jme_rx_ring_paddr; 144 struct jme_ssb *jme_ssb_block; 145 bus_addr_t jme_ssb_block_paddr; 146 }; 147 148 #define JME_TX_RING_ADDR(sc, i) \ 149 ((sc)->jme_rdata.jme_tx_ring_paddr + sizeof(struct jme_desc) * (i)) 150 #define JME_RX_RING_ADDR(sc, i) \ 151 ((sc)->jme_rdata.jme_rx_ring_paddr + sizeof(struct jme_desc) * (i)) 152 153 #define JME_TX_RING_SIZE(sc) \ 154 (sizeof(struct jme_desc) * (sc)->jme_tx_desc_cnt) 155 #define JME_RX_RING_SIZE(sc) \ 156 (sizeof(struct jme_desc) * (sc)->jme_rx_desc_cnt) 157 #define JME_SSB_SIZE sizeof(struct jme_ssb) 158 159 struct jme_dmamap_ctx { 160 int nsegs; 161 bus_dma_segment_t *segs; 162 }; 163 164 /* 165 * Software state per device. 166 */ 167 struct jme_softc { 168 struct arpcom arpcom; 169 device_t jme_dev; 170 171 int jme_mem_rid; 172 struct resource *jme_mem_res; 173 bus_space_tag_t jme_mem_bt; 174 bus_space_handle_t jme_mem_bh; 175 176 int jme_irq_rid; 177 struct resource *jme_irq_res; 178 void *jme_irq_handle; 179 180 device_t jme_miibus; 181 int jme_phyaddr; 182 bus_addr_t jme_lowaddr; 183 184 uint32_t jme_clksrc; 185 uint32_t jme_clksrc_1000; 186 uint32_t jme_tx_dma_size; 187 uint32_t jme_rx_dma_size; 188 189 uint32_t jme_caps; 190 #define JME_CAP_FPGA 0x0001 191 #define JME_CAP_PCIE 0x0002 192 #define JME_CAP_PMCAP 0x0004 193 #define JME_CAP_FASTETH 0x0008 194 #define JME_CAP_JUMBO 0x0010 195 196 uint32_t jme_workaround; 197 #define JME_WA_EXTFIFO 0x0001 198 #define JME_WA_HDX 0x0002 199 200 uint32_t jme_flags; 201 #define JME_FLAG_MSI 0x0001 202 #define JME_FLAG_MSIX 0x0002 203 #define JME_FLAG_DETACH 0x0004 204 #define JME_FLAG_LINK 0x0008 205 206 struct callout jme_tick_ch; 207 struct jme_chain_data jme_cdata; 208 struct jme_ring_data jme_rdata; 209 int jme_if_flags; 210 uint32_t jme_txcsr; 211 uint32_t jme_rxcsr; 212 213 int jme_txd_spare; 214 215 struct sysctl_ctx_list jme_sysctl_ctx; 216 struct sysctl_oid *jme_sysctl_tree; 217 218 /* 219 * Sysctl variables 220 */ 221 int jme_tx_coal_to; 222 int jme_tx_coal_pkt; 223 int jme_rx_coal_to; 224 int jme_rx_coal_pkt; 225 int jme_rx_desc_cnt; 226 int jme_tx_desc_cnt; 227 }; 228 229 /* Register access macros. */ 230 #define CSR_WRITE_4(_sc, reg, val) \ 231 bus_space_write_4((_sc)->jme_mem_bt, (_sc)->jme_mem_bh, (reg), (val)) 232 #define CSR_READ_4(_sc, reg) \ 233 bus_space_read_4((_sc)->jme_mem_bt, (_sc)->jme_mem_bh, (reg)) 234 235 #define JME_MAXERR 5 236 237 #define JME_RXCHAIN_RESET(_sc) \ 238 do { \ 239 (_sc)->jme_cdata.jme_rxhead = NULL; \ 240 (_sc)->jme_cdata.jme_rxtail = NULL; \ 241 (_sc)->jme_cdata.jme_rxlen = 0; \ 242 } while (0) 243 244 #define JME_TX_TIMEOUT 5 245 #define JME_TIMEOUT 1000 246 #define JME_PHY_TIMEOUT 1000 247 #define JME_EEPROM_TIMEOUT 1000 248 249 #define JME_TXD_RSVD 1 250 251 #endif 252