105538f72SMatthew Dillon /* $FreeBSD$ */ 2da10ea93SMatthew Dillon /* $OpenBSD: if_iwnvar.h,v 1.18 2010/04/30 16:06:46 damien Exp $ */ 3ffd7c74aSJoe Talbott 4ffd7c74aSJoe Talbott /*- 5da10ea93SMatthew Dillon * Copyright (c) 2013 Cedric GROSS <cg@cgross.info> 6da10ea93SMatthew Dillon * Copyright (c) 2011 Intel Corporation 7ffd7c74aSJoe Talbott * Copyright (c) 2007, 2008 8ffd7c74aSJoe Talbott * Damien Bergamini <damien.bergamini@free.fr> 9ffd7c74aSJoe Talbott * Copyright (c) 2008 Sam Leffler, Errno Consulting 10ffd7c74aSJoe Talbott * 11ffd7c74aSJoe Talbott * Permission to use, copy, modify, and distribute this software for any 12ffd7c74aSJoe Talbott * purpose with or without fee is hereby granted, provided that the above 13ffd7c74aSJoe Talbott * copyright notice and this permission notice appear in all copies. 14ffd7c74aSJoe Talbott * 15ffd7c74aSJoe Talbott * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 16ffd7c74aSJoe Talbott * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 17ffd7c74aSJoe Talbott * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 18ffd7c74aSJoe Talbott * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 19ffd7c74aSJoe Talbott * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 20ffd7c74aSJoe Talbott * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 21ffd7c74aSJoe Talbott * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 22ffd7c74aSJoe Talbott */ 23da10ea93SMatthew Dillon enum iwn_rxon_ctx_id { 24da10ea93SMatthew Dillon IWN_RXON_BSS_CTX, 25da10ea93SMatthew Dillon IWN_RXON_PAN_CTX, 26da10ea93SMatthew Dillon IWN_NUM_RXON_CTX 27da10ea93SMatthew Dillon }; 28ffd7c74aSJoe Talbott 29da10ea93SMatthew Dillon struct iwn_pan_slot { 30da10ea93SMatthew Dillon uint16_t time; 31da10ea93SMatthew Dillon uint8_t type; 32da10ea93SMatthew Dillon uint8_t reserved; 33da10ea93SMatthew Dillon } __packed; 34da10ea93SMatthew Dillon 35da10ea93SMatthew Dillon struct iwn_pan_params_cmd { 36da10ea93SMatthew Dillon uint16_t flags; 37da10ea93SMatthew Dillon #define IWN_PAN_PARAMS_FLG_SLOTTED_MODE (1 << 3) 38da10ea93SMatthew Dillon 39da10ea93SMatthew Dillon uint8_t reserved; 40da10ea93SMatthew Dillon uint8_t num_slots; 41da10ea93SMatthew Dillon struct iwn_pan_slot slots[10]; 42da10ea93SMatthew Dillon } __packed; 43da10ea93SMatthew Dillon 44da10ea93SMatthew Dillon struct iwn_led_mode 45da10ea93SMatthew Dillon { 46da10ea93SMatthew Dillon uint8_t led_cur_mode; 47da10ea93SMatthew Dillon uint64_t led_cur_bt; 48da10ea93SMatthew Dillon uint64_t led_last_bt; 49da10ea93SMatthew Dillon uint64_t led_cur_tpt; 50da10ea93SMatthew Dillon uint64_t led_last_tpt; 51da10ea93SMatthew Dillon uint64_t led_bt_diff; 52da10ea93SMatthew Dillon int led_cur_time; 53da10ea93SMatthew Dillon int led_last_time; 54da10ea93SMatthew Dillon }; 553db796acSJoe Talbott 56ffd7c74aSJoe Talbott struct iwn_rx_radiotap_header { 57ffd7c74aSJoe Talbott struct ieee80211_radiotap_header wr_ihdr; 58ffd7c74aSJoe Talbott uint64_t wr_tsft; 59ffd7c74aSJoe Talbott uint8_t wr_flags; 60ffd7c74aSJoe Talbott uint8_t wr_rate; 61ffd7c74aSJoe Talbott uint16_t wr_chan_freq; 62ffd7c74aSJoe Talbott uint16_t wr_chan_flags; 63ffd7c74aSJoe Talbott int8_t wr_dbm_antsignal; 64ffd7c74aSJoe Talbott int8_t wr_dbm_antnoise; 65ffd7c74aSJoe Talbott } __packed; 66ffd7c74aSJoe Talbott 67ffd7c74aSJoe Talbott #define IWN_RX_RADIOTAP_PRESENT \ 68ffd7c74aSJoe Talbott ((1 << IEEE80211_RADIOTAP_TSFT) | \ 69ffd7c74aSJoe Talbott (1 << IEEE80211_RADIOTAP_FLAGS) | \ 70ffd7c74aSJoe Talbott (1 << IEEE80211_RADIOTAP_RATE) | \ 71ffd7c74aSJoe Talbott (1 << IEEE80211_RADIOTAP_CHANNEL) | \ 72ffd7c74aSJoe Talbott (1 << IEEE80211_RADIOTAP_DBM_ANTSIGNAL) | \ 73ffd7c74aSJoe Talbott (1 << IEEE80211_RADIOTAP_DBM_ANTNOISE)) 74ffd7c74aSJoe Talbott 75ffd7c74aSJoe Talbott struct iwn_tx_radiotap_header { 76ffd7c74aSJoe Talbott struct ieee80211_radiotap_header wt_ihdr; 77ffd7c74aSJoe Talbott uint8_t wt_flags; 78ffd7c74aSJoe Talbott uint8_t wt_rate; 79ffd7c74aSJoe Talbott uint16_t wt_chan_freq; 80ffd7c74aSJoe Talbott uint16_t wt_chan_flags; 81ffd7c74aSJoe Talbott } __packed; 82ffd7c74aSJoe Talbott 83ffd7c74aSJoe Talbott #define IWN_TX_RADIOTAP_PRESENT \ 84ffd7c74aSJoe Talbott ((1 << IEEE80211_RADIOTAP_FLAGS) | \ 85ffd7c74aSJoe Talbott (1 << IEEE80211_RADIOTAP_RATE) | \ 86ffd7c74aSJoe Talbott (1 << IEEE80211_RADIOTAP_CHANNEL)) 87ffd7c74aSJoe Talbott 88ffd7c74aSJoe Talbott struct iwn_dma_info { 89ffd7c74aSJoe Talbott bus_dma_tag_t tag; 90ffd7c74aSJoe Talbott bus_dmamap_t map; 91ffd7c74aSJoe Talbott bus_dma_segment_t seg; 92ffd7c74aSJoe Talbott bus_addr_t paddr; 93ffd7c74aSJoe Talbott caddr_t vaddr; 94ffd7c74aSJoe Talbott bus_size_t size; 95ffd7c74aSJoe Talbott }; 96ffd7c74aSJoe Talbott 97ffd7c74aSJoe Talbott struct iwn_tx_data { 98ffd7c74aSJoe Talbott bus_dmamap_t map; 99ffd7c74aSJoe Talbott bus_addr_t cmd_paddr; 100ffd7c74aSJoe Talbott bus_addr_t scratch_paddr; 101ffd7c74aSJoe Talbott struct mbuf *m; 102ffd7c74aSJoe Talbott struct ieee80211_node *ni; 103ffd7c74aSJoe Talbott }; 104ffd7c74aSJoe Talbott 105ffd7c74aSJoe Talbott struct iwn_tx_ring { 106ffd7c74aSJoe Talbott struct iwn_dma_info desc_dma; 107ffd7c74aSJoe Talbott struct iwn_dma_info cmd_dma; 108ffd7c74aSJoe Talbott struct iwn_tx_desc *desc; 109ffd7c74aSJoe Talbott struct iwn_tx_cmd *cmd; 110ffd7c74aSJoe Talbott struct iwn_tx_data data[IWN_TX_RING_COUNT]; 111ffd7c74aSJoe Talbott bus_dma_tag_t data_dmat; 112ffd7c74aSJoe Talbott int qid; 113ffd7c74aSJoe Talbott int queued; 114ffd7c74aSJoe Talbott int cur; 115da10ea93SMatthew Dillon int read; 1163db796acSJoe Talbott }; 1173db796acSJoe Talbott 118ffd7c74aSJoe Talbott struct iwn_softc; 119ffd7c74aSJoe Talbott 120ffd7c74aSJoe Talbott struct iwn_rx_data { 121ffd7c74aSJoe Talbott struct mbuf *m; 122ffd7c74aSJoe Talbott bus_dmamap_t map; 123ffd7c74aSJoe Talbott }; 124ffd7c74aSJoe Talbott 125ffd7c74aSJoe Talbott struct iwn_rx_ring { 126ffd7c74aSJoe Talbott struct iwn_dma_info desc_dma; 127ffd7c74aSJoe Talbott struct iwn_dma_info stat_dma; 128ffd7c74aSJoe Talbott uint32_t *desc; 129ffd7c74aSJoe Talbott struct iwn_rx_status *stat; 130ffd7c74aSJoe Talbott struct iwn_rx_data data[IWN_RX_RING_COUNT]; 131ffd7c74aSJoe Talbott bus_dma_tag_t data_dmat; 132ffd7c74aSJoe Talbott int cur; 133ffd7c74aSJoe Talbott }; 134ffd7c74aSJoe Talbott 135ffd7c74aSJoe Talbott struct iwn_node { 136ffd7c74aSJoe Talbott struct ieee80211_node ni; /* must be the first */ 137ffd7c74aSJoe Talbott uint16_t disable_tid; 138ffd7c74aSJoe Talbott uint8_t id; 139da10ea93SMatthew Dillon struct { 140da10ea93SMatthew Dillon uint64_t bitmap; 141da10ea93SMatthew Dillon int startidx; 142da10ea93SMatthew Dillon int nframes; 143da10ea93SMatthew Dillon } agg[IEEE80211_TID_SIZE]; 144ffd7c74aSJoe Talbott }; 145ffd7c74aSJoe Talbott 146ffd7c74aSJoe Talbott struct iwn_calib_state { 147ffd7c74aSJoe Talbott uint8_t state; 148ffd7c74aSJoe Talbott #define IWN_CALIB_STATE_INIT 0 149ffd7c74aSJoe Talbott #define IWN_CALIB_STATE_ASSOC 1 150ffd7c74aSJoe Talbott #define IWN_CALIB_STATE_RUN 2 151ffd7c74aSJoe Talbott 152ffd7c74aSJoe Talbott u_int nbeacons; 153ffd7c74aSJoe Talbott uint32_t noise[3]; 154ffd7c74aSJoe Talbott uint32_t rssi[3]; 155ffd7c74aSJoe Talbott uint32_t ofdm_x1; 156ffd7c74aSJoe Talbott uint32_t ofdm_mrc_x1; 157ffd7c74aSJoe Talbott uint32_t ofdm_x4; 158ffd7c74aSJoe Talbott uint32_t ofdm_mrc_x4; 159ffd7c74aSJoe Talbott uint32_t cck_x4; 160ffd7c74aSJoe Talbott uint32_t cck_mrc_x4; 161ffd7c74aSJoe Talbott uint32_t bad_plcp_ofdm; 162ffd7c74aSJoe Talbott uint32_t fa_ofdm; 163ffd7c74aSJoe Talbott uint32_t bad_plcp_cck; 164ffd7c74aSJoe Talbott uint32_t fa_cck; 165ffd7c74aSJoe Talbott uint32_t low_fa; 166fd49669cSMichael Neumann uint32_t bad_plcp_ht; 167ffd7c74aSJoe Talbott uint8_t cck_state; 168ffd7c74aSJoe Talbott #define IWN_CCK_STATE_INIT 0 169ffd7c74aSJoe Talbott #define IWN_CCK_STATE_LOFA 1 170ffd7c74aSJoe Talbott #define IWN_CCK_STATE_HIFA 2 171ffd7c74aSJoe Talbott 172ffd7c74aSJoe Talbott uint8_t noise_samples[20]; 173ffd7c74aSJoe Talbott u_int cur_noise_sample; 174ffd7c74aSJoe Talbott uint8_t noise_ref; 175ffd7c74aSJoe Talbott uint32_t energy_samples[10]; 176ffd7c74aSJoe Talbott u_int cur_energy_sample; 177ffd7c74aSJoe Talbott uint32_t energy_cck; 178ffd7c74aSJoe Talbott }; 179ffd7c74aSJoe Talbott 180ffd7c74aSJoe Talbott struct iwn_calib_info { 181ffd7c74aSJoe Talbott uint8_t *buf; 182ffd7c74aSJoe Talbott u_int len; 183ffd7c74aSJoe Talbott }; 184ffd7c74aSJoe Talbott 185ffd7c74aSJoe Talbott struct iwn_fw_part { 186ffd7c74aSJoe Talbott const uint8_t *text; 187ffd7c74aSJoe Talbott uint32_t textsz; 188ffd7c74aSJoe Talbott const uint8_t *data; 189ffd7c74aSJoe Talbott uint32_t datasz; 190ffd7c74aSJoe Talbott }; 191ffd7c74aSJoe Talbott 192ffd7c74aSJoe Talbott struct iwn_fw_info { 193da10ea93SMatthew Dillon const uint8_t *data; 194da10ea93SMatthew Dillon size_t size; 195ffd7c74aSJoe Talbott struct iwn_fw_part init; 196ffd7c74aSJoe Talbott struct iwn_fw_part main; 197ffd7c74aSJoe Talbott struct iwn_fw_part boot; 198ffd7c74aSJoe Talbott }; 199ffd7c74aSJoe Talbott 200da10ea93SMatthew Dillon struct iwn_ops { 201ffd7c74aSJoe Talbott int (*load_firmware)(struct iwn_softc *); 202ffd7c74aSJoe Talbott void (*read_eeprom)(struct iwn_softc *); 203ffd7c74aSJoe Talbott int (*post_alive)(struct iwn_softc *); 204ffd7c74aSJoe Talbott int (*nic_config)(struct iwn_softc *); 205ffd7c74aSJoe Talbott void (*update_sched)(struct iwn_softc *, int, int, uint8_t, 206ffd7c74aSJoe Talbott uint16_t); 207ffd7c74aSJoe Talbott int (*get_temperature)(struct iwn_softc *); 208ffd7c74aSJoe Talbott int (*get_rssi)(struct iwn_softc *, struct iwn_rx_stat *); 209ffd7c74aSJoe Talbott int (*set_txpower)(struct iwn_softc *, 210ffd7c74aSJoe Talbott struct ieee80211_channel *, int); 211ffd7c74aSJoe Talbott int (*init_gains)(struct iwn_softc *); 212ffd7c74aSJoe Talbott int (*set_gains)(struct iwn_softc *); 213ffd7c74aSJoe Talbott int (*add_node)(struct iwn_softc *, struct iwn_node_info *, 214ffd7c74aSJoe Talbott int); 215ffd7c74aSJoe Talbott void (*tx_done)(struct iwn_softc *, struct iwn_rx_desc *, 216ffd7c74aSJoe Talbott struct iwn_rx_data *); 217ffd7c74aSJoe Talbott void (*ampdu_tx_start)(struct iwn_softc *, 218da10ea93SMatthew Dillon struct ieee80211_node *, int, uint8_t, uint16_t); 219da10ea93SMatthew Dillon void (*ampdu_tx_stop)(struct iwn_softc *, int, uint8_t, 220ffd7c74aSJoe Talbott uint16_t); 221ffd7c74aSJoe Talbott }; 222ffd7c74aSJoe Talbott 223ffd7c74aSJoe Talbott struct iwn_vap { 224ffd7c74aSJoe Talbott struct ieee80211vap iv_vap; 225ffd7c74aSJoe Talbott uint8_t iv_ridx; 226ffd7c74aSJoe Talbott 227ffd7c74aSJoe Talbott int (*iv_newstate)(struct ieee80211vap *, 228ffd7c74aSJoe Talbott enum ieee80211_state, int); 229da10ea93SMatthew Dillon int ctx; 230da10ea93SMatthew Dillon int beacon_int; 231da10ea93SMatthew Dillon 232ffd7c74aSJoe Talbott }; 233ffd7c74aSJoe Talbott #define IWN_VAP(_vap) ((struct iwn_vap *)(_vap)) 234ffd7c74aSJoe Talbott 235ffd7c74aSJoe Talbott struct iwn_softc { 236da10ea93SMatthew Dillon device_t sc_dev; 237ffd7c74aSJoe Talbott int sc_debug; 238*977fc0dbSMatthew Dillon struct cdev *sc_cdev; 239*977fc0dbSMatthew Dillon #if defined(__DragonFly__) 240*977fc0dbSMatthew Dillon struct lock sc_lk; 241*977fc0dbSMatthew Dillon #else 242*977fc0dbSMatthew Dillon struct mtx sc_mtx; 243*977fc0dbSMatthew Dillon #endif 244*977fc0dbSMatthew Dillon struct ieee80211com sc_ic; 245ffd7c74aSJoe Talbott 246ffd7c74aSJoe Talbott u_int sc_flags; 247ffd7c74aSJoe Talbott #define IWN_FLAG_HAS_OTPROM (1 << 1) 248ffd7c74aSJoe Talbott #define IWN_FLAG_CALIB_DONE (1 << 2) 249ffd7c74aSJoe Talbott #define IWN_FLAG_USE_ICT (1 << 3) 250ffd7c74aSJoe Talbott #define IWN_FLAG_INTERNAL_PA (1 << 4) 251da10ea93SMatthew Dillon #define IWN_FLAG_HAS_11N (1 << 6) 252da10ea93SMatthew Dillon #define IWN_FLAG_ENH_SENS (1 << 7) 253da10ea93SMatthew Dillon #define IWN_FLAG_ADV_BTCOEX (1 << 8) 254da10ea93SMatthew Dillon #define IWN_FLAG_PAN_SUPPORT (1 << 9) 255da10ea93SMatthew Dillon #define IWN_FLAG_BTCOEX (1 << 10) 256*977fc0dbSMatthew Dillon #define IWN_FLAG_RUNNING (1 << 11) 257ffd7c74aSJoe Talbott 258ffd7c74aSJoe Talbott uint8_t hw_type; 259da10ea93SMatthew Dillon /* subdevice_id used to adjust configuration */ 260da10ea93SMatthew Dillon uint16_t subdevice_id; 261da10ea93SMatthew Dillon 262da10ea93SMatthew Dillon struct iwn_ops ops; 263ffd7c74aSJoe Talbott const char *fwname; 264ffd7c74aSJoe Talbott const struct iwn_sensitivity_limits 265ffd7c74aSJoe Talbott *limits; 266da10ea93SMatthew Dillon int ntxqs; 267da10ea93SMatthew Dillon int firstaggqueue; 268da10ea93SMatthew Dillon int ndmachnls; 269da10ea93SMatthew Dillon uint8_t broadcast_id; 270da10ea93SMatthew Dillon int rxonsz; 271da10ea93SMatthew Dillon int schedsz; 272da10ea93SMatthew Dillon uint32_t fw_text_maxsz; 273da10ea93SMatthew Dillon uint32_t fw_data_maxsz; 274da10ea93SMatthew Dillon uint32_t fwsz; 275da10ea93SMatthew Dillon bus_size_t sched_txfact_addr; 276da10ea93SMatthew Dillon uint32_t reset_noise_gain; 277da10ea93SMatthew Dillon uint32_t noise_gain; 278ffd7c74aSJoe Talbott 279ffd7c74aSJoe Talbott /* TX scheduler rings. */ 280ffd7c74aSJoe Talbott struct iwn_dma_info sched_dma; 281ffd7c74aSJoe Talbott uint16_t *sched; 282ffd7c74aSJoe Talbott uint32_t sched_base; 283ffd7c74aSJoe Talbott 284ffd7c74aSJoe Talbott /* "Keep Warm" page. */ 285ffd7c74aSJoe Talbott struct iwn_dma_info kw_dma; 286ffd7c74aSJoe Talbott 287ffd7c74aSJoe Talbott /* Firmware image. */ 288ffd7c74aSJoe Talbott const struct firmware *fw_fp; 289ffd7c74aSJoe Talbott 290ffd7c74aSJoe Talbott /* Firmware DMA transfer. */ 291ffd7c74aSJoe Talbott struct iwn_dma_info fw_dma; 292ffd7c74aSJoe Talbott 293ffd7c74aSJoe Talbott /* ICT table. */ 294ffd7c74aSJoe Talbott struct iwn_dma_info ict_dma; 295ffd7c74aSJoe Talbott uint32_t *ict; 296ffd7c74aSJoe Talbott int ict_cur; 297ffd7c74aSJoe Talbott 298ffd7c74aSJoe Talbott /* TX/RX rings. */ 299ffd7c74aSJoe Talbott struct iwn_tx_ring txq[IWN5000_NTXQUEUES]; 300ffd7c74aSJoe Talbott struct iwn_rx_ring rxq; 301ffd7c74aSJoe Talbott 302da10ea93SMatthew Dillon struct resource *mem; 303ffd7c74aSJoe Talbott bus_space_tag_t sc_st; 304ffd7c74aSJoe Talbott bus_space_handle_t sc_sh; 305da10ea93SMatthew Dillon struct resource *irq; 306ffd7c74aSJoe Talbott void *sc_ih; 307ffd7c74aSJoe Talbott bus_size_t sc_sz; 308ffd7c74aSJoe Talbott int sc_cap_off; /* PCIe Capabilities. */ 309ffd7c74aSJoe Talbott 310ffd7c74aSJoe Talbott /* Tasks used by the driver */ 311ffd7c74aSJoe Talbott struct task sc_radioon_task; 312ffd7c74aSJoe Talbott struct task sc_radiooff_task; 313fd49669cSMichael Neumann struct task sc_panic_task; 314*977fc0dbSMatthew Dillon struct task sc_xmit_task; 315ffd7c74aSJoe Talbott 316fd49669cSMichael Neumann /* Taskqueue */ 317fd49669cSMichael Neumann struct taskqueue *sc_tq; 318fd49669cSMichael Neumann 319fd49669cSMichael Neumann /* Calibration information */ 320da10ea93SMatthew Dillon struct callout calib_to; 321ffd7c74aSJoe Talbott int calib_cnt; 322ffd7c74aSJoe Talbott struct iwn_calib_state calib; 323fd49669cSMichael Neumann int last_calib_ticks; 324da10ea93SMatthew Dillon struct callout watchdog_to; 325ffd7c74aSJoe Talbott struct iwn_fw_info fw; 326da10ea93SMatthew Dillon struct iwn_calib_info calibcmd[IWN5000_PHY_CALIB_MAX_RESULT]; 327ffd7c74aSJoe Talbott uint32_t errptr; 328ffd7c74aSJoe Talbott 329ffd7c74aSJoe Talbott struct iwn_rx_stat last_rx_stat; 330ffd7c74aSJoe Talbott int last_rx_valid; 331ffd7c74aSJoe Talbott struct iwn_ucode_info ucode_info; 332da10ea93SMatthew Dillon struct iwn_rxon rx_on[IWN_NUM_RXON_CTX]; 333da10ea93SMatthew Dillon struct iwn_rxon *rxon; 334da10ea93SMatthew Dillon int ctx; 335da10ea93SMatthew Dillon struct ieee80211vap *ivap[IWN_NUM_RXON_CTX]; 336da10ea93SMatthew Dillon 337fd49669cSMichael Neumann /* General statistics */ 338fd49669cSMichael Neumann /* 339fd49669cSMichael Neumann * The statistics are reset after each channel 340fd49669cSMichael Neumann * change. So it may be zeroed after things like 341fd49669cSMichael Neumann * a background scan. 342fd49669cSMichael Neumann * 343fd49669cSMichael Neumann * So for now, this is just a cheap hack to 344fd49669cSMichael Neumann * expose the last received statistics dump 345fd49669cSMichael Neumann * via an ioctl(). Later versions of this 346fd49669cSMichael Neumann * could expose the last 'n' messages, or just 347fd49669cSMichael Neumann * provide a pipeline for the firmware responses 348fd49669cSMichael Neumann * via something like BPF. 349fd49669cSMichael Neumann */ 350fd49669cSMichael Neumann struct iwn_stats last_stat; 351fd49669cSMichael Neumann int last_stat_valid; 352fd49669cSMichael Neumann 353da10ea93SMatthew Dillon uint8_t uc_scan_progress; 354ffd7c74aSJoe Talbott uint32_t rawtemp; 355ffd7c74aSJoe Talbott int temp; 356ffd7c74aSJoe Talbott int noise; 357ffd7c74aSJoe Talbott uint32_t qfullmsk; 358ffd7c74aSJoe Talbott 359ffd7c74aSJoe Talbott uint32_t prom_base; 360ffd7c74aSJoe Talbott struct iwn4965_eeprom_band 361ffd7c74aSJoe Talbott bands[IWN_NBANDS]; 362ffd7c74aSJoe Talbott struct iwn_eeprom_chan eeprom_channels[IWN_NBANDS][IWN_MAX_CHAN_PER_BAND]; 363ffd7c74aSJoe Talbott uint16_t rfcfg; 364ffd7c74aSJoe Talbott uint8_t calib_ver; 365ffd7c74aSJoe Talbott char eeprom_domain[4]; 366ffd7c74aSJoe Talbott uint32_t eeprom_crystal; 367da10ea93SMatthew Dillon int16_t eeprom_temp; 368da10ea93SMatthew Dillon int16_t eeprom_temp_high; 369ffd7c74aSJoe Talbott int16_t eeprom_voltage; 370ffd7c74aSJoe Talbott int8_t maxpwr2GHz; 371ffd7c74aSJoe Talbott int8_t maxpwr5GHz; 372ffd7c74aSJoe Talbott int8_t maxpwr[IEEE80211_CHAN_MAX]; 373da10ea93SMatthew Dillon 374da10ea93SMatthew Dillon uint32_t tlv_feature_flags; 375ffd7c74aSJoe Talbott 376ffd7c74aSJoe Talbott int32_t temp_off; 377ffd7c74aSJoe Talbott uint32_t int_mask; 378ffd7c74aSJoe Talbott uint8_t ntxchains; 379ffd7c74aSJoe Talbott uint8_t nrxchains; 380ffd7c74aSJoe Talbott uint8_t txchainmask; 381ffd7c74aSJoe Talbott uint8_t rxchainmask; 382ffd7c74aSJoe Talbott uint8_t chainmask; 383ffd7c74aSJoe Talbott 384ffd7c74aSJoe Talbott int sc_tx_timer; 385da10ea93SMatthew Dillon int sc_scan_timer; 386da10ea93SMatthew Dillon 3874b420e05SMatthew Dillon /* Are we doing a scan? */ 3884b420e05SMatthew Dillon int sc_is_scanning; 3894b420e05SMatthew Dillon 390*977fc0dbSMatthew Dillon /* Are we waiting for a beacon before xmit? */ 391*977fc0dbSMatthew Dillon int sc_beacon_wait; 392*977fc0dbSMatthew Dillon 393da10ea93SMatthew Dillon struct ieee80211_tx_ampdu *qid2tap[IWN5000_NTXQUEUES]; 394da10ea93SMatthew Dillon 395da10ea93SMatthew Dillon int (*sc_ampdu_rx_start)(struct ieee80211_node *, 396da10ea93SMatthew Dillon struct ieee80211_rx_ampdu *, int, int, int); 397da10ea93SMatthew Dillon void (*sc_ampdu_rx_stop)(struct ieee80211_node *, 398da10ea93SMatthew Dillon struct ieee80211_rx_ampdu *); 399da10ea93SMatthew Dillon int (*sc_addba_request)(struct ieee80211_node *, 400da10ea93SMatthew Dillon struct ieee80211_tx_ampdu *, int, int, int); 401da10ea93SMatthew Dillon int (*sc_addba_response)(struct ieee80211_node *, 402da10ea93SMatthew Dillon struct ieee80211_tx_ampdu *, int, int, int); 403da10ea93SMatthew Dillon void (*sc_addba_stop)(struct ieee80211_node *, 404da10ea93SMatthew Dillon struct ieee80211_tx_ampdu *); 405da10ea93SMatthew Dillon 406da10ea93SMatthew Dillon struct iwn_led_mode sc_led; 407ffd7c74aSJoe Talbott 408ffd7c74aSJoe Talbott struct iwn_rx_radiotap_header sc_rxtap; 409ffd7c74aSJoe Talbott struct iwn_tx_radiotap_header sc_txtap; 4103db796acSJoe Talbott 411da10ea93SMatthew Dillon /* The power save level originally configured by user */ 412da10ea93SMatthew Dillon int desired_pwrsave_level; 413da10ea93SMatthew Dillon 414da10ea93SMatthew Dillon /* 415da10ea93SMatthew Dillon * The current power save level, this may differ from the 416da10ea93SMatthew Dillon * configured value due to thermal throttling etc. 417da10ea93SMatthew Dillon */ 418da10ea93SMatthew Dillon int current_pwrsave_level; 419da10ea93SMatthew Dillon 420da10ea93SMatthew Dillon /* For specific params */ 421da10ea93SMatthew Dillon const struct iwn_base_params *base_params; 42205538f72SMatthew Dillon 42305538f72SMatthew Dillon #define IWN_UCODE_API(ver) (((ver) & 0x0000FF00) >> 8) 42405538f72SMatthew Dillon uint32_t ucode_rev; 425*977fc0dbSMatthew Dillon 426*977fc0dbSMatthew Dillon /* 427*977fc0dbSMatthew Dillon * Global queue for queuing xmit frames 428*977fc0dbSMatthew Dillon * when we can't yet transmit (eg raw 429*977fc0dbSMatthew Dillon * frames whilst waiting for beacons.) 430*977fc0dbSMatthew Dillon */ 431*977fc0dbSMatthew Dillon struct mbufq sc_xmit_queue; 432ffd7c74aSJoe Talbott }; 43305538f72SMatthew Dillon 434*977fc0dbSMatthew Dillon #if defined(__DragonFly__) 43505538f72SMatthew Dillon #define IWN_LOCK_INIT(_sc) \ 436*977fc0dbSMatthew Dillon lockinit(&(_sc)->sc_lk, device_get_nameunit((_sc)->sc_dev), 0, 0) 437*977fc0dbSMatthew Dillon #define IWN_LOCK(_sc) lockmgr(&(_sc)->sc_lk, LK_EXCLUSIVE) 438*977fc0dbSMatthew Dillon #define IWN_LOCK_ASSERT(_sc) KKASSERT(lockstatus(&(_sc)->sc_lk, curthread) == LK_EXCLUSIVE); 439*977fc0dbSMatthew Dillon #define IWN_UNLOCK(_sc) lockmgr(&(_sc)->sc_lk, LK_RELEASE) 440*977fc0dbSMatthew Dillon #define IWN_LOCK_DESTROY(_sc) lockuninit(&(_sc)->sc_lk) 441*977fc0dbSMatthew Dillon #else 442*977fc0dbSMatthew Dillon #define IWN_LOCK_INIT(_sc) \ 443*977fc0dbSMatthew Dillon mtx_init(&(_sc)->sc_mtx, device_get_nameunit((_sc)->sc_dev), \ 444*977fc0dbSMatthew Dillon MTX_NETWORK_LOCK, MTX_DEF) 445*977fc0dbSMatthew Dillon #define IWN_LOCK(_sc) mtx_lock(&(_sc)->sc_mtx) 446*977fc0dbSMatthew Dillon #define IWN_LOCK_ASSERT(_sc) mtx_assert(&(_sc)->sc_mtx, MA_OWNED) 447*977fc0dbSMatthew Dillon #define IWN_UNLOCK(_sc) mtx_unlock(&(_sc)->sc_mtx) 448*977fc0dbSMatthew Dillon #define IWN_LOCK_DESTROY(_sc) mtx_destroy(&(_sc)->sc_mtx) 449*977fc0dbSMatthew Dillon #endif 450