1 /************************************************************************** 2 3 Copyright (c) 2001-2003, Intel Corporation 4 All rights reserved. 5 6 Redistribution and use in source and binary forms, with or without 7 modification, are permitted provided that the following conditions are met: 8 9 1. Redistributions of source code must retain the above copyright notice, 10 this list of conditions and the following disclaimer. 11 12 2. Redistributions in binary form must reproduce the above copyright 13 notice, this list of conditions and the following disclaimer in the 14 documentation and/or other materials provided with the distribution. 15 16 3. Neither the name of the Intel Corporation nor the names of its 17 contributors may be used to endorse or promote products derived from 18 this software without specific prior written permission. 19 20 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 21 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 24 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 POSSIBILITY OF SUCH DAMAGE. 31 32 ***************************************************************************/ 33 34 /*$FreeBSD: src/sys/dev/em/if_em.h,v 1.1.2.13 2003/06/09 21:43:41 pdeuskar Exp $*/ 35 /*$DragonFly: src/sys/dev/netif/em/if_em.h,v 1.5 2004/04/16 23:18:14 dillon Exp $*/ 36 37 #ifndef _EM_H_DEFINED_ 38 #define _EM_H_DEFINED_ 39 40 41 #include <sys/param.h> 42 #include <sys/systm.h> 43 #include <sys/mbuf.h> 44 #include <sys/protosw.h> 45 #include <sys/socket.h> 46 #include <sys/malloc.h> 47 #include <sys/kernel.h> 48 #include <sys/sockio.h> 49 #include <sys/endian.h> 50 51 #include <net/if.h> 52 #include <net/if_arp.h> 53 #include <net/ethernet.h> 54 #include <net/if_dl.h> 55 #include <net/if_media.h> 56 57 #include <net/bpf.h> 58 #include <net/if_types.h> 59 #include <net/vlan/if_vlan_var.h> 60 61 #include <netinet/in_systm.h> 62 #include <netinet/in.h> 63 #include <netinet/ip.h> 64 #include <netinet/tcp.h> 65 #include <netinet/udp.h> 66 67 #include <sys/bus.h> 68 #include <machine/bus.h> 69 #include <sys/rman.h> 70 #include <machine/resource.h> 71 #include <vm/vm.h> 72 #include <vm/pmap.h> 73 #include <machine/clock.h> 74 #include <bus/pci/pcivar.h> 75 #include <bus/pci/pcireg.h> 76 #include <sys/proc.h> 77 #include <sys/sysctl.h> 78 #include "opt_bdg.h" 79 80 #include "if_em_hw.h" 81 82 /* Tunables */ 83 84 /* 85 * EM_MAX_TXD: Maximum number of Transmit Descriptors 86 * Valid Range: 80-256 for 82542 and 82543-based adapters 87 * 80-4096 for others 88 * Default Value: 256 89 * This value is the number of transmit descriptors allocated by the driver. 90 * Increasing this value allows the driver to queue more transmits. Each 91 * descriptor is 16 bytes. 92 */ 93 #define EM_MAX_TXD 256 94 95 /* 96 * EM_MAX_RXD - Maximum number of receive Descriptors 97 * Valid Range: 80-256 for 82542 and 82543-based adapters 98 * 80-4096 for others 99 * Default Value: 256 100 * This value is the number of receive descriptors allocated by the driver. 101 * Increasing this value allows the driver to buffer more incoming packets. 102 * Each descriptor is 16 bytes. A receive buffer is also allocated for each 103 * descriptor. The maximum MTU size is 16110. 104 * 105 */ 106 #define EM_MAX_RXD 256 107 108 /* 109 * EM_TIDV - Transmit Interrupt Delay Value 110 * Valid Range: 0-65535 (0=off) 111 * Default Value: 64 112 * This value delays the generation of transmit interrupts in units of 113 * 1.024 microseconds. Transmit interrupt reduction can improve CPU 114 * efficiency if properly tuned for specific network traffic. If the 115 * system is reporting dropped transmits, this value may be set too high 116 * causing the driver to run out of available transmit descriptors. 117 */ 118 #define EM_TIDV 64 119 120 /* 121 * EM_TADV - Transmit Absolute Interrupt Delay Value (Not valid for 82542/82543/82544) 122 * Valid Range: 0-65535 (0=off) 123 * Default Value: 64 124 * This value, in units of 1.024 microseconds, limits the delay in which a 125 * transmit interrupt is generated. Useful only if EM_TIDV is non-zero, 126 * this value ensures that an interrupt is generated after the initial 127 * packet is sent on the wire within the set amount of time. Proper tuning, 128 * along with EM_TIDV, may improve traffic throughput in specific 129 * network conditions. 130 */ 131 #define EM_TADV 64 132 133 /* 134 * EM_RDTR - Receive Interrupt Delay Timer (Packet Timer) 135 * Valid Range: 0-65535 (0=off) 136 * Default Value: 0 137 * This value delays the generation of receive interrupts in units of 1.024 138 * microseconds. Receive interrupt reduction can improve CPU efficiency if 139 * properly tuned for specific network traffic. Increasing this value adds 140 * extra latency to frame reception and can end up decreasing the throughput 141 * of TCP traffic. If the system is reporting dropped receives, this value 142 * may be set too high, causing the driver to run out of available receive 143 * descriptors. 144 * 145 * CAUTION: When setting EM_RDTR to a value other than 0, adapters 146 * may hang (stop transmitting) under certain network conditions. 147 * If this occurs a WATCHDOG message is logged in the system event log. 148 * In addition, the controller is automatically reset, restoring the 149 * network connection. To eliminate the potential for the hang 150 * ensure that EM_RDTR is set to 0. 151 */ 152 #define EM_RDTR 0 153 154 /* 155 * Receive Interrupt Absolute Delay Timer (Not valid for 82542/82543/82544) 156 * Valid Range: 0-65535 (0=off) 157 * Default Value: 64 158 * This value, in units of 1.024 microseconds, limits the delay in which a 159 * receive interrupt is generated. Useful only if EM_RDTR is non-zero, 160 * this value ensures that an interrupt is generated after the initial 161 * packet is received within the set amount of time. Proper tuning, 162 * along with EM_RDTR, may improve traffic throughput in specific network 163 * conditions. 164 */ 165 #define EM_RADV 64 166 167 168 /* 169 * This parameter controls the maximum no of times the driver will loop 170 * in the isr. 171 * Minimum Value = 1 172 */ 173 #define EM_MAX_INTR 3 174 175 /* 176 * Inform the stack about transmit checksum offload capabilities. 177 */ 178 #define EM_CHECKSUM_FEATURES (CSUM_TCP | CSUM_UDP) 179 180 /* 181 * This parameter controls the duration of transmit watchdog timer. 182 */ 183 #define EM_TX_TIMEOUT 5 /* set to 5 seconds */ 184 185 /* 186 * This parameter controls when the driver calls the routine to reclaim 187 * transmit descriptors. 188 */ 189 #define EM_TX_CLEANUP_THRESHOLD EM_MAX_TXD / 8 190 191 /* 192 * This parameter controls whether or not autonegotation is enabled. 193 * 0 - Disable autonegotiation 194 * 1 - Enable autonegotiation 195 */ 196 #define DO_AUTO_NEG 1 197 198 /* 199 * This parameter control whether or not the driver will wait for 200 * autonegotiation to complete. 201 * 1 - Wait for autonegotiation to complete 202 * 0 - Don't wait for autonegotiation to complete 203 */ 204 #define WAIT_FOR_AUTO_NEG_DEFAULT 0 205 206 /* 207 * EM_MASTER_SLAVE is only defined to enable a workaround for a known compatibility issue 208 * with 82541/82547 devices and some switches. See the "Known Limitations" section of 209 * the README file for a complete description and a list of affected switches. 210 * 211 * 0 = Hardware default 212 * 1 = Master mode 213 * 2 = Slave mode 214 * 3 = Auto master/slave 215 */ 216 /* #define EM_MASTER_SLAVE 2 */ 217 218 /* Tunables -- End */ 219 220 #define AUTONEG_ADV_DEFAULT (ADVERTISE_10_HALF | ADVERTISE_10_FULL | \ 221 ADVERTISE_100_HALF | ADVERTISE_100_FULL | \ 222 ADVERTISE_1000_FULL) 223 224 #define EM_VENDOR_ID 0x8086 225 #define EM_MMBA 0x0010 /* Mem base address */ 226 #define EM_ROUNDUP(size, unit) (((size) + (unit) - 1) & ~((unit) - 1)) 227 228 #define EM_JUMBO_PBA 0x00000028 229 #define EM_DEFAULT_PBA 0x00000030 230 #define EM_SMARTSPEED_DOWNSHIFT 3 231 #define EM_SMARTSPEED_MAX 15 232 233 234 #define MAX_NUM_MULTICAST_ADDRESSES 128 235 #define PCI_ANY_ID (~0U) 236 #define ETHER_ALIGN 2 237 238 /* Defines for printing debug information */ 239 #define DEBUG_INIT 0 240 #define DEBUG_IOCTL 0 241 #define DEBUG_HW 0 242 243 #define INIT_DEBUGOUT(S) if (DEBUG_INIT) printf(S "\n") 244 #define INIT_DEBUGOUT1(S, A) if (DEBUG_INIT) printf(S "\n", A) 245 #define INIT_DEBUGOUT2(S, A, B) if (DEBUG_INIT) printf(S "\n", A, B) 246 #define IOCTL_DEBUGOUT(S) if (DEBUG_IOCTL) printf(S "\n") 247 #define IOCTL_DEBUGOUT1(S, A) if (DEBUG_IOCTL) printf(S "\n", A) 248 #define IOCTL_DEBUGOUT2(S, A, B) if (DEBUG_IOCTL) printf(S "\n", A, B) 249 #define HW_DEBUGOUT(S) if (DEBUG_HW) printf(S "\n") 250 #define HW_DEBUGOUT1(S, A) if (DEBUG_HW) printf(S "\n", A) 251 #define HW_DEBUGOUT2(S, A, B) if (DEBUG_HW) printf(S "\n", A, B) 252 253 254 /* Supported RX Buffer Sizes */ 255 #define EM_RXBUFFER_2048 2048 256 #define EM_RXBUFFER_4096 4096 257 #define EM_RXBUFFER_8192 8192 258 #define EM_RXBUFFER_16384 16384 259 260 #ifdef __alpha__ 261 #undef vtophys 262 #define vtophys(va) alpha_XXX_dmamap((vm_offset_t)(va)) 263 #endif /* __alpha__ */ 264 265 /* ****************************************************************************** 266 * vendor_info_array 267 * 268 * This array contains the list of Subvendor/Subdevice IDs on which the driver 269 * should load. 270 * 271 * ******************************************************************************/ 272 typedef struct _em_vendor_info_t { 273 unsigned int vendor_id; 274 unsigned int device_id; 275 unsigned int subvendor_id; 276 unsigned int subdevice_id; 277 unsigned int index; 278 } em_vendor_info_t; 279 280 281 struct em_buffer { 282 struct mbuf *m_head; 283 }; 284 285 286 typedef enum _XSUM_CONTEXT_T { 287 OFFLOAD_NONE, 288 OFFLOAD_TCP_IP, 289 OFFLOAD_UDP_IP 290 } XSUM_CONTEXT_T; 291 292 struct adapter; 293 struct em_int_delay_info { 294 struct adapter *adapter; /* Back-pointer to the adapter struct */ 295 int offset; /* Register offset to read/write */ 296 int value; /* Current value in usecs */ 297 }; 298 299 /* For 82544 PCIX Workaround */ 300 typedef struct _ADDRESS_LENGTH_PAIR 301 { 302 u_int64_t address; 303 u_int32_t length; 304 } ADDRESS_LENGTH_PAIR, *PADDRESS_LENGTH_PAIR; 305 306 typedef struct _DESCRIPTOR_PAIR 307 { 308 ADDRESS_LENGTH_PAIR descriptor[4]; 309 u_int32_t elements; 310 } DESC_ARRAY, *PDESC_ARRAY; 311 312 /* Our adapter structure */ 313 struct adapter { 314 struct arpcom interface_data; 315 struct adapter *next; 316 struct adapter *prev; 317 struct em_hw hw; 318 319 /* FreeBSD operating-system-specific structures */ 320 struct em_osdep osdep; 321 struct device *dev; 322 struct resource *res_memory; 323 struct resource *res_ioport; 324 struct resource *res_interrupt; 325 void *int_handler_tag; 326 struct ifmedia media; 327 struct callout_handle timer_handle; 328 struct callout_handle tx_fifo_timer_handle; 329 int io_rid; 330 u_int8_t unit; 331 332 /* Info about the board itself */ 333 u_int32_t part_num; 334 u_int8_t link_active; 335 u_int16_t link_speed; 336 u_int16_t link_duplex; 337 u_int32_t smartspeed; 338 struct em_int_delay_info tx_int_delay; 339 struct em_int_delay_info tx_abs_int_delay; 340 struct em_int_delay_info rx_int_delay; 341 struct em_int_delay_info rx_abs_int_delay; 342 343 XSUM_CONTEXT_T active_checksum_context; 344 345 /* 346 * Transmit definitions 347 * 348 * We have an array of num_tx_desc descriptors (handled 349 * by the controller) paired with an array of tx_buffers 350 * (at tx_buffer_area). 351 * The index of the next available descriptor is next_avail_tx_desc. 352 * The number of remaining tx_desc is num_tx_desc_avail. 353 */ 354 struct em_tx_desc *tx_desc_base; 355 u_int32_t next_avail_tx_desc; 356 u_int32_t oldest_used_tx_desc; 357 volatile u_int16_t num_tx_desc_avail; 358 u_int16_t num_tx_desc; 359 u_int32_t txd_cmd; 360 struct em_buffer *tx_buffer_area; 361 362 /* 363 * Receive definitions 364 * 365 * we have an array of num_rx_desc rx_desc (handled by the 366 * controller), and paired with an array of rx_buffers 367 * (at rx_buffer_area). 368 * The next pair to check on receive is at offset next_rx_desc_to_check 369 */ 370 struct em_rx_desc *rx_desc_base; 371 u_int32_t next_rx_desc_to_check; 372 u_int16_t num_rx_desc; 373 u_int32_t rx_buffer_len; 374 struct em_buffer *rx_buffer_area; 375 376 /* Jumbo frame */ 377 struct mbuf *fmp; 378 struct mbuf *lmp; 379 380 u_int16_t tx_fifo_head; 381 382 struct sysctl_ctx_list sysctl_ctx; 383 struct sysctl_oid *sysctl_tree; 384 385 /* Misc stats maintained by the driver */ 386 unsigned long dropped_pkts; 387 unsigned long mbuf_alloc_failed; 388 unsigned long mbuf_cluster_failed; 389 unsigned long no_tx_desc_avail1; 390 unsigned long no_tx_desc_avail2; 391 u_int64_t tx_fifo_reset; 392 u_int64_t tx_fifo_wrk; 393 394 /* For 82544 PCIX Workaround */ 395 boolean_t pcix_82544; 396 boolean_t in_detach; 397 398 #ifdef DBG_STATS 399 unsigned long no_pkts_avail; 400 unsigned long clean_tx_interrupts; 401 402 #endif 403 struct em_hw_stats stats; 404 }; 405 406 #endif /* _EM_H_DEFINED_ */ 407