1 /************************************************************************** 2 3 Copyright (c) 2001-2003, Intel Corporation 4 All rights reserved. 5 6 Redistribution and use in source and binary forms, with or without 7 modification, are permitted provided that the following conditions are met: 8 9 1. Redistributions of source code must retain the above copyright notice, 10 this list of conditions and the following disclaimer. 11 12 2. Redistributions in binary form must reproduce the above copyright 13 notice, this list of conditions and the following disclaimer in the 14 documentation and/or other materials provided with the distribution. 15 16 3. Neither the name of the Intel Corporation nor the names of its 17 contributors may be used to endorse or promote products derived from 18 this software without specific prior written permission. 19 20 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 21 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 24 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 POSSIBILITY OF SUCH DAMAGE. 31 32 ***************************************************************************/ 33 34 /*$FreeBSD: src/sys/dev/em/if_em.c,v 1.2.2.15 2003/06/09 22:10:15 pdeuskar Exp $*/ 35 /*$DragonFly: src/sys/dev/netif/em/if_em.c,v 1.8 2004/03/17 04:59:41 dillon Exp $*/ 36 37 #include "if_em.h" 38 39 /********************************************************************* 40 * Set this to one to display debug statistics 41 *********************************************************************/ 42 int em_display_debug_stats = 0; 43 44 /********************************************************************* 45 * Linked list of board private structures for all NICs found 46 *********************************************************************/ 47 48 struct adapter *em_adapter_list = NULL; 49 50 51 /********************************************************************* 52 * Driver version 53 *********************************************************************/ 54 55 char em_driver_version[] = "1.7.25"; 56 57 58 /********************************************************************* 59 * PCI Device ID Table 60 * 61 * Used by probe to select devices to load on 62 * Last field stores an index into em_strings 63 * Last entry must be all 0s 64 * 65 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID, String Index } 66 *********************************************************************/ 67 68 static em_vendor_info_t em_vendor_info_array[] = 69 { 70 /* Intel(R) PRO/1000 Network Connection */ 71 { 0x8086, 0x1000, PCI_ANY_ID, PCI_ANY_ID, 0}, 72 { 0x8086, 0x1001, PCI_ANY_ID, PCI_ANY_ID, 0}, 73 { 0x8086, 0x1004, PCI_ANY_ID, PCI_ANY_ID, 0}, 74 { 0x8086, 0x1008, PCI_ANY_ID, PCI_ANY_ID, 0}, 75 { 0x8086, 0x1009, PCI_ANY_ID, PCI_ANY_ID, 0}, 76 { 0x8086, 0x100C, PCI_ANY_ID, PCI_ANY_ID, 0}, 77 { 0x8086, 0x100D, PCI_ANY_ID, PCI_ANY_ID, 0}, 78 { 0x8086, 0x100E, PCI_ANY_ID, PCI_ANY_ID, 0}, 79 { 0x8086, 0x100F, PCI_ANY_ID, PCI_ANY_ID, 0}, 80 { 0x8086, 0x1010, PCI_ANY_ID, PCI_ANY_ID, 0}, 81 { 0x8086, 0x1011, PCI_ANY_ID, PCI_ANY_ID, 0}, 82 { 0x8086, 0x1012, PCI_ANY_ID, PCI_ANY_ID, 0}, 83 { 0x8086, 0x1013, PCI_ANY_ID, PCI_ANY_ID, 0}, 84 { 0x8086, 0x1014, PCI_ANY_ID, PCI_ANY_ID, 0}, 85 { 0x8086, 0x1015, PCI_ANY_ID, PCI_ANY_ID, 0}, 86 { 0x8086, 0x1016, PCI_ANY_ID, PCI_ANY_ID, 0}, 87 { 0x8086, 0x1017, PCI_ANY_ID, PCI_ANY_ID, 0}, 88 { 0x8086, 0x1018, PCI_ANY_ID, PCI_ANY_ID, 0}, 89 { 0x8086, 0x1019, PCI_ANY_ID, PCI_ANY_ID, 0}, 90 { 0x8086, 0x101A, PCI_ANY_ID, PCI_ANY_ID, 0}, 91 { 0x8086, 0x101D, PCI_ANY_ID, PCI_ANY_ID, 0}, 92 { 0x8086, 0x101E, PCI_ANY_ID, PCI_ANY_ID, 0}, 93 { 0x8086, 0x1026, PCI_ANY_ID, PCI_ANY_ID, 0}, 94 { 0x8086, 0x1027, PCI_ANY_ID, PCI_ANY_ID, 0}, 95 { 0x8086, 0x1028, PCI_ANY_ID, PCI_ANY_ID, 0}, 96 { 0x8086, 0x1075, PCI_ANY_ID, PCI_ANY_ID, 0}, 97 { 0x8086, 0x1076, PCI_ANY_ID, PCI_ANY_ID, 0}, 98 { 0x8086, 0x1077, PCI_ANY_ID, PCI_ANY_ID, 0}, 99 { 0x8086, 0x1078, PCI_ANY_ID, PCI_ANY_ID, 0}, 100 { 0x8086, 0x1079, PCI_ANY_ID, PCI_ANY_ID, 0}, 101 { 0x8086, 0x107A, PCI_ANY_ID, PCI_ANY_ID, 0}, 102 { 0x8086, 0x107B, PCI_ANY_ID, PCI_ANY_ID, 0}, 103 /* required last entry */ 104 { 0, 0, 0, 0, 0} 105 }; 106 107 /********************************************************************* 108 * Table of branding strings for all supported NICs. 109 *********************************************************************/ 110 111 static char *em_strings[] = { 112 "Intel(R) PRO/1000 Network Connection" 113 }; 114 115 /********************************************************************* 116 * Function prototypes 117 *********************************************************************/ 118 static int em_probe(device_t); 119 static int em_attach(device_t); 120 static int em_detach(device_t); 121 static int em_shutdown(device_t); 122 static void em_intr(void *); 123 static void em_start(struct ifnet *); 124 static int em_ioctl(struct ifnet *, u_long, caddr_t); 125 static void em_watchdog(struct ifnet *); 126 static void em_init(void *); 127 static void em_stop(void *); 128 static void em_media_status(struct ifnet *, struct ifmediareq *); 129 static int em_media_change(struct ifnet *); 130 static void em_identify_hardware(struct adapter *); 131 static int em_allocate_pci_resources(struct adapter *); 132 static void em_free_pci_resources(struct adapter *); 133 static void em_local_timer(void *); 134 static int em_hardware_init(struct adapter *); 135 static void em_setup_interface(device_t, struct adapter *); 136 static int em_setup_transmit_structures(struct adapter *); 137 static void em_initialize_transmit_unit(struct adapter *); 138 static int em_setup_receive_structures(struct adapter *); 139 static void em_initialize_receive_unit(struct adapter *); 140 static void em_enable_intr(struct adapter *); 141 static void em_disable_intr(struct adapter *); 142 static void em_free_transmit_structures(struct adapter *); 143 static void em_free_receive_structures(struct adapter *); 144 static void em_update_stats_counters(struct adapter *); 145 static void em_clean_transmit_interrupts(struct adapter *); 146 static int em_allocate_receive_structures(struct adapter *); 147 static int em_allocate_transmit_structures(struct adapter *); 148 static void em_process_receive_interrupts(struct adapter *, int); 149 static void em_receive_checksum(struct adapter *, 150 struct em_rx_desc *, 151 struct mbuf *); 152 static void em_transmit_checksum_setup(struct adapter *, 153 struct mbuf *, 154 u_int32_t *, 155 u_int32_t *); 156 static void em_set_promisc(struct adapter *); 157 static void em_disable_promisc(struct adapter *); 158 static void em_set_multi(struct adapter *); 159 static void em_print_hw_stats(struct adapter *); 160 static void em_print_link_status(struct adapter *); 161 static int em_get_buf(int i, struct adapter *, 162 struct mbuf *); 163 static void em_enable_vlans(struct adapter *); 164 static int em_encap(struct adapter *, struct mbuf *); 165 static void em_smartspeed(struct adapter *); 166 static int em_82547_fifo_workaround(struct adapter *, int); 167 static void em_82547_update_fifo_head(struct adapter *, int); 168 static int em_82547_tx_fifo_reset(struct adapter *); 169 static void em_82547_move_tail(void *arg); 170 static void em_print_debug_info(struct adapter *); 171 static int em_is_valid_ether_addr(u_int8_t *); 172 static int em_sysctl_stats(SYSCTL_HANDLER_ARGS); 173 static int em_sysctl_debug_info(SYSCTL_HANDLER_ARGS); 174 static u_int32_t em_fill_descriptors (u_int64_t address, 175 u_int32_t length, 176 PDESC_ARRAY desc_array); 177 static int em_sysctl_int_delay(SYSCTL_HANDLER_ARGS); 178 static void em_add_int_delay_sysctl(struct adapter *, const char *, 179 const char *, struct em_int_delay_info *, 180 int, int); 181 182 /********************************************************************* 183 * FreeBSD Device Interface Entry Points 184 *********************************************************************/ 185 186 static device_method_t em_methods[] = { 187 /* Device interface */ 188 DEVMETHOD(device_probe, em_probe), 189 DEVMETHOD(device_attach, em_attach), 190 DEVMETHOD(device_detach, em_detach), 191 DEVMETHOD(device_shutdown, em_shutdown), 192 {0, 0} 193 }; 194 195 static driver_t em_driver = { 196 "em", em_methods, sizeof(struct adapter ), 197 }; 198 199 static devclass_t em_devclass; 200 201 DECLARE_DUMMY_MODULE(if_em); 202 DRIVER_MODULE(if_em, pci, em_driver, em_devclass, 0, 0); 203 204 /********************************************************************* 205 * Tunable default values. 206 *********************************************************************/ 207 208 #define E1000_TICKS_TO_USECS(ticks) ((1024 * (ticks) + 500) / 1000) 209 #define E1000_USECS_TO_TICKS(usecs) ((1000 * (usecs) + 512) / 1024) 210 211 static int em_tx_int_delay_dflt = E1000_TICKS_TO_USECS(EM_TIDV); 212 static int em_rx_int_delay_dflt = E1000_TICKS_TO_USECS(EM_RDTR); 213 static int em_tx_abs_int_delay_dflt = E1000_TICKS_TO_USECS(EM_TADV); 214 static int em_rx_abs_int_delay_dflt = E1000_TICKS_TO_USECS(EM_RADV); 215 216 TUNABLE_INT("hw.em.tx_int_delay", &em_tx_int_delay_dflt); 217 TUNABLE_INT("hw.em.rx_int_delay", &em_rx_int_delay_dflt); 218 TUNABLE_INT("hw.em.tx_abs_int_delay", &em_tx_abs_int_delay_dflt); 219 TUNABLE_INT("hw.em.rx_abs_int_delay", &em_rx_abs_int_delay_dflt); 220 221 /* sysctl vars */ 222 /* 223 SYSCTL_INT(_hw, OID_AUTO, em_tx_int_delay, CTLFLAG_RD, &em_tx_int_delay_dflt, 0, 224 "Transmit interrupt delay"); 225 SYSCTL_INT(_hw, OID_AUTO, em_rx_int_delay, CTLFLAG_RD, &em_rx_int_delay_dflt, 0, 226 "Receive interrupt delay"); 227 SYSCTL_INT(_hw, OID_AUTO, em_tx_abs_int_delay, CTLFLAG_RD, &em_tx_abs_int_delay_dflt, 228 0, "Transmit absolute interrupt delay"); 229 SYSCT_INT(_hw, OID_AUTO, em_rx_ans_int_delay, CTLFLAG_RD, &em_rx_abs_int_delay_dflt, 230 0, 231 "Receive absolute interrupt delay"); 232 */ 233 234 /********************************************************************* 235 * Device identification routine 236 * 237 * em_probe determines if the driver should be loaded on 238 * adapter based on PCI vendor/device id of the adapter. 239 * 240 * return 0 on success, positive on failure 241 *********************************************************************/ 242 243 static int 244 em_probe(device_t dev) 245 { 246 em_vendor_info_t *ent; 247 248 u_int16_t pci_vendor_id = 0; 249 u_int16_t pci_device_id = 0; 250 u_int16_t pci_subvendor_id = 0; 251 u_int16_t pci_subdevice_id = 0; 252 char adapter_name[60]; 253 254 INIT_DEBUGOUT("em_probe: begin"); 255 256 pci_vendor_id = pci_get_vendor(dev); 257 if (pci_vendor_id != EM_VENDOR_ID) 258 return(ENXIO); 259 260 pci_device_id = pci_get_device(dev); 261 pci_subvendor_id = pci_get_subvendor(dev); 262 pci_subdevice_id = pci_get_subdevice(dev); 263 264 ent = em_vendor_info_array; 265 while (ent->vendor_id != 0) { 266 if ((pci_vendor_id == ent->vendor_id) && 267 (pci_device_id == ent->device_id) && 268 269 ((pci_subvendor_id == ent->subvendor_id) || 270 (ent->subvendor_id == PCI_ANY_ID)) && 271 272 ((pci_subdevice_id == ent->subdevice_id) || 273 (ent->subdevice_id == PCI_ANY_ID))) { 274 sprintf(adapter_name, "%s, Version - %s", 275 em_strings[ent->index], 276 em_driver_version); 277 device_set_desc_copy(dev, adapter_name); 278 return(0); 279 } 280 ent++; 281 } 282 283 return(ENXIO); 284 } 285 286 /********************************************************************* 287 * Device initialization routine 288 * 289 * The attach entry point is called when the driver is being loaded. 290 * This routine identifies the type of hardware, allocates all resources 291 * and initializes the hardware. 292 * 293 * return 0 on success, positive on failure 294 *********************************************************************/ 295 296 static int 297 em_attach(device_t dev) 298 { 299 struct adapter * adapter; 300 int s; 301 int tsize, rsize; 302 int error = 0; 303 304 INIT_DEBUGOUT("em_attach: begin"); 305 s = splimp(); 306 307 /* Allocate, clear, and link in our adapter structure */ 308 if (!(adapter = device_get_softc(dev))) { 309 printf("em: adapter structure allocation failed\n"); 310 splx(s); 311 return(ENOMEM); 312 } 313 bzero(adapter, sizeof(struct adapter )); 314 adapter->dev = dev; 315 adapter->osdep.dev = dev; 316 adapter->unit = device_get_unit(dev); 317 318 if (em_adapter_list != NULL) 319 em_adapter_list->prev = adapter; 320 adapter->next = em_adapter_list; 321 em_adapter_list = adapter; 322 323 /* SYSCTL stuff */ 324 sysctl_ctx_init(&adapter->sysctl_ctx); 325 adapter->sysctl_tree = SYSCTL_ADD_NODE(&adapter->sysctl_ctx, 326 SYSCTL_STATIC_CHILDREN(_hw), 327 OID_AUTO, 328 device_get_nameunit(dev), 329 CTLFLAG_RD, 330 0, ""); 331 332 if (adapter->sysctl_tree == NULL) { 333 error = EIO; 334 goto err_sysctl; 335 } 336 337 SYSCTL_ADD_PROC(&adapter->sysctl_ctx, 338 SYSCTL_CHILDREN(adapter->sysctl_tree), 339 OID_AUTO, "debug_info", CTLTYPE_INT|CTLFLAG_RW, 340 (void *)adapter, 0, 341 em_sysctl_debug_info, "I", "Debug Information"); 342 343 SYSCTL_ADD_PROC(&adapter->sysctl_ctx, 344 SYSCTL_CHILDREN(adapter->sysctl_tree), 345 OID_AUTO, "stats", CTLTYPE_INT|CTLFLAG_RW, 346 (void *)adapter, 0, 347 em_sysctl_stats, "I", "Statistics"); 348 349 callout_handle_init(&adapter->timer_handle); 350 callout_handle_init(&adapter->tx_fifo_timer_handle); 351 352 /* Determine hardware revision */ 353 em_identify_hardware(adapter); 354 355 /* Set up some sysctls for the tunable interrupt delays */ 356 em_add_int_delay_sysctl(adapter, "rx_int_delay", 357 "receive interrupt delay in usecs", &adapter->rx_int_delay, 358 E1000_REG_OFFSET(&adapter->hw, RDTR), em_rx_int_delay_dflt); 359 em_add_int_delay_sysctl(adapter, "tx_int_delay", 360 "transmit interrupt delay in usecs", &adapter->tx_int_delay, 361 E1000_REG_OFFSET(&adapter->hw, TIDV), em_tx_int_delay_dflt); 362 if (adapter->hw.mac_type >= em_82540) { 363 em_add_int_delay_sysctl(adapter, "rx_abs_int_delay", 364 "receive interrupt delay limit in usecs", 365 &adapter->rx_abs_int_delay, 366 E1000_REG_OFFSET(&adapter->hw, RADV), 367 em_rx_abs_int_delay_dflt); 368 em_add_int_delay_sysctl(adapter, "tx_abs_int_delay", 369 "transmit interrupt delay limit in usecs", 370 &adapter->tx_abs_int_delay, 371 E1000_REG_OFFSET(&adapter->hw, TADV), 372 em_tx_abs_int_delay_dflt); 373 } 374 375 /* Parameters (to be read from user) */ 376 adapter->num_tx_desc = EM_MAX_TXD; 377 adapter->num_rx_desc = EM_MAX_RXD; 378 adapter->hw.autoneg = DO_AUTO_NEG; 379 adapter->hw.wait_autoneg_complete = WAIT_FOR_AUTO_NEG_DEFAULT; 380 adapter->hw.autoneg_advertised = AUTONEG_ADV_DEFAULT; 381 adapter->hw.tbi_compatibility_en = TRUE; 382 adapter->rx_buffer_len = EM_RXBUFFER_2048; 383 384 /* 385 * These parameters control the automatic generation(Tx) and 386 * response(Rx) to Ethernet PAUSE frames. 387 */ 388 adapter->hw.fc_high_water = FC_DEFAULT_HI_THRESH; 389 adapter->hw.fc_low_water = FC_DEFAULT_LO_THRESH; 390 adapter->hw.fc_pause_time = FC_DEFAULT_TX_TIMER; 391 adapter->hw.fc_send_xon = TRUE; 392 adapter->hw.fc = em_fc_full; 393 394 adapter->hw.phy_init_script = 1; 395 adapter->hw.phy_reset_disable = FALSE; 396 397 #ifndef EM_MASTER_SLAVE 398 adapter->hw.master_slave = em_ms_hw_default; 399 #else 400 adapter->hw.master_slave = EM_MASTER_SLAVE; 401 #endif 402 403 /* 404 * Set the max frame size assuming standard ethernet 405 * sized frames 406 */ 407 adapter->hw.max_frame_size = 408 ETHERMTU + ETHER_HDR_LEN + ETHER_CRC_LEN; 409 410 adapter->hw.min_frame_size = 411 MINIMUM_ETHERNET_PACKET_SIZE + ETHER_CRC_LEN; 412 413 /* 414 * This controls when hardware reports transmit completion 415 * status. 416 */ 417 adapter->hw.report_tx_early = 1; 418 419 420 if (em_allocate_pci_resources(adapter)) { 421 printf("em%d: Allocation of PCI resources failed\n", 422 adapter->unit); 423 error = ENXIO; 424 goto err_pci; 425 } 426 427 em_init_eeprom_params(&adapter->hw); 428 429 tsize = EM_ROUNDUP(adapter->num_tx_desc * 430 sizeof(struct em_tx_desc), 4096); 431 432 /* Allocate Transmit Descriptor ring */ 433 if (!(adapter->tx_desc_base = (struct em_tx_desc *) 434 contigmalloc(tsize, M_DEVBUF, M_NOWAIT, 0, ~0, 435 PAGE_SIZE, 0))) { 436 printf("em%d: Unable to allocate TxDescriptor memory\n", 437 adapter->unit); 438 error = ENOMEM; 439 goto err_tx_desc; 440 } 441 442 rsize = EM_ROUNDUP(adapter->num_rx_desc * 443 sizeof(struct em_rx_desc), 4096); 444 445 /* Allocate Receive Descriptor ring */ 446 if (!(adapter->rx_desc_base = (struct em_rx_desc *) 447 contigmalloc(rsize, M_DEVBUF, M_NOWAIT, 0, ~0, 448 PAGE_SIZE, 0))) { 449 printf("em%d: Unable to allocate rx_desc memory\n", 450 adapter->unit); 451 error = ENOMEM; 452 goto err_rx_desc; 453 } 454 455 /* Initialize the hardware */ 456 if (em_hardware_init(adapter)) { 457 printf("em%d: Unable to initialize the hardware\n", 458 adapter->unit); 459 error = EIO; 460 goto err_hw_init; 461 } 462 463 /* Copy the permanent MAC address out of the EEPROM */ 464 if (em_read_mac_addr(&adapter->hw) < 0) { 465 printf("em%d: EEPROM read error while reading mac address\n", 466 adapter->unit); 467 error = EIO; 468 goto err_mac_addr; 469 } 470 471 if (!em_is_valid_ether_addr(adapter->hw.mac_addr)) { 472 printf("em%d: Invalid mac address\n", adapter->unit); 473 error = EIO; 474 goto err_mac_addr; 475 } 476 477 478 bcopy(adapter->hw.mac_addr, adapter->interface_data.ac_enaddr, 479 ETHER_ADDR_LEN); 480 481 /* Setup OS specific network interface */ 482 em_setup_interface(dev, adapter); 483 484 /* Initialize statistics */ 485 em_clear_hw_cntrs(&adapter->hw); 486 em_update_stats_counters(adapter); 487 adapter->hw.get_link_status = 1; 488 em_check_for_link(&adapter->hw); 489 490 /* Print the link status */ 491 if (adapter->link_active == 1) { 492 em_get_speed_and_duplex(&adapter->hw, &adapter->link_speed, 493 &adapter->link_duplex); 494 printf("em%d: Speed:%d Mbps Duplex:%s\n", 495 adapter->unit, 496 adapter->link_speed, 497 adapter->link_duplex == FULL_DUPLEX ? "Full" : "Half"); 498 } else 499 printf("em%d: Speed:N/A Duplex:N/A\n", adapter->unit); 500 501 /* Identify 82544 on PCIX */ 502 em_get_bus_info(&adapter->hw); 503 if(adapter->hw.bus_type == em_bus_type_pcix && 504 adapter->hw.mac_type == em_82544) { 505 adapter->pcix_82544 = TRUE; 506 } 507 else { 508 adapter->pcix_82544 = FALSE; 509 } 510 INIT_DEBUGOUT("em_attach: end"); 511 splx(s); 512 return(error); 513 514 515 err_mac_addr: 516 err_hw_init: 517 contigfree(adapter->rx_desc_base, rsize, M_DEVBUF); 518 err_rx_desc: 519 contigfree(adapter->tx_desc_base, tsize, M_DEVBUF); 520 err_tx_desc: 521 err_pci: 522 em_free_pci_resources(adapter); 523 sysctl_ctx_free(&adapter->sysctl_ctx); 524 err_sysctl: 525 splx(s); 526 return(error); 527 } 528 529 /********************************************************************* 530 * Device removal routine 531 * 532 * The detach entry point is called when the driver is being removed. 533 * This routine stops the adapter and deallocates all the resources 534 * that were allocated for driver operation. 535 * 536 * return 0 on success, positive on failure 537 *********************************************************************/ 538 539 static int 540 em_detach(device_t dev) 541 { 542 struct adapter * adapter = device_get_softc(dev); 543 struct ifnet *ifp = &adapter->interface_data.ac_if; 544 int s; 545 int size; 546 547 INIT_DEBUGOUT("em_detach: begin"); 548 s = splimp(); 549 550 adapter->in_detach = 1; 551 552 em_stop(adapter); 553 em_phy_hw_reset(&adapter->hw); 554 ether_ifdetach(&adapter->interface_data.ac_if); 555 em_free_pci_resources(adapter); 556 bus_generic_detach(dev); 557 558 size = EM_ROUNDUP(adapter->num_tx_desc * 559 sizeof(struct em_tx_desc), 4096); 560 561 /* Free Transmit Descriptor ring */ 562 if (adapter->tx_desc_base) { 563 contigfree(adapter->tx_desc_base, size, M_DEVBUF); 564 adapter->tx_desc_base = NULL; 565 } 566 567 size = EM_ROUNDUP(adapter->num_rx_desc * 568 sizeof(struct em_rx_desc), 4096); 569 570 /* Free Receive Descriptor ring */ 571 if (adapter->rx_desc_base) { 572 contigfree(adapter->rx_desc_base, size, M_DEVBUF); 573 adapter->rx_desc_base = NULL; 574 } 575 576 /* Remove from the adapter list */ 577 if (em_adapter_list == adapter) 578 em_adapter_list = adapter->next; 579 if (adapter->next != NULL) 580 adapter->next->prev = adapter->prev; 581 if (adapter->prev != NULL) 582 adapter->prev->next = adapter->next; 583 584 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE); 585 ifp->if_timer = 0; 586 587 adapter->sysctl_tree = NULL; 588 sysctl_ctx_free(&adapter->sysctl_ctx); 589 590 adapter->sysctl_tree = NULL; 591 sysctl_ctx_free(&adapter->sysctl_ctx); 592 593 splx(s); 594 return(0); 595 } 596 597 /********************************************************************* 598 * 599 * Shutdown entry point 600 * 601 **********************************************************************/ 602 603 static int 604 em_shutdown(device_t dev) 605 { 606 struct adapter *adapter = device_get_softc(dev); 607 em_stop(adapter); 608 return(0); 609 } 610 611 612 /********************************************************************* 613 * Transmit entry point 614 * 615 * em_start is called by the stack to initiate a transmit. 616 * The driver will remain in this routine as long as there are 617 * packets to transmit and transmit resources are available. 618 * In case resources are not available stack is notified and 619 * the packet is requeued. 620 **********************************************************************/ 621 622 static void 623 em_start(struct ifnet *ifp) 624 { 625 int s; 626 struct mbuf *m_head; 627 struct adapter *adapter = ifp->if_softc; 628 629 if (!adapter->link_active) 630 return; 631 632 s = splimp(); 633 while (ifp->if_snd.ifq_head != NULL) { 634 635 IF_DEQUEUE(&ifp->if_snd, m_head); 636 637 if (m_head == NULL) break; 638 639 if (em_encap(adapter, m_head)) { 640 ifp->if_flags |= IFF_OACTIVE; 641 IF_PREPEND(&ifp->if_snd, m_head); 642 break; 643 } 644 645 /* Send a copy of the frame to the BPF listener */ 646 #if defined(__DragonFly__) || __FreeBSD_version < 500000 647 if (ifp->if_bpf) 648 bpf_mtap(ifp, m_head); 649 #else 650 BPF_MTAP(ifp, m_head); 651 #endif 652 653 /* Set timeout in case hardware has problems transmitting */ 654 ifp->if_timer = EM_TX_TIMEOUT; 655 656 } 657 splx(s); 658 return; 659 } 660 661 /********************************************************************* 662 * Ioctl entry point 663 * 664 * em_ioctl is called when the user wants to configure the 665 * interface. 666 * 667 * return 0 on success, positive on failure 668 **********************************************************************/ 669 670 static int 671 em_ioctl(struct ifnet *ifp, u_long command, caddr_t data) 672 { 673 int s, mask, error = 0; 674 struct ifreq *ifr = (struct ifreq *) data; 675 struct adapter * adapter = ifp->if_softc; 676 677 s = splimp(); 678 679 if (adapter->in_detach) goto out; 680 681 switch (command) { 682 case SIOCSIFADDR: 683 case SIOCGIFADDR: 684 IOCTL_DEBUGOUT("ioctl rcv'd: SIOCxIFADDR (Get/Set Interface Addr)"); 685 ether_ioctl(ifp, command, data); 686 break; 687 case SIOCSIFMTU: 688 IOCTL_DEBUGOUT("ioctl rcv'd: SIOCSIFMTU (Set Interface MTU)"); 689 if (ifr->ifr_mtu > MAX_JUMBO_FRAME_SIZE - ETHER_HDR_LEN) { 690 error = EINVAL; 691 } else { 692 ifp->if_mtu = ifr->ifr_mtu; 693 adapter->hw.max_frame_size = 694 ifp->if_mtu + ETHER_HDR_LEN + ETHER_CRC_LEN; 695 em_init(adapter); 696 } 697 break; 698 case SIOCSIFFLAGS: 699 IOCTL_DEBUGOUT("ioctl rcv'd: SIOCSIFFLAGS (Set Interface Flags)"); 700 if (ifp->if_flags & IFF_UP) { 701 if (!(ifp->if_flags & IFF_RUNNING)) { 702 em_init(adapter); 703 } 704 em_disable_promisc(adapter); 705 em_set_promisc(adapter); 706 } else { 707 if (ifp->if_flags & IFF_RUNNING) { 708 em_stop(adapter); 709 } 710 } 711 break; 712 case SIOCADDMULTI: 713 case SIOCDELMULTI: 714 IOCTL_DEBUGOUT("ioctl rcv'd: SIOC(ADD|DEL)MULTI"); 715 if (ifp->if_flags & IFF_RUNNING) { 716 em_disable_intr(adapter); 717 em_set_multi(adapter); 718 if (adapter->hw.mac_type == em_82542_rev2_0) { 719 em_initialize_receive_unit(adapter); 720 } 721 #ifdef DEVICE_POLLING 722 if (!(ifp->if_flags & IFF_POLLING)) 723 #endif 724 em_enable_intr(adapter); 725 } 726 break; 727 case SIOCSIFMEDIA: 728 case SIOCGIFMEDIA: 729 IOCTL_DEBUGOUT("ioctl rcv'd: SIOCxIFMEDIA (Get/Set Interface Media)"); 730 error = ifmedia_ioctl(ifp, ifr, &adapter->media, command); 731 break; 732 case SIOCSIFCAP: 733 IOCTL_DEBUGOUT("ioctl rcv'd: SIOCSIFCAP (Set Capabilities)"); 734 mask = ifr->ifr_reqcap ^ ifp->if_capenable; 735 if (mask & IFCAP_HWCSUM) { 736 if (IFCAP_HWCSUM & ifp->if_capenable) 737 ifp->if_capenable &= ~IFCAP_HWCSUM; 738 else 739 ifp->if_capenable |= IFCAP_HWCSUM; 740 if (ifp->if_flags & IFF_RUNNING) 741 em_init(adapter); 742 } 743 break; 744 default: 745 IOCTL_DEBUGOUT1("ioctl received: UNKNOWN (0x%x)\n", (int)command); 746 error = EINVAL; 747 } 748 749 out: 750 splx(s); 751 return(error); 752 } 753 754 /********************************************************************* 755 * Watchdog entry point 756 * 757 * This routine is called whenever hardware quits transmitting. 758 * 759 **********************************************************************/ 760 761 static void 762 em_watchdog(struct ifnet *ifp) 763 { 764 struct adapter * adapter; 765 adapter = ifp->if_softc; 766 767 /* If we are in this routine because of pause frames, then 768 * don't reset the hardware. 769 */ 770 if (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_TXOFF) { 771 ifp->if_timer = EM_TX_TIMEOUT; 772 return; 773 } 774 775 if (em_check_for_link(&adapter->hw)) 776 printf("em%d: watchdog timeout -- resetting\n", adapter->unit); 777 778 ifp->if_flags &= ~IFF_RUNNING; 779 780 em_stop(adapter); 781 em_init(adapter); 782 783 ifp->if_oerrors++; 784 return; 785 } 786 787 /********************************************************************* 788 * Init entry point 789 * 790 * This routine is used in two ways. It is used by the stack as 791 * init entry point in network interface structure. It is also used 792 * by the driver as a hw/sw initialization routine to get to a 793 * consistent state. 794 * 795 * return 0 on success, positive on failure 796 **********************************************************************/ 797 798 static void 799 em_init(void *arg) 800 { 801 int s; 802 struct ifnet *ifp; 803 struct adapter * adapter = arg; 804 805 INIT_DEBUGOUT("em_init: begin"); 806 807 s = splimp(); 808 809 em_stop(adapter); 810 811 /* Get the latest mac address, User can use a LAA */ 812 bcopy(adapter->interface_data.ac_enaddr, adapter->hw.mac_addr, 813 ETHER_ADDR_LEN); 814 815 /* Initialize the hardware */ 816 if (em_hardware_init(adapter)) { 817 printf("em%d: Unable to initialize the hardware\n", 818 adapter->unit); 819 splx(s); 820 return; 821 } 822 823 em_enable_vlans(adapter); 824 825 /* Prepare transmit descriptors and buffers */ 826 if (em_setup_transmit_structures(adapter)) { 827 printf("em%d: Could not setup transmit structures\n", 828 adapter->unit); 829 em_stop(adapter); 830 splx(s); 831 return; 832 } 833 em_initialize_transmit_unit(adapter); 834 835 /* Setup Multicast table */ 836 em_set_multi(adapter); 837 838 /* Prepare receive descriptors and buffers */ 839 if (em_setup_receive_structures(adapter)) { 840 printf("em%d: Could not setup receive structures\n", 841 adapter->unit); 842 em_stop(adapter); 843 splx(s); 844 return; 845 } 846 em_initialize_receive_unit(adapter); 847 848 /* Don't loose promiscuous settings */ 849 em_set_promisc(adapter); 850 851 ifp = &adapter->interface_data.ac_if; 852 ifp->if_flags |= IFF_RUNNING; 853 ifp->if_flags &= ~IFF_OACTIVE; 854 855 if (adapter->hw.mac_type >= em_82543) { 856 if (ifp->if_capenable & IFCAP_TXCSUM) 857 ifp->if_hwassist = EM_CHECKSUM_FEATURES; 858 else 859 ifp->if_hwassist = 0; 860 } 861 862 adapter->timer_handle = timeout(em_local_timer, adapter, 2*hz); 863 em_clear_hw_cntrs(&adapter->hw); 864 #ifdef DEVICE_POLLING 865 /* 866 * Only enable interrupts if we are not polling, make sure 867 * they are off otherwise. 868 */ 869 if (ifp->if_ipending & IFF_POLLING) 870 em_disable_intr(adapter); 871 else 872 #endif /* DEVICE_POLLING */ 873 em_enable_intr(adapter); 874 875 /* Don't reset the phy next time init gets called */ 876 adapter->hw.phy_reset_disable = TRUE; 877 878 splx(s); 879 return; 880 } 881 882 883 #ifdef DEVICE_POLLING 884 static poll_handler_t em_poll; 885 886 static void 887 em_poll(struct ifnet *ifp, enum poll_cmd cmd, int count) 888 { 889 struct adapter *adapter = ifp->if_softc; 890 u_int32_t reg_icr; 891 892 if (cmd == POLL_DEREGISTER) { /* final call, enable interrupts */ 893 em_enable_intr(adapter); 894 return; 895 } 896 if (cmd == POLL_AND_CHECK_STATUS) { 897 reg_icr = E1000_READ_REG(&adapter->hw, ICR); 898 if (reg_icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) { 899 untimeout(em_local_timer, adapter, adapter->timer_handle); 900 adapter->hw.get_link_status = 1; 901 em_check_for_link(&adapter->hw); 902 em_print_link_status(adapter); 903 adapter->timer_handle = timeout(em_local_timer, adapter, 2*hz); 904 } 905 } 906 if (ifp->if_flags & IFF_RUNNING) { 907 em_process_receive_interrupts(adapter, count); 908 em_clean_transmit_interrupts(adapter); 909 } 910 911 if (ifp->if_flags & IFF_RUNNING && ifp->if_snd.ifq_head != NULL) 912 em_start(ifp); 913 } 914 #endif /* DEVICE_POLLING */ 915 916 /********************************************************************* 917 * 918 * Interrupt Service routine 919 * 920 **********************************************************************/ 921 static void 922 em_intr(void *arg) 923 { 924 u_int32_t loop_cnt = EM_MAX_INTR; 925 u_int32_t reg_icr; 926 struct ifnet *ifp; 927 struct adapter *adapter = arg; 928 929 ifp = &adapter->interface_data.ac_if; 930 931 #ifdef DEVICE_POLLING 932 if (ifp->if_ipending & IFF_POLLING) 933 return; 934 935 if (ether_poll_register(em_poll, ifp)) { 936 em_disable_intr(adapter); 937 em_poll(ifp, 0, 1); 938 return; 939 } 940 #endif /* DEVICE_POLLING */ 941 942 reg_icr = E1000_READ_REG(&adapter->hw, ICR); 943 if (!reg_icr) { 944 return; 945 } 946 947 /* Link status change */ 948 if (reg_icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) { 949 untimeout(em_local_timer, adapter, 950 adapter->timer_handle); 951 adapter->hw.get_link_status = 1; 952 em_check_for_link(&adapter->hw); 953 em_print_link_status(adapter); 954 adapter->timer_handle = 955 timeout(em_local_timer, adapter, 2*hz); 956 } 957 958 while (loop_cnt > 0) { 959 if (ifp->if_flags & IFF_RUNNING) { 960 em_process_receive_interrupts(adapter, -1); 961 em_clean_transmit_interrupts(adapter); 962 } 963 loop_cnt--; 964 } 965 966 if (ifp->if_flags & IFF_RUNNING && ifp->if_snd.ifq_head != NULL) 967 em_start(ifp); 968 969 return; 970 } 971 972 973 974 /********************************************************************* 975 * 976 * Media Ioctl callback 977 * 978 * This routine is called whenever the user queries the status of 979 * the interface using ifconfig. 980 * 981 **********************************************************************/ 982 static void 983 em_media_status(struct ifnet *ifp, struct ifmediareq *ifmr) 984 { 985 struct adapter * adapter = ifp->if_softc; 986 987 INIT_DEBUGOUT("em_media_status: begin"); 988 989 em_check_for_link(&adapter->hw); 990 if (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU) { 991 if (adapter->link_active == 0) { 992 em_get_speed_and_duplex(&adapter->hw, 993 &adapter->link_speed, 994 &adapter->link_duplex); 995 adapter->link_active = 1; 996 } 997 } else { 998 if (adapter->link_active == 1) { 999 adapter->link_speed = 0; 1000 adapter->link_duplex = 0; 1001 adapter->link_active = 0; 1002 } 1003 } 1004 1005 ifmr->ifm_status = IFM_AVALID; 1006 ifmr->ifm_active = IFM_ETHER; 1007 1008 if (!adapter->link_active) 1009 return; 1010 1011 ifmr->ifm_status |= IFM_ACTIVE; 1012 1013 if (adapter->hw.media_type == em_media_type_fiber) { 1014 ifmr->ifm_active |= IFM_1000_SX | IFM_FDX; 1015 } else { 1016 switch (adapter->link_speed) { 1017 case 10: 1018 ifmr->ifm_active |= IFM_10_T; 1019 break; 1020 case 100: 1021 ifmr->ifm_active |= IFM_100_TX; 1022 break; 1023 case 1000: 1024 #if defined(__DragonFly__) || __FreeBSD_version < 500000 1025 ifmr->ifm_active |= IFM_1000_TX; 1026 #else 1027 ifmr->ifm_active |= IFM_1000_T; 1028 #endif 1029 break; 1030 } 1031 if (adapter->link_duplex == FULL_DUPLEX) 1032 ifmr->ifm_active |= IFM_FDX; 1033 else 1034 ifmr->ifm_active |= IFM_HDX; 1035 } 1036 return; 1037 } 1038 1039 /********************************************************************* 1040 * 1041 * Media Ioctl callback 1042 * 1043 * This routine is called when the user changes speed/duplex using 1044 * media/mediopt option with ifconfig. 1045 * 1046 **********************************************************************/ 1047 static int 1048 em_media_change(struct ifnet *ifp) 1049 { 1050 struct adapter * adapter = ifp->if_softc; 1051 struct ifmedia *ifm = &adapter->media; 1052 1053 INIT_DEBUGOUT("em_media_change: begin"); 1054 1055 if (IFM_TYPE(ifm->ifm_media) != IFM_ETHER) 1056 return(EINVAL); 1057 1058 switch (IFM_SUBTYPE(ifm->ifm_media)) { 1059 case IFM_AUTO: 1060 adapter->hw.autoneg = DO_AUTO_NEG; 1061 adapter->hw.autoneg_advertised = AUTONEG_ADV_DEFAULT; 1062 break; 1063 case IFM_1000_SX: 1064 #if defined(__DragonFly__) || __FreeBSD_version < 500000 1065 case IFM_1000_TX: 1066 #else 1067 case IFM_1000_T: 1068 #endif 1069 adapter->hw.autoneg = DO_AUTO_NEG; 1070 adapter->hw.autoneg_advertised = ADVERTISE_1000_FULL; 1071 break; 1072 case IFM_100_TX: 1073 adapter->hw.autoneg = FALSE; 1074 adapter->hw.autoneg_advertised = 0; 1075 if ((ifm->ifm_media & IFM_GMASK) == IFM_FDX) 1076 adapter->hw.forced_speed_duplex = em_100_full; 1077 else 1078 adapter->hw.forced_speed_duplex = em_100_half; 1079 break; 1080 case IFM_10_T: 1081 adapter->hw.autoneg = FALSE; 1082 adapter->hw.autoneg_advertised = 0; 1083 if ((ifm->ifm_media & IFM_GMASK) == IFM_FDX) 1084 adapter->hw.forced_speed_duplex = em_10_full; 1085 else 1086 adapter->hw.forced_speed_duplex = em_10_half; 1087 break; 1088 default: 1089 printf("em%d: Unsupported media type\n", adapter->unit); 1090 } 1091 /* As the speed/duplex settings my have changed we nee to 1092 * reset the PHY. 1093 */ 1094 adapter->hw.phy_reset_disable = FALSE; 1095 1096 em_init(adapter); 1097 1098 return(0); 1099 } 1100 1101 #define EM_FIFO_HDR 0x10 1102 #define EM_82547_PKT_THRESH 0x3e0 1103 #define EM_82547_TX_FIFO_SIZE 0x2800 1104 #define EM_82547_TX_FIFO_BEGIN 0xf00 1105 /********************************************************************* 1106 * 1107 * This routine maps the mbufs to tx descriptors. 1108 * 1109 * return 0 on success, positive on failure 1110 **********************************************************************/ 1111 1112 static int 1113 em_encap(struct adapter *adapter, struct mbuf *m_head) 1114 { 1115 vm_offset_t virtual_addr; 1116 u_int32_t txd_upper; 1117 u_int32_t txd_lower; 1118 int txd_used, i, txd_saved; 1119 struct mbuf *mp; 1120 u_int64_t address; 1121 1122 /* For 82544 Workaround */ 1123 DESC_ARRAY desc_array; 1124 u_int32_t array_elements; 1125 u_int32_t counter; 1126 1127 #if defined(__DragonFly__) || __FreeBSD_version < 500000 1128 struct ifvlan *ifv = NULL; 1129 #else 1130 struct m_tag *mtag; 1131 #endif 1132 struct em_buffer *tx_buffer = NULL; 1133 struct em_tx_desc *current_tx_desc = NULL; 1134 struct ifnet *ifp = &adapter->interface_data.ac_if; 1135 1136 /* 1137 * Force a cleanup if number of TX descriptors 1138 * available hits the threshold 1139 */ 1140 if (adapter->num_tx_desc_avail <= EM_TX_CLEANUP_THRESHOLD) 1141 em_clean_transmit_interrupts(adapter); 1142 1143 if (adapter->num_tx_desc_avail <= EM_TX_CLEANUP_THRESHOLD) { 1144 adapter->no_tx_desc_avail1++; 1145 return (ENOBUFS); 1146 } 1147 1148 if (ifp->if_hwassist > 0) { 1149 em_transmit_checksum_setup(adapter, m_head, 1150 &txd_upper, &txd_lower); 1151 } 1152 else 1153 txd_upper = txd_lower = 0; 1154 1155 1156 /* Find out if we are in vlan mode */ 1157 #if defined(__DragonFly__) || __FreeBSD_version < 500000 1158 if ((m_head->m_flags & (M_PROTO1|M_PKTHDR)) == (M_PROTO1|M_PKTHDR) && 1159 m_head->m_pkthdr.rcvif != NULL && 1160 m_head->m_pkthdr.rcvif->if_type == IFT_L2VLAN) 1161 ifv = m_head->m_pkthdr.rcvif->if_softc; 1162 #else 1163 mtag = VLAN_OUTPUT_TAG(ifp, m_head); 1164 #endif 1165 1166 i = adapter->next_avail_tx_desc; 1167 txd_saved = i; 1168 txd_used = 0; 1169 for (mp = m_head; mp != NULL; mp = mp->m_next) { 1170 if (mp->m_len == 0) 1171 continue; 1172 /* If adapter is 82544 and on PCIX bus */ 1173 if(adapter->pcix_82544) { 1174 array_elements = 0; 1175 virtual_addr= mtod(mp, vm_offset_t); 1176 address = vtophys(virtual_addr); 1177 /* Check the Address and Length combination and split the data accordingly */ 1178 array_elements = em_fill_descriptors( 1179 address, 1180 mp->m_len, 1181 &desc_array); 1182 1183 for (counter = 0; counter < array_elements; counter++) { 1184 if (txd_used == adapter->num_tx_desc_avail) { 1185 adapter->next_avail_tx_desc = txd_saved; 1186 adapter->no_tx_desc_avail2++; 1187 return (ENOBUFS); 1188 } 1189 1190 tx_buffer = &adapter->tx_buffer_area[i]; 1191 current_tx_desc = &adapter->tx_desc_base[i]; 1192 /* Put in the buffer address*/ 1193 current_tx_desc->buffer_addr = desc_array.descriptor[counter].address; 1194 /* Put in the length */ 1195 current_tx_desc->lower.data = (adapter->txd_cmd | txd_lower 1196 | (u_int16_t)desc_array.descriptor[counter].length); 1197 current_tx_desc->upper.data = (txd_upper); 1198 if (++i == adapter->num_tx_desc) 1199 i = 0; 1200 tx_buffer->m_head = NULL; 1201 txd_used++; 1202 } 1203 } 1204 else { 1205 if (txd_used == adapter->num_tx_desc_avail) { 1206 adapter->next_avail_tx_desc = txd_saved; 1207 adapter->no_tx_desc_avail2++; 1208 return (ENOBUFS); 1209 } 1210 1211 tx_buffer = &adapter->tx_buffer_area[i]; 1212 current_tx_desc = &adapter->tx_desc_base[i]; 1213 virtual_addr = mtod(mp, vm_offset_t); 1214 current_tx_desc->buffer_addr = vtophys(virtual_addr); 1215 1216 current_tx_desc->lower.data = (adapter->txd_cmd | txd_lower | mp->m_len); 1217 current_tx_desc->upper.data = (txd_upper); 1218 1219 if (++i == adapter->num_tx_desc) 1220 i = 0; 1221 1222 tx_buffer->m_head = NULL; 1223 1224 txd_used++; 1225 } 1226 } 1227 adapter->num_tx_desc_avail -= txd_used; 1228 adapter->next_avail_tx_desc = i; 1229 1230 #if defined(__DragonFly__) || __FreeBSD_version < 500000 1231 if (ifv != NULL) { 1232 /* Set the vlan id */ 1233 current_tx_desc->upper.fields.special = ifv->ifv_tag; 1234 #else 1235 if (mtag != NULL) { 1236 /* Set the vlan id */ 1237 current_tx_desc->upper.fields.special = VLAN_TAG_VALUE(mtag); 1238 #endif 1239 /* Tell hardware to add tag */ 1240 current_tx_desc->lower.data |= E1000_TXD_CMD_VLE; 1241 } 1242 1243 tx_buffer->m_head = m_head; 1244 1245 /* 1246 * Last Descriptor of Packet needs End Of Packet (EOP) 1247 */ 1248 current_tx_desc->lower.data |= (E1000_TXD_CMD_EOP); 1249 1250 /* 1251 * Advance the Transmit Descriptor Tail (Tdt), this tells the E1000 1252 * that this frame is available to transmit. 1253 */ 1254 if (adapter->hw.mac_type == em_82547 && 1255 adapter->link_duplex == HALF_DUPLEX) { 1256 em_82547_move_tail(adapter); 1257 } 1258 else { 1259 E1000_WRITE_REG(&adapter->hw, TDT, i); 1260 if (adapter->hw.mac_type == em_82547) { 1261 em_82547_update_fifo_head(adapter, m_head->m_pkthdr.len); 1262 } 1263 } 1264 1265 return (0); 1266 } 1267 1268 1269 /********************************************************************* 1270 * 1271 * 82547 workaround to avoid controller hang in half-duplex environment. 1272 * The workaround is to avoid queuing a large packet that would span 1273 * the internal Tx FIFO ring boundary. We need to reset the FIFO pointers 1274 * in this case. We do that only when FIFO is queiced. 1275 * 1276 **********************************************************************/ 1277 static void 1278 em_82547_move_tail(void *arg) 1279 { 1280 int s; 1281 struct adapter *adapter = arg; 1282 uint16_t hw_tdt; 1283 uint16_t sw_tdt; 1284 struct em_tx_desc *tx_desc; 1285 uint16_t length = 0; 1286 boolean_t eop = 0; 1287 1288 s = splimp(); 1289 hw_tdt = E1000_READ_REG(&adapter->hw, TDT); 1290 sw_tdt = adapter->next_avail_tx_desc; 1291 1292 while (hw_tdt != sw_tdt) { 1293 tx_desc = &adapter->tx_desc_base[hw_tdt]; 1294 length += tx_desc->lower.flags.length; 1295 eop = tx_desc->lower.data & E1000_TXD_CMD_EOP; 1296 if(++hw_tdt == adapter->num_tx_desc) 1297 hw_tdt = 0; 1298 1299 if(eop) { 1300 if (em_82547_fifo_workaround(adapter, length)) { 1301 adapter->tx_fifo_wrk++; 1302 adapter->tx_fifo_timer_handle = 1303 timeout(em_82547_move_tail, 1304 adapter, 1); 1305 splx(s); 1306 return; 1307 } 1308 else { 1309 E1000_WRITE_REG(&adapter->hw, TDT, hw_tdt); 1310 em_82547_update_fifo_head(adapter, length); 1311 length = 0; 1312 } 1313 } 1314 } 1315 splx(s); 1316 return; 1317 } 1318 1319 static int 1320 em_82547_fifo_workaround(struct adapter *adapter, int len) 1321 { 1322 int fifo_space, fifo_pkt_len; 1323 1324 fifo_pkt_len = EM_ROUNDUP(len + EM_FIFO_HDR, EM_FIFO_HDR); 1325 1326 if (adapter->link_duplex == HALF_DUPLEX) { 1327 fifo_space = EM_82547_TX_FIFO_SIZE - adapter->tx_fifo_head; 1328 1329 if (fifo_pkt_len >= (EM_82547_PKT_THRESH + fifo_space)) { 1330 if (em_82547_tx_fifo_reset(adapter)) { 1331 return(0); 1332 } 1333 else { 1334 return(1); 1335 } 1336 } 1337 } 1338 1339 return(0); 1340 } 1341 1342 static void 1343 em_82547_update_fifo_head(struct adapter *adapter, int len) 1344 { 1345 int fifo_pkt_len = EM_ROUNDUP(len + EM_FIFO_HDR, EM_FIFO_HDR); 1346 1347 /* tx_fifo_head is always 16 byte aligned */ 1348 adapter->tx_fifo_head += fifo_pkt_len; 1349 if (adapter->tx_fifo_head >= EM_82547_TX_FIFO_SIZE) { 1350 adapter->tx_fifo_head -= EM_82547_TX_FIFO_SIZE; 1351 } 1352 1353 return; 1354 } 1355 1356 1357 static int 1358 em_82547_tx_fifo_reset(struct adapter *adapter) 1359 { 1360 uint32_t tctl; 1361 1362 if ( (E1000_READ_REG(&adapter->hw, TDT) == 1363 E1000_READ_REG(&adapter->hw, TDH)) && 1364 (E1000_READ_REG(&adapter->hw, TDFT) == 1365 E1000_READ_REG(&adapter->hw, TDFH)) && 1366 (E1000_READ_REG(&adapter->hw, TDFTS) == 1367 E1000_READ_REG(&adapter->hw, TDFHS)) && 1368 (E1000_READ_REG(&adapter->hw, TDFPC) == 0)) { 1369 1370 /* Disable TX unit */ 1371 tctl = E1000_READ_REG(&adapter->hw, TCTL); 1372 E1000_WRITE_REG(&adapter->hw, TCTL, tctl & ~E1000_TCTL_EN); 1373 1374 /* Reset FIFO pointers */ 1375 E1000_WRITE_REG(&adapter->hw, TDFT, EM_82547_TX_FIFO_BEGIN); 1376 E1000_WRITE_REG(&adapter->hw, TDFH, EM_82547_TX_FIFO_BEGIN); 1377 E1000_WRITE_REG(&adapter->hw, TDFTS, EM_82547_TX_FIFO_BEGIN); 1378 E1000_WRITE_REG(&adapter->hw, TDFHS, EM_82547_TX_FIFO_BEGIN); 1379 1380 /* Re-enable TX unit */ 1381 E1000_WRITE_REG(&adapter->hw, TCTL, tctl); 1382 E1000_WRITE_FLUSH(&adapter->hw); 1383 1384 adapter->tx_fifo_head = 0; 1385 adapter->tx_fifo_reset++; 1386 1387 return(TRUE); 1388 } 1389 else { 1390 return(FALSE); 1391 } 1392 } 1393 1394 static void 1395 em_set_promisc(struct adapter * adapter) 1396 { 1397 1398 u_int32_t reg_rctl; 1399 struct ifnet *ifp = &adapter->interface_data.ac_if; 1400 1401 reg_rctl = E1000_READ_REG(&adapter->hw, RCTL); 1402 1403 if (ifp->if_flags & IFF_PROMISC) { 1404 reg_rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE); 1405 E1000_WRITE_REG(&adapter->hw, RCTL, reg_rctl); 1406 } else if (ifp->if_flags & IFF_ALLMULTI) { 1407 reg_rctl |= E1000_RCTL_MPE; 1408 reg_rctl &= ~E1000_RCTL_UPE; 1409 E1000_WRITE_REG(&adapter->hw, RCTL, reg_rctl); 1410 } 1411 1412 return; 1413 } 1414 1415 static void 1416 em_disable_promisc(struct adapter * adapter) 1417 { 1418 u_int32_t reg_rctl; 1419 1420 reg_rctl = E1000_READ_REG(&adapter->hw, RCTL); 1421 1422 reg_rctl &= (~E1000_RCTL_UPE); 1423 reg_rctl &= (~E1000_RCTL_MPE); 1424 E1000_WRITE_REG(&adapter->hw, RCTL, reg_rctl); 1425 1426 return; 1427 } 1428 1429 1430 /********************************************************************* 1431 * Multicast Update 1432 * 1433 * This routine is called whenever multicast address list is updated. 1434 * 1435 **********************************************************************/ 1436 1437 static void 1438 em_set_multi(struct adapter * adapter) 1439 { 1440 u_int32_t reg_rctl = 0; 1441 u_int8_t mta[MAX_NUM_MULTICAST_ADDRESSES * ETH_LENGTH_OF_ADDRESS]; 1442 struct ifmultiaddr *ifma; 1443 int mcnt = 0; 1444 struct ifnet *ifp = &adapter->interface_data.ac_if; 1445 1446 IOCTL_DEBUGOUT("em_set_multi: begin"); 1447 1448 if (adapter->hw.mac_type == em_82542_rev2_0) { 1449 reg_rctl = E1000_READ_REG(&adapter->hw, RCTL); 1450 if (adapter->hw.pci_cmd_word & CMD_MEM_WRT_INVALIDATE) { 1451 em_pci_clear_mwi(&adapter->hw); 1452 } 1453 reg_rctl |= E1000_RCTL_RST; 1454 E1000_WRITE_REG(&adapter->hw, RCTL, reg_rctl); 1455 msec_delay(5); 1456 } 1457 1458 #if defined(__DragonFly__) || __FreeBSD_version < 500000 1459 LIST_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) { 1460 #else 1461 TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) { 1462 #endif 1463 if (ifma->ifma_addr->sa_family != AF_LINK) 1464 continue; 1465 1466 if (mcnt == MAX_NUM_MULTICAST_ADDRESSES) break; 1467 1468 bcopy(LLADDR((struct sockaddr_dl *)ifma->ifma_addr), 1469 &mta[mcnt*ETH_LENGTH_OF_ADDRESS], ETH_LENGTH_OF_ADDRESS); 1470 mcnt++; 1471 } 1472 1473 if (mcnt >= MAX_NUM_MULTICAST_ADDRESSES) { 1474 reg_rctl = E1000_READ_REG(&adapter->hw, RCTL); 1475 reg_rctl |= E1000_RCTL_MPE; 1476 E1000_WRITE_REG(&adapter->hw, RCTL, reg_rctl); 1477 } else 1478 em_mc_addr_list_update(&adapter->hw, mta, mcnt, 0, 1); 1479 1480 if (adapter->hw.mac_type == em_82542_rev2_0) { 1481 reg_rctl = E1000_READ_REG(&adapter->hw, RCTL); 1482 reg_rctl &= ~E1000_RCTL_RST; 1483 E1000_WRITE_REG(&adapter->hw, RCTL, reg_rctl); 1484 msec_delay(5); 1485 if (adapter->hw.pci_cmd_word & CMD_MEM_WRT_INVALIDATE) { 1486 em_pci_set_mwi(&adapter->hw); 1487 } 1488 } 1489 1490 return; 1491 } 1492 1493 1494 /********************************************************************* 1495 * Timer routine 1496 * 1497 * This routine checks for link status and updates statistics. 1498 * 1499 **********************************************************************/ 1500 1501 static void 1502 em_local_timer(void *arg) 1503 { 1504 int s; 1505 struct ifnet *ifp; 1506 struct adapter * adapter = arg; 1507 ifp = &adapter->interface_data.ac_if; 1508 1509 s = splimp(); 1510 1511 em_check_for_link(&adapter->hw); 1512 em_print_link_status(adapter); 1513 em_update_stats_counters(adapter); 1514 if (em_display_debug_stats && ifp->if_flags & IFF_RUNNING) { 1515 em_print_hw_stats(adapter); 1516 } 1517 em_smartspeed(adapter); 1518 1519 adapter->timer_handle = timeout(em_local_timer, adapter, 2*hz); 1520 1521 splx(s); 1522 return; 1523 } 1524 1525 static void 1526 em_print_link_status(struct adapter * adapter) 1527 { 1528 if (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU) { 1529 if (adapter->link_active == 0) { 1530 em_get_speed_and_duplex(&adapter->hw, 1531 &adapter->link_speed, 1532 &adapter->link_duplex); 1533 printf("em%d: Link is up %d Mbps %s\n", 1534 adapter->unit, 1535 adapter->link_speed, 1536 ((adapter->link_duplex == FULL_DUPLEX) ? 1537 "Full Duplex" : "Half Duplex")); 1538 adapter->link_active = 1; 1539 adapter->smartspeed = 0; 1540 } 1541 } else { 1542 if (adapter->link_active == 1) { 1543 adapter->link_speed = 0; 1544 adapter->link_duplex = 0; 1545 printf("em%d: Link is Down\n", adapter->unit); 1546 adapter->link_active = 0; 1547 } 1548 } 1549 1550 return; 1551 } 1552 1553 /********************************************************************* 1554 * 1555 * This routine disables all traffic on the adapter by issuing a 1556 * global reset on the MAC and deallocates TX/RX buffers. 1557 * 1558 **********************************************************************/ 1559 1560 static void 1561 em_stop(void *arg) 1562 { 1563 struct ifnet *ifp; 1564 struct adapter * adapter = arg; 1565 ifp = &adapter->interface_data.ac_if; 1566 1567 INIT_DEBUGOUT("em_stop: begin"); 1568 em_disable_intr(adapter); 1569 em_reset_hw(&adapter->hw); 1570 untimeout(em_local_timer, adapter, adapter->timer_handle); 1571 untimeout(em_82547_move_tail, adapter, 1572 adapter->tx_fifo_timer_handle); 1573 em_free_transmit_structures(adapter); 1574 em_free_receive_structures(adapter); 1575 1576 1577 /* Tell the stack that the interface is no longer active */ 1578 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE); 1579 1580 return; 1581 } 1582 1583 1584 /********************************************************************* 1585 * 1586 * Determine hardware revision. 1587 * 1588 **********************************************************************/ 1589 static void 1590 em_identify_hardware(struct adapter * adapter) 1591 { 1592 device_t dev = adapter->dev; 1593 1594 /* Make sure our PCI config space has the necessary stuff set */ 1595 adapter->hw.pci_cmd_word = pci_read_config(dev, PCIR_COMMAND, 2); 1596 if (!((adapter->hw.pci_cmd_word & PCIM_CMD_BUSMASTEREN) && 1597 (adapter->hw.pci_cmd_word & PCIM_CMD_MEMEN))) { 1598 printf("em%d: Memory Access and/or Bus Master bits were not set!\n", 1599 adapter->unit); 1600 adapter->hw.pci_cmd_word |= 1601 (PCIM_CMD_BUSMASTEREN | PCIM_CMD_MEMEN); 1602 pci_write_config(dev, PCIR_COMMAND, adapter->hw.pci_cmd_word, 2); 1603 } 1604 1605 /* Save off the information about this board */ 1606 adapter->hw.vendor_id = pci_get_vendor(dev); 1607 adapter->hw.device_id = pci_get_device(dev); 1608 adapter->hw.revision_id = pci_read_config(dev, PCIR_REVID, 1); 1609 adapter->hw.subsystem_vendor_id = pci_read_config(dev, PCIR_SUBVEND_0, 2); 1610 adapter->hw.subsystem_id = pci_read_config(dev, PCIR_SUBDEV_0, 2); 1611 1612 /* Identify the MAC */ 1613 if (em_set_mac_type(&adapter->hw)) 1614 printf("em%d: Unknown MAC Type\n", adapter->unit); 1615 1616 if(adapter->hw.mac_type == em_82541 || adapter->hw.mac_type == em_82541_rev_2 || 1617 adapter->hw.mac_type == em_82547 || adapter->hw.mac_type == em_82547_rev_2) 1618 adapter->hw.phy_init_script = TRUE; 1619 1620 1621 return; 1622 } 1623 1624 static int 1625 em_allocate_pci_resources(struct adapter * adapter) 1626 { 1627 int i, val, rid; 1628 device_t dev = adapter->dev; 1629 1630 rid = EM_MMBA; 1631 adapter->res_memory = bus_alloc_resource(dev, SYS_RES_MEMORY, 1632 &rid, 0, ~0, 1, 1633 RF_ACTIVE); 1634 if (!(adapter->res_memory)) { 1635 printf("em%d: Unable to allocate bus resource: memory\n", 1636 adapter->unit); 1637 return(ENXIO); 1638 } 1639 adapter->osdep.mem_bus_space_tag = 1640 rman_get_bustag(adapter->res_memory); 1641 adapter->osdep.mem_bus_space_handle = 1642 rman_get_bushandle(adapter->res_memory); 1643 adapter->hw.hw_addr = (uint8_t *)&adapter->osdep.mem_bus_space_handle; 1644 1645 if (adapter->hw.mac_type > em_82543) { 1646 /* Figure our where our IO BAR is ? */ 1647 rid = EM_MMBA; 1648 for (i = 0; i < 5; i++) { 1649 val = pci_read_config(dev, rid, 4); 1650 if (val & 0x00000001) { 1651 adapter->io_rid = rid; 1652 break; 1653 } 1654 rid += 4; 1655 } 1656 1657 adapter->res_ioport = bus_alloc_resource(dev, SYS_RES_IOPORT, 1658 &adapter->io_rid, 0, ~0, 1, 1659 RF_ACTIVE); 1660 if (!(adapter->res_ioport)) { 1661 printf("em%d: Unable to allocate bus resource: ioport\n", 1662 adapter->unit); 1663 return(ENXIO); 1664 } 1665 1666 adapter->hw.io_base = 1667 rman_get_start(adapter->res_ioport); 1668 } 1669 1670 rid = 0x0; 1671 adapter->res_interrupt = bus_alloc_resource(dev, SYS_RES_IRQ, 1672 &rid, 0, ~0, 1, 1673 RF_SHAREABLE | RF_ACTIVE); 1674 if (!(adapter->res_interrupt)) { 1675 printf("em%d: Unable to allocate bus resource: interrupt\n", 1676 adapter->unit); 1677 return(ENXIO); 1678 } 1679 if (bus_setup_intr(dev, adapter->res_interrupt, INTR_TYPE_NET, 1680 (void (*)(void *)) em_intr, adapter, 1681 &adapter->int_handler_tag)) { 1682 printf("em%d: Error registering interrupt handler!\n", 1683 adapter->unit); 1684 return(ENXIO); 1685 } 1686 1687 adapter->hw.back = &adapter->osdep; 1688 1689 return(0); 1690 } 1691 1692 static void 1693 em_free_pci_resources(struct adapter * adapter) 1694 { 1695 device_t dev = adapter->dev; 1696 1697 if (adapter->res_interrupt != NULL) { 1698 bus_teardown_intr(dev, adapter->res_interrupt, 1699 adapter->int_handler_tag); 1700 bus_release_resource(dev, SYS_RES_IRQ, 0, 1701 adapter->res_interrupt); 1702 } 1703 if (adapter->res_memory != NULL) { 1704 bus_release_resource(dev, SYS_RES_MEMORY, EM_MMBA, 1705 adapter->res_memory); 1706 } 1707 1708 if (adapter->res_ioport != NULL) { 1709 bus_release_resource(dev, SYS_RES_IOPORT, adapter->io_rid, 1710 adapter->res_ioport); 1711 } 1712 return; 1713 } 1714 1715 /********************************************************************* 1716 * 1717 * Initialize the hardware to a configuration as specified by the 1718 * adapter structure. The controller is reset, the EEPROM is 1719 * verified, the MAC address is set, then the shared initialization 1720 * routines are called. 1721 * 1722 **********************************************************************/ 1723 static int 1724 em_hardware_init(struct adapter * adapter) 1725 { 1726 INIT_DEBUGOUT("em_hardware_init: begin"); 1727 /* Issue a global reset */ 1728 em_reset_hw(&adapter->hw); 1729 1730 /* When hardware is reset, fifo_head is also reset */ 1731 adapter->tx_fifo_head = 0; 1732 1733 /* Make sure we have a good EEPROM before we read from it */ 1734 if (em_validate_eeprom_checksum(&adapter->hw) < 0) { 1735 printf("em%d: The EEPROM Checksum Is Not Valid\n", 1736 adapter->unit); 1737 return(EIO); 1738 } 1739 1740 if (em_read_part_num(&adapter->hw, &(adapter->part_num)) < 0) { 1741 printf("em%d: EEPROM read error while reading part number\n", 1742 adapter->unit); 1743 return(EIO); 1744 } 1745 1746 if (em_init_hw(&adapter->hw) < 0) { 1747 printf("em%d: Hardware Initialization Failed", 1748 adapter->unit); 1749 return(EIO); 1750 } 1751 1752 em_check_for_link(&adapter->hw); 1753 if (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU) 1754 adapter->link_active = 1; 1755 else 1756 adapter->link_active = 0; 1757 1758 if (adapter->link_active) { 1759 em_get_speed_and_duplex(&adapter->hw, 1760 &adapter->link_speed, 1761 &adapter->link_duplex); 1762 } else { 1763 adapter->link_speed = 0; 1764 adapter->link_duplex = 0; 1765 } 1766 1767 return(0); 1768 } 1769 1770 /********************************************************************* 1771 * 1772 * Setup networking device structure and register an interface. 1773 * 1774 **********************************************************************/ 1775 static void 1776 em_setup_interface(device_t dev, struct adapter * adapter) 1777 { 1778 struct ifnet *ifp; 1779 INIT_DEBUGOUT("em_setup_interface: begin"); 1780 1781 ifp = &adapter->interface_data.ac_if; 1782 if_initname(ifp, "em", adapter->unit); 1783 ifp->if_mtu = ETHERMTU; 1784 ifp->if_output = ether_output; 1785 ifp->if_baudrate = 1000000000; 1786 ifp->if_init = em_init; 1787 ifp->if_softc = adapter; 1788 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 1789 ifp->if_ioctl = em_ioctl; 1790 ifp->if_start = em_start; 1791 ifp->if_watchdog = em_watchdog; 1792 ifp->if_snd.ifq_maxlen = adapter->num_tx_desc - 1; 1793 1794 ether_ifattach(ifp, adapter->interface_data.ac_enaddr); 1795 1796 if (adapter->hw.mac_type >= em_82543) { 1797 ifp->if_capabilities = IFCAP_HWCSUM; 1798 ifp->if_capenable = ifp->if_capabilities; 1799 } 1800 1801 /* 1802 * Tell the upper layer(s) we support long frames. 1803 */ 1804 ifp->if_data.ifi_hdrlen = sizeof(struct ether_vlan_header); 1805 #if defined(__FreeBSD__) && __FreeBSD_version >= 500000 1806 ifp->if_capabilities |= IFCAP_VLAN_HWTAGGING | IFCAP_VLAN_MTU; 1807 #endif 1808 1809 1810 /* 1811 * Specify the media types supported by this adapter and register 1812 * callbacks to update media and link information 1813 */ 1814 ifmedia_init(&adapter->media, IFM_IMASK, em_media_change, 1815 em_media_status); 1816 if (adapter->hw.media_type == em_media_type_fiber) { 1817 ifmedia_add(&adapter->media, IFM_ETHER | IFM_1000_SX | IFM_FDX, 1818 0, NULL); 1819 ifmedia_add(&adapter->media, IFM_ETHER | IFM_1000_SX, 1820 0, NULL); 1821 } else { 1822 ifmedia_add(&adapter->media, IFM_ETHER | IFM_10_T, 0, NULL); 1823 ifmedia_add(&adapter->media, IFM_ETHER | IFM_10_T | IFM_FDX, 1824 0, NULL); 1825 ifmedia_add(&adapter->media, IFM_ETHER | IFM_100_TX, 1826 0, NULL); 1827 ifmedia_add(&adapter->media, IFM_ETHER | IFM_100_TX | IFM_FDX, 1828 0, NULL); 1829 #if defined(__DragonFly__) || __FreeBSD_version < 500000 1830 ifmedia_add(&adapter->media, IFM_ETHER | IFM_1000_TX | IFM_FDX, 1831 0, NULL); 1832 ifmedia_add(&adapter->media, IFM_ETHER | IFM_1000_TX, 0, NULL); 1833 #else 1834 ifmedia_add(&adapter->media, IFM_ETHER | IFM_1000_T | IFM_FDX, 1835 0, NULL); 1836 ifmedia_add(&adapter->media, IFM_ETHER | IFM_1000_T, 0, NULL); 1837 #endif 1838 } 1839 ifmedia_add(&adapter->media, IFM_ETHER | IFM_AUTO, 0, NULL); 1840 ifmedia_set(&adapter->media, IFM_ETHER | IFM_AUTO); 1841 1842 return; 1843 } 1844 1845 1846 /********************************************************************* 1847 * 1848 * Workaround for SmartSpeed on 82541 and 82547 controllers 1849 * 1850 **********************************************************************/ 1851 static void 1852 em_smartspeed(struct adapter *adapter) 1853 { 1854 uint16_t phy_tmp; 1855 1856 if(adapter->link_active || (adapter->hw.phy_type != em_phy_igp) || 1857 !adapter->hw.autoneg || !(adapter->hw.autoneg_advertised & ADVERTISE_1000_FULL)) 1858 return; 1859 1860 if(adapter->smartspeed == 0) { 1861 /* If Master/Slave config fault is asserted twice, 1862 * we assume back-to-back */ 1863 em_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_tmp); 1864 if(!(phy_tmp & SR_1000T_MS_CONFIG_FAULT)) return; 1865 em_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_tmp); 1866 if(phy_tmp & SR_1000T_MS_CONFIG_FAULT) { 1867 em_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, 1868 &phy_tmp); 1869 if(phy_tmp & CR_1000T_MS_ENABLE) { 1870 phy_tmp &= ~CR_1000T_MS_ENABLE; 1871 em_write_phy_reg(&adapter->hw, 1872 PHY_1000T_CTRL, phy_tmp); 1873 adapter->smartspeed++; 1874 if(adapter->hw.autoneg && 1875 !em_phy_setup_autoneg(&adapter->hw) && 1876 !em_read_phy_reg(&adapter->hw, PHY_CTRL, 1877 &phy_tmp)) { 1878 phy_tmp |= (MII_CR_AUTO_NEG_EN | 1879 MII_CR_RESTART_AUTO_NEG); 1880 em_write_phy_reg(&adapter->hw, 1881 PHY_CTRL, phy_tmp); 1882 } 1883 } 1884 } 1885 return; 1886 } else if(adapter->smartspeed == EM_SMARTSPEED_DOWNSHIFT) { 1887 /* If still no link, perhaps using 2/3 pair cable */ 1888 em_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_tmp); 1889 phy_tmp |= CR_1000T_MS_ENABLE; 1890 em_write_phy_reg(&adapter->hw, PHY_1000T_CTRL, phy_tmp); 1891 if(adapter->hw.autoneg && 1892 !em_phy_setup_autoneg(&adapter->hw) && 1893 !em_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_tmp)) { 1894 phy_tmp |= (MII_CR_AUTO_NEG_EN | 1895 MII_CR_RESTART_AUTO_NEG); 1896 em_write_phy_reg(&adapter->hw, PHY_CTRL, phy_tmp); 1897 } 1898 } 1899 /* Restart process after EM_SMARTSPEED_MAX iterations */ 1900 if(adapter->smartspeed++ == EM_SMARTSPEED_MAX) 1901 adapter->smartspeed = 0; 1902 1903 return; 1904 } 1905 1906 1907 /********************************************************************* 1908 * 1909 * Allocate memory for tx_buffer structures. The tx_buffer stores all 1910 * the information needed to transmit a packet on the wire. 1911 * 1912 **********************************************************************/ 1913 static int 1914 em_allocate_transmit_structures(struct adapter * adapter) 1915 { 1916 if (!(adapter->tx_buffer_area = 1917 (struct em_buffer *) malloc(sizeof(struct em_buffer) * 1918 adapter->num_tx_desc, M_DEVBUF, 1919 M_NOWAIT))) { 1920 printf("em%d: Unable to allocate tx_buffer memory\n", 1921 adapter->unit); 1922 return ENOMEM; 1923 } 1924 1925 bzero(adapter->tx_buffer_area, 1926 sizeof(struct em_buffer) * adapter->num_tx_desc); 1927 1928 return 0; 1929 } 1930 1931 /********************************************************************* 1932 * 1933 * Allocate and initialize transmit structures. 1934 * 1935 **********************************************************************/ 1936 static int 1937 em_setup_transmit_structures(struct adapter * adapter) 1938 { 1939 if (em_allocate_transmit_structures(adapter)) 1940 return ENOMEM; 1941 1942 bzero((void *) adapter->tx_desc_base, 1943 (sizeof(struct em_tx_desc)) * adapter->num_tx_desc); 1944 1945 adapter->next_avail_tx_desc = 0; 1946 adapter->oldest_used_tx_desc = 0; 1947 1948 /* Set number of descriptors available */ 1949 adapter->num_tx_desc_avail = adapter->num_tx_desc; 1950 1951 /* Set checksum context */ 1952 adapter->active_checksum_context = OFFLOAD_NONE; 1953 1954 return 0; 1955 } 1956 1957 /********************************************************************* 1958 * 1959 * Enable transmit unit. 1960 * 1961 **********************************************************************/ 1962 static void 1963 em_initialize_transmit_unit(struct adapter * adapter) 1964 { 1965 u_int32_t reg_tctl; 1966 u_int32_t reg_tipg = 0; 1967 u_int64_t tdba = vtophys((vm_offset_t)adapter->tx_desc_base); 1968 1969 /* Setup the Base and Length of the Tx Descriptor Ring */ 1970 E1000_WRITE_REG(&adapter->hw, TDBAL, 1971 (tdba & 0x00000000ffffffffULL)); 1972 E1000_WRITE_REG(&adapter->hw, TDBAH, (tdba >> 32)); 1973 E1000_WRITE_REG(&adapter->hw, TDLEN, 1974 adapter->num_tx_desc * 1975 sizeof(struct em_tx_desc)); 1976 1977 /* Setup the HW Tx Head and Tail descriptor pointers */ 1978 E1000_WRITE_REG(&adapter->hw, TDH, 0); 1979 E1000_WRITE_REG(&adapter->hw, TDT, 0); 1980 1981 1982 HW_DEBUGOUT2("Base = %x, Length = %x\n", 1983 E1000_READ_REG(&adapter->hw, TDBAL), 1984 E1000_READ_REG(&adapter->hw, TDLEN)); 1985 1986 1987 /* Set the default values for the Tx Inter Packet Gap timer */ 1988 switch (adapter->hw.mac_type) { 1989 case em_82542_rev2_0: 1990 case em_82542_rev2_1: 1991 reg_tipg = DEFAULT_82542_TIPG_IPGT; 1992 reg_tipg |= DEFAULT_82542_TIPG_IPGR1 << E1000_TIPG_IPGR1_SHIFT; 1993 reg_tipg |= DEFAULT_82542_TIPG_IPGR2 << E1000_TIPG_IPGR2_SHIFT; 1994 break; 1995 default: 1996 if (adapter->hw.media_type == em_media_type_fiber) 1997 reg_tipg = DEFAULT_82543_TIPG_IPGT_FIBER; 1998 else 1999 reg_tipg = DEFAULT_82543_TIPG_IPGT_COPPER; 2000 reg_tipg |= DEFAULT_82543_TIPG_IPGR1 << E1000_TIPG_IPGR1_SHIFT; 2001 reg_tipg |= DEFAULT_82543_TIPG_IPGR2 << E1000_TIPG_IPGR2_SHIFT; 2002 } 2003 2004 E1000_WRITE_REG(&adapter->hw, TIPG, reg_tipg); 2005 E1000_WRITE_REG(&adapter->hw, TIDV, adapter->tx_int_delay.value); 2006 if(adapter->hw.mac_type >= em_82540) 2007 E1000_WRITE_REG(&adapter->hw, TADV, adapter->tx_abs_int_delay.value); 2008 2009 /* Program the Transmit Control Register */ 2010 reg_tctl = E1000_TCTL_PSP | E1000_TCTL_EN | 2011 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT); 2012 if (adapter->link_duplex == 1) { 2013 reg_tctl |= E1000_FDX_COLLISION_DISTANCE << E1000_COLD_SHIFT; 2014 } else { 2015 reg_tctl |= E1000_HDX_COLLISION_DISTANCE << E1000_COLD_SHIFT; 2016 } 2017 E1000_WRITE_REG(&adapter->hw, TCTL, reg_tctl); 2018 2019 /* Setup Transmit Descriptor Settings for this adapter */ 2020 adapter->txd_cmd = E1000_TXD_CMD_IFCS | E1000_TXD_CMD_RS; 2021 2022 if (adapter->tx_int_delay.value > 0) 2023 adapter->txd_cmd |= E1000_TXD_CMD_IDE; 2024 2025 return; 2026 } 2027 2028 /********************************************************************* 2029 * 2030 * Free all transmit related data structures. 2031 * 2032 **********************************************************************/ 2033 static void 2034 em_free_transmit_structures(struct adapter * adapter) 2035 { 2036 struct em_buffer *tx_buffer; 2037 int i; 2038 2039 INIT_DEBUGOUT("free_transmit_structures: begin"); 2040 2041 if (adapter->tx_buffer_area != NULL) { 2042 tx_buffer = adapter->tx_buffer_area; 2043 for (i = 0; i < adapter->num_tx_desc; i++, tx_buffer++) { 2044 if (tx_buffer->m_head != NULL) 2045 m_freem(tx_buffer->m_head); 2046 tx_buffer->m_head = NULL; 2047 } 2048 } 2049 if (adapter->tx_buffer_area != NULL) { 2050 free(adapter->tx_buffer_area, M_DEVBUF); 2051 adapter->tx_buffer_area = NULL; 2052 } 2053 return; 2054 } 2055 2056 /********************************************************************* 2057 * 2058 * The offload context needs to be set when we transfer the first 2059 * packet of a particular protocol (TCP/UDP). We change the 2060 * context only if the protocol type changes. 2061 * 2062 **********************************************************************/ 2063 static void 2064 em_transmit_checksum_setup(struct adapter * adapter, 2065 struct mbuf *mp, 2066 u_int32_t *txd_upper, 2067 u_int32_t *txd_lower) 2068 { 2069 struct em_context_desc *TXD; 2070 struct em_buffer *tx_buffer; 2071 int curr_txd; 2072 2073 if (mp->m_pkthdr.csum_flags) { 2074 2075 if (mp->m_pkthdr.csum_flags & CSUM_TCP) { 2076 *txd_upper = E1000_TXD_POPTS_TXSM << 8; 2077 *txd_lower = E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D; 2078 if (adapter->active_checksum_context == OFFLOAD_TCP_IP) 2079 return; 2080 else 2081 adapter->active_checksum_context = OFFLOAD_TCP_IP; 2082 2083 } else if (mp->m_pkthdr.csum_flags & CSUM_UDP) { 2084 *txd_upper = E1000_TXD_POPTS_TXSM << 8; 2085 *txd_lower = E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D; 2086 if (adapter->active_checksum_context == OFFLOAD_UDP_IP) 2087 return; 2088 else 2089 adapter->active_checksum_context = OFFLOAD_UDP_IP; 2090 } else { 2091 *txd_upper = 0; 2092 *txd_lower = 0; 2093 return; 2094 } 2095 } else { 2096 *txd_upper = 0; 2097 *txd_lower = 0; 2098 return; 2099 } 2100 2101 /* If we reach this point, the checksum offload context 2102 * needs to be reset. 2103 */ 2104 curr_txd = adapter->next_avail_tx_desc; 2105 tx_buffer = &adapter->tx_buffer_area[curr_txd]; 2106 TXD = (struct em_context_desc *) &adapter->tx_desc_base[curr_txd]; 2107 2108 TXD->lower_setup.ip_fields.ipcss = ETHER_HDR_LEN; 2109 TXD->lower_setup.ip_fields.ipcso = 2110 ETHER_HDR_LEN + offsetof(struct ip, ip_sum); 2111 TXD->lower_setup.ip_fields.ipcse = 2112 ETHER_HDR_LEN + sizeof(struct ip) - 1; 2113 2114 TXD->upper_setup.tcp_fields.tucss = 2115 ETHER_HDR_LEN + sizeof(struct ip); 2116 TXD->upper_setup.tcp_fields.tucse = 0; 2117 2118 if (adapter->active_checksum_context == OFFLOAD_TCP_IP) { 2119 TXD->upper_setup.tcp_fields.tucso = 2120 ETHER_HDR_LEN + sizeof(struct ip) + 2121 offsetof(struct tcphdr, th_sum); 2122 } else if (adapter->active_checksum_context == OFFLOAD_UDP_IP) { 2123 TXD->upper_setup.tcp_fields.tucso = 2124 ETHER_HDR_LEN + sizeof(struct ip) + 2125 offsetof(struct udphdr, uh_sum); 2126 } 2127 2128 TXD->tcp_seg_setup.data = 0; 2129 TXD->cmd_and_length = (adapter->txd_cmd | E1000_TXD_CMD_DEXT); 2130 2131 tx_buffer->m_head = NULL; 2132 2133 if (++curr_txd == adapter->num_tx_desc) 2134 curr_txd = 0; 2135 2136 adapter->num_tx_desc_avail--; 2137 adapter->next_avail_tx_desc = curr_txd; 2138 2139 return; 2140 } 2141 2142 /********************************************************************** 2143 * 2144 * Examine each tx_buffer in the used queue. If the hardware is done 2145 * processing the packet then free associated resources. The 2146 * tx_buffer is put back on the free queue. 2147 * 2148 **********************************************************************/ 2149 static void 2150 em_clean_transmit_interrupts(struct adapter * adapter) 2151 { 2152 int s; 2153 int i, num_avail; 2154 struct em_buffer *tx_buffer; 2155 struct em_tx_desc *tx_desc; 2156 struct ifnet *ifp = &adapter->interface_data.ac_if; 2157 2158 if (adapter->num_tx_desc_avail == adapter->num_tx_desc) 2159 return; 2160 2161 s = splimp(); 2162 #ifdef DBG_STATS 2163 adapter->clean_tx_interrupts++; 2164 #endif 2165 num_avail = adapter->num_tx_desc_avail; 2166 i = adapter->oldest_used_tx_desc; 2167 2168 tx_buffer = &adapter->tx_buffer_area[i]; 2169 tx_desc = &adapter->tx_desc_base[i]; 2170 2171 while(tx_desc->upper.fields.status & E1000_TXD_STAT_DD) { 2172 2173 tx_desc->upper.data = 0; 2174 num_avail++; 2175 2176 if (tx_buffer->m_head) { 2177 ifp->if_opackets++; 2178 m_freem(tx_buffer->m_head); 2179 tx_buffer->m_head = NULL; 2180 } 2181 2182 if (++i == adapter->num_tx_desc) 2183 i = 0; 2184 2185 tx_buffer = &adapter->tx_buffer_area[i]; 2186 tx_desc = &adapter->tx_desc_base[i]; 2187 } 2188 2189 adapter->oldest_used_tx_desc = i; 2190 2191 /* 2192 * If we have enough room, clear IFF_OACTIVE to tell the stack 2193 * that it is OK to send packets. 2194 * If there are no pending descriptors, clear the timeout. Otherwise, 2195 * if some descriptors have been freed, restart the timeout. 2196 */ 2197 if (num_avail > EM_TX_CLEANUP_THRESHOLD) { 2198 ifp->if_flags &= ~IFF_OACTIVE; 2199 if (num_avail == adapter->num_tx_desc) 2200 ifp->if_timer = 0; 2201 else if (num_avail == adapter->num_tx_desc_avail) 2202 ifp->if_timer = EM_TX_TIMEOUT; 2203 } 2204 adapter->num_tx_desc_avail = num_avail; 2205 splx(s); 2206 return; 2207 } 2208 2209 /********************************************************************* 2210 * 2211 * Get a buffer from system mbuf buffer pool. 2212 * 2213 **********************************************************************/ 2214 static int 2215 em_get_buf(int i, struct adapter *adapter, 2216 struct mbuf *nmp) 2217 { 2218 register struct mbuf *mp = nmp; 2219 struct ifnet *ifp; 2220 2221 ifp = &adapter->interface_data.ac_if; 2222 2223 if (mp == NULL) { 2224 MGETHDR(mp, M_DONTWAIT, MT_DATA); 2225 if (mp == NULL) { 2226 adapter->mbuf_alloc_failed++; 2227 return(ENOBUFS); 2228 } 2229 MCLGET(mp, M_DONTWAIT); 2230 if ((mp->m_flags & M_EXT) == 0) { 2231 m_freem(mp); 2232 adapter->mbuf_cluster_failed++; 2233 return(ENOBUFS); 2234 } 2235 mp->m_len = mp->m_pkthdr.len = MCLBYTES; 2236 } else { 2237 mp->m_len = mp->m_pkthdr.len = MCLBYTES; 2238 mp->m_data = mp->m_ext.ext_buf; 2239 mp->m_next = NULL; 2240 } 2241 2242 if (ifp->if_mtu <= ETHERMTU) { 2243 m_adj(mp, ETHER_ALIGN); 2244 } 2245 2246 adapter->rx_buffer_area[i].m_head = mp; 2247 adapter->rx_desc_base[i].buffer_addr = 2248 vtophys(mtod(mp, vm_offset_t)); 2249 2250 return(0); 2251 } 2252 2253 /********************************************************************* 2254 * 2255 * Allocate memory for rx_buffer structures. Since we use one 2256 * rx_buffer per received packet, the maximum number of rx_buffer's 2257 * that we'll need is equal to the number of receive descriptors 2258 * that we've allocated. 2259 * 2260 **********************************************************************/ 2261 static int 2262 em_allocate_receive_structures(struct adapter * adapter) 2263 { 2264 int i; 2265 2266 if (!(adapter->rx_buffer_area = 2267 (struct em_buffer *) malloc(sizeof(struct em_buffer) * 2268 adapter->num_rx_desc, M_DEVBUF, 2269 M_NOWAIT))) { 2270 printf("em%d: Unable to allocate rx_buffer memory\n", 2271 adapter->unit); 2272 return(ENOMEM); 2273 } 2274 2275 bzero(adapter->rx_buffer_area, 2276 sizeof(struct em_buffer) * adapter->num_rx_desc); 2277 2278 for (i = 0; i < adapter->num_rx_desc; i++) { 2279 if (em_get_buf(i, adapter, NULL) == ENOBUFS) { 2280 adapter->rx_buffer_area[i].m_head = NULL; 2281 adapter->rx_desc_base[i].buffer_addr = 0; 2282 return(ENOBUFS); 2283 } 2284 } 2285 2286 return(0); 2287 } 2288 2289 /********************************************************************* 2290 * 2291 * Allocate and initialize receive structures. 2292 * 2293 **********************************************************************/ 2294 static int 2295 em_setup_receive_structures(struct adapter * adapter) 2296 { 2297 bzero((void *) adapter->rx_desc_base, 2298 (sizeof(struct em_rx_desc)) * adapter->num_rx_desc); 2299 2300 if (em_allocate_receive_structures(adapter)) 2301 return ENOMEM; 2302 2303 /* Setup our descriptor pointers */ 2304 adapter->next_rx_desc_to_check = 0; 2305 return(0); 2306 } 2307 2308 /********************************************************************* 2309 * 2310 * Enable receive unit. 2311 * 2312 **********************************************************************/ 2313 static void 2314 em_initialize_receive_unit(struct adapter * adapter) 2315 { 2316 u_int32_t reg_rctl; 2317 u_int32_t reg_rxcsum; 2318 struct ifnet *ifp; 2319 u_int64_t rdba = vtophys((vm_offset_t)adapter->rx_desc_base); 2320 2321 ifp = &adapter->interface_data.ac_if; 2322 2323 /* Make sure receives are disabled while setting up the descriptor ring */ 2324 E1000_WRITE_REG(&adapter->hw, RCTL, 0); 2325 2326 /* Set the Receive Delay Timer Register */ 2327 E1000_WRITE_REG(&adapter->hw, RDTR, 2328 adapter->rx_int_delay.value | E1000_RDT_FPDB); 2329 2330 if(adapter->hw.mac_type >= em_82540) { 2331 E1000_WRITE_REG(&adapter->hw, RADV, adapter->rx_abs_int_delay.value); 2332 2333 /* Set the interrupt throttling rate. Value is calculated 2334 * as DEFAULT_ITR = 1/(MAX_INTS_PER_SEC * 256ns) */ 2335 #define MAX_INTS_PER_SEC 8000 2336 #define DEFAULT_ITR 1000000000/(MAX_INTS_PER_SEC * 256) 2337 E1000_WRITE_REG(&adapter->hw, ITR, DEFAULT_ITR); 2338 } 2339 2340 /* Setup the Base and Length of the Rx Descriptor Ring */ 2341 E1000_WRITE_REG(&adapter->hw, RDBAL, 2342 (rdba & 0x00000000ffffffffULL)); 2343 E1000_WRITE_REG(&adapter->hw, RDBAH, (rdba >> 32)); 2344 E1000_WRITE_REG(&adapter->hw, RDLEN, 2345 adapter->num_rx_desc * 2346 sizeof(struct em_rx_desc)); 2347 2348 /* Setup the HW Rx Head and Tail Descriptor Pointers */ 2349 E1000_WRITE_REG(&adapter->hw, RDH, 0); 2350 E1000_WRITE_REG(&adapter->hw, RDT, adapter->num_rx_desc - 1); 2351 2352 /* Setup the Receive Control Register */ 2353 reg_rctl = E1000_RCTL_EN | E1000_RCTL_BAM | E1000_RCTL_LBM_NO | 2354 E1000_RCTL_RDMTS_HALF | 2355 (adapter->hw.mc_filter_type << E1000_RCTL_MO_SHIFT); 2356 2357 if (adapter->hw.tbi_compatibility_on == TRUE) 2358 reg_rctl |= E1000_RCTL_SBP; 2359 2360 2361 switch (adapter->rx_buffer_len) { 2362 default: 2363 case EM_RXBUFFER_2048: 2364 reg_rctl |= E1000_RCTL_SZ_2048; 2365 break; 2366 case EM_RXBUFFER_4096: 2367 reg_rctl |= E1000_RCTL_SZ_4096 | E1000_RCTL_BSEX | E1000_RCTL_LPE; 2368 break; 2369 case EM_RXBUFFER_8192: 2370 reg_rctl |= E1000_RCTL_SZ_8192 | E1000_RCTL_BSEX | E1000_RCTL_LPE; 2371 break; 2372 case EM_RXBUFFER_16384: 2373 reg_rctl |= E1000_RCTL_SZ_16384 | E1000_RCTL_BSEX | E1000_RCTL_LPE; 2374 break; 2375 } 2376 2377 if (ifp->if_mtu > ETHERMTU) 2378 reg_rctl |= E1000_RCTL_LPE; 2379 2380 /* Enable 82543 Receive Checksum Offload for TCP and UDP */ 2381 if ((adapter->hw.mac_type >= em_82543) && 2382 (ifp->if_capenable & IFCAP_RXCSUM)) { 2383 reg_rxcsum = E1000_READ_REG(&adapter->hw, RXCSUM); 2384 reg_rxcsum |= (E1000_RXCSUM_IPOFL | E1000_RXCSUM_TUOFL); 2385 E1000_WRITE_REG(&adapter->hw, RXCSUM, reg_rxcsum); 2386 } 2387 2388 /* Enable Receives */ 2389 E1000_WRITE_REG(&adapter->hw, RCTL, reg_rctl); 2390 2391 return; 2392 } 2393 2394 /********************************************************************* 2395 * 2396 * Free receive related data structures. 2397 * 2398 **********************************************************************/ 2399 static void 2400 em_free_receive_structures(struct adapter *adapter) 2401 { 2402 struct em_buffer *rx_buffer; 2403 int i; 2404 2405 INIT_DEBUGOUT("free_receive_structures: begin"); 2406 2407 if (adapter->rx_buffer_area != NULL) { 2408 rx_buffer = adapter->rx_buffer_area; 2409 for (i = 0; i < adapter->num_rx_desc; i++, rx_buffer++) { 2410 if (rx_buffer->m_head != NULL) 2411 m_freem(rx_buffer->m_head); 2412 rx_buffer->m_head = NULL; 2413 } 2414 } 2415 if (adapter->rx_buffer_area != NULL) { 2416 free(adapter->rx_buffer_area, M_DEVBUF); 2417 adapter->rx_buffer_area = NULL; 2418 } 2419 return; 2420 } 2421 2422 /********************************************************************* 2423 * 2424 * This routine executes in interrupt context. It replenishes 2425 * the mbufs in the descriptor and sends data which has been 2426 * dma'ed into host memory to upper layer. 2427 * 2428 * We loop at most count times if count is > 0, or until done if 2429 * count < 0. 2430 * 2431 *********************************************************************/ 2432 static void 2433 em_process_receive_interrupts(struct adapter * adapter, int count) 2434 { 2435 struct ifnet *ifp; 2436 struct mbuf *mp; 2437 #if defined(__DragonFly__) || __FreeBSD_version < 500000 2438 struct ether_header *eh; 2439 #endif 2440 u_int8_t accept_frame = 0; 2441 u_int8_t eop = 0; 2442 u_int16_t len, desc_len, prev_len_adj; 2443 int i; 2444 2445 /* Pointer to the receive descriptor being examined. */ 2446 struct em_rx_desc *current_desc; 2447 2448 ifp = &adapter->interface_data.ac_if; 2449 i = adapter->next_rx_desc_to_check; 2450 current_desc = &adapter->rx_desc_base[i]; 2451 2452 if (!((current_desc->status) & E1000_RXD_STAT_DD)) { 2453 #ifdef DBG_STATS 2454 adapter->no_pkts_avail++; 2455 #endif 2456 return; 2457 } 2458 while ((current_desc->status & E1000_RXD_STAT_DD) && (count != 0)) { 2459 2460 mp = adapter->rx_buffer_area[i].m_head; 2461 2462 accept_frame = 1; 2463 prev_len_adj = 0; 2464 desc_len = current_desc->length; 2465 if (current_desc->status & E1000_RXD_STAT_EOP) { 2466 count--; 2467 eop = 1; 2468 if (desc_len < ETHER_CRC_LEN) { 2469 len = 0; 2470 prev_len_adj = ETHER_CRC_LEN - desc_len; 2471 } 2472 else { 2473 len = desc_len - ETHER_CRC_LEN; 2474 } 2475 } else { 2476 eop = 0; 2477 len = current_desc->length; 2478 } 2479 2480 if (current_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK) { 2481 u_int8_t last_byte; 2482 u_int32_t pkt_len = current_desc->length; 2483 2484 if (adapter->fmp != NULL) 2485 pkt_len += adapter->fmp->m_pkthdr.len; 2486 2487 last_byte = *(mtod(mp, caddr_t) + 2488 current_desc->length - 1); 2489 2490 if (TBI_ACCEPT(&adapter->hw, current_desc->status, 2491 current_desc->errors, 2492 pkt_len, last_byte)) { 2493 em_tbi_adjust_stats(&adapter->hw, 2494 &adapter->stats, 2495 pkt_len, 2496 adapter->hw.mac_addr); 2497 if (len > 0) len--; 2498 } 2499 else { 2500 accept_frame = 0; 2501 } 2502 } 2503 2504 if (accept_frame) { 2505 2506 if (em_get_buf(i, adapter, NULL) == ENOBUFS) { 2507 adapter->dropped_pkts++; 2508 em_get_buf(i, adapter, mp); 2509 if (adapter->fmp != NULL) 2510 m_freem(adapter->fmp); 2511 adapter->fmp = NULL; 2512 adapter->lmp = NULL; 2513 break; 2514 } 2515 2516 /* Assign correct length to the current fragment */ 2517 mp->m_len = len; 2518 2519 if (adapter->fmp == NULL) { 2520 mp->m_pkthdr.len = len; 2521 adapter->fmp = mp; /* Store the first mbuf */ 2522 adapter->lmp = mp; 2523 } else { 2524 /* Chain mbuf's together */ 2525 mp->m_flags &= ~M_PKTHDR; 2526 /* 2527 * Adjust length of previous mbuf in chain if we 2528 * received less than 4 bytes in the last descriptor. 2529 */ 2530 if (prev_len_adj > 0) { 2531 adapter->lmp->m_len -= prev_len_adj; 2532 adapter->fmp->m_pkthdr.len -= prev_len_adj; 2533 } 2534 adapter->lmp->m_next = mp; 2535 adapter->lmp = adapter->lmp->m_next; 2536 adapter->fmp->m_pkthdr.len += len; 2537 } 2538 2539 if (eop) { 2540 adapter->fmp->m_pkthdr.rcvif = ifp; 2541 ifp->if_ipackets++; 2542 2543 #if defined(__DragonFly__) || __FreeBSD_version < 500000 2544 eh = mtod(adapter->fmp, struct ether_header *); 2545 /* Remove ethernet header from mbuf */ 2546 m_adj(adapter->fmp, sizeof(struct ether_header)); 2547 em_receive_checksum(adapter, current_desc, 2548 adapter->fmp); 2549 if (current_desc->status & E1000_RXD_STAT_VP) 2550 VLAN_INPUT_TAG(eh, adapter->fmp, 2551 (current_desc->special & 2552 E1000_RXD_SPC_VLAN_MASK)); 2553 else 2554 ether_input(ifp, eh, adapter->fmp); 2555 #else 2556 2557 em_receive_checksum(adapter, current_desc, 2558 adapter->fmp); 2559 if (current_desc->status & E1000_RXD_STAT_VP) 2560 VLAN_INPUT_TAG(ifp, adapter->fmp, 2561 (current_desc->special & 2562 E1000_RXD_SPC_VLAN_MASK), 2563 adapter->fmp = NULL); 2564 2565 if (adapter->fmp != NULL) 2566 (*ifp->if_input)(ifp, adapter->fmp); 2567 #endif 2568 adapter->fmp = NULL; 2569 adapter->lmp = NULL; 2570 } 2571 } else { 2572 adapter->dropped_pkts++; 2573 em_get_buf(i, adapter, mp); 2574 if (adapter->fmp != NULL) 2575 m_freem(adapter->fmp); 2576 adapter->fmp = NULL; 2577 adapter->lmp = NULL; 2578 } 2579 2580 /* Zero out the receive descriptors status */ 2581 current_desc->status = 0; 2582 2583 /* Advance the E1000's Receive Queue #0 "Tail Pointer". */ 2584 E1000_WRITE_REG(&adapter->hw, RDT, i); 2585 2586 /* Advance our pointers to the next descriptor */ 2587 if (++i == adapter->num_rx_desc) { 2588 i = 0; 2589 current_desc = adapter->rx_desc_base; 2590 } else 2591 current_desc++; 2592 } 2593 adapter->next_rx_desc_to_check = i; 2594 return; 2595 } 2596 2597 /********************************************************************* 2598 * 2599 * Verify that the hardware indicated that the checksum is valid. 2600 * Inform the stack about the status of checksum so that stack 2601 * doesn't spend time verifying the checksum. 2602 * 2603 *********************************************************************/ 2604 static void 2605 em_receive_checksum(struct adapter *adapter, 2606 struct em_rx_desc *rx_desc, 2607 struct mbuf *mp) 2608 { 2609 /* 82543 or newer only */ 2610 if ((adapter->hw.mac_type < em_82543) || 2611 /* Ignore Checksum bit is set */ 2612 (rx_desc->status & E1000_RXD_STAT_IXSM)) { 2613 mp->m_pkthdr.csum_flags = 0; 2614 return; 2615 } 2616 2617 if (rx_desc->status & E1000_RXD_STAT_IPCS) { 2618 /* Did it pass? */ 2619 if (!(rx_desc->errors & E1000_RXD_ERR_IPE)) { 2620 /* IP Checksum Good */ 2621 mp->m_pkthdr.csum_flags = CSUM_IP_CHECKED; 2622 mp->m_pkthdr.csum_flags |= CSUM_IP_VALID; 2623 2624 } else { 2625 mp->m_pkthdr.csum_flags = 0; 2626 } 2627 } 2628 2629 if (rx_desc->status & E1000_RXD_STAT_TCPCS) { 2630 /* Did it pass? */ 2631 if (!(rx_desc->errors & E1000_RXD_ERR_TCPE)) { 2632 mp->m_pkthdr.csum_flags |= 2633 (CSUM_DATA_VALID | CSUM_PSEUDO_HDR); 2634 mp->m_pkthdr.csum_data = htons(0xffff); 2635 } 2636 } 2637 2638 return; 2639 } 2640 2641 2642 static void 2643 em_enable_vlans(struct adapter *adapter) 2644 { 2645 uint32_t ctrl; 2646 2647 E1000_WRITE_REG(&adapter->hw, VET, ETHERTYPE_VLAN); 2648 2649 ctrl = E1000_READ_REG(&adapter->hw, CTRL); 2650 ctrl |= E1000_CTRL_VME; 2651 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl); 2652 2653 return; 2654 } 2655 2656 static void 2657 em_enable_intr(struct adapter * adapter) 2658 { 2659 E1000_WRITE_REG(&adapter->hw, IMS, (IMS_ENABLE_MASK)); 2660 return; 2661 } 2662 2663 static void 2664 em_disable_intr(struct adapter *adapter) 2665 { 2666 E1000_WRITE_REG(&adapter->hw, IMC, 2667 (0xffffffff & ~E1000_IMC_RXSEQ)); 2668 return; 2669 } 2670 2671 static int 2672 em_is_valid_ether_addr(u_int8_t *addr) 2673 { 2674 char zero_addr[6] = { 0, 0, 0, 0, 0, 0 }; 2675 2676 if ((addr[0] & 1) || (!bcmp(addr, zero_addr, ETHER_ADDR_LEN))) { 2677 return (FALSE); 2678 } 2679 2680 return(TRUE); 2681 } 2682 2683 void 2684 em_write_pci_cfg(struct em_hw *hw, 2685 uint32_t reg, 2686 uint16_t *value) 2687 { 2688 pci_write_config(((struct em_osdep *)hw->back)->dev, reg, 2689 *value, 2); 2690 } 2691 2692 void 2693 em_read_pci_cfg(struct em_hw *hw, uint32_t reg, 2694 uint16_t *value) 2695 { 2696 *value = pci_read_config(((struct em_osdep *)hw->back)->dev, 2697 reg, 2); 2698 return; 2699 } 2700 2701 void 2702 em_pci_set_mwi(struct em_hw *hw) 2703 { 2704 pci_write_config(((struct em_osdep *)hw->back)->dev, 2705 PCIR_COMMAND, 2706 (hw->pci_cmd_word | CMD_MEM_WRT_INVALIDATE), 2); 2707 return; 2708 } 2709 2710 void 2711 em_pci_clear_mwi(struct em_hw *hw) 2712 { 2713 pci_write_config(((struct em_osdep *)hw->back)->dev, 2714 PCIR_COMMAND, 2715 (hw->pci_cmd_word & ~CMD_MEM_WRT_INVALIDATE), 2); 2716 return; 2717 } 2718 2719 uint32_t 2720 em_io_read(struct em_hw *hw, uint32_t port) 2721 { 2722 return(inl(port)); 2723 } 2724 2725 void 2726 em_io_write(struct em_hw *hw, uint32_t port, uint32_t value) 2727 { 2728 outl(port, value); 2729 return; 2730 } 2731 2732 /********************************************************************* 2733 * 82544 Coexistence issue workaround. 2734 * There are 2 issues. 2735 * 1. Transmit Hang issue. 2736 * To detect this issue, following equation can be used... 2737 * SIZE[3:0] + ADDR[2:0] = SUM[3:0]. 2738 * If SUM[3:0] is in between 1 to 4, we will have this issue. 2739 * 2740 * 2. DAC issue. 2741 * To detect this issue, following equation can be used... 2742 * SIZE[3:0] + ADDR[2:0] = SUM[3:0]. 2743 * If SUM[3:0] is in between 9 to c, we will have this issue. 2744 * 2745 * 2746 * WORKAROUND: 2747 * Make sure we do not have ending address as 1,2,3,4(Hang) or 9,a,b,c (DAC) 2748 * 2749 *************************************************************************/ 2750 static u_int32_t 2751 em_fill_descriptors (u_int64_t address, 2752 u_int32_t length, 2753 PDESC_ARRAY desc_array) 2754 { 2755 /* Since issue is sensitive to length and address.*/ 2756 /* Let us first check the address...*/ 2757 u_int32_t safe_terminator; 2758 if (length <= 4) { 2759 desc_array->descriptor[0].address = address; 2760 desc_array->descriptor[0].length = length; 2761 desc_array->elements = 1; 2762 return desc_array->elements; 2763 } 2764 safe_terminator = (u_int32_t)((((u_int32_t)address & 0x7) + (length & 0xF)) & 0xF); 2765 /* if it does not fall between 0x1 to 0x4 and 0x9 to 0xC then return */ 2766 if (safe_terminator == 0 || 2767 (safe_terminator > 4 && 2768 safe_terminator < 9) || 2769 (safe_terminator > 0xC && 2770 safe_terminator <= 0xF)) { 2771 desc_array->descriptor[0].address = address; 2772 desc_array->descriptor[0].length = length; 2773 desc_array->elements = 1; 2774 return desc_array->elements; 2775 } 2776 2777 desc_array->descriptor[0].address = address; 2778 desc_array->descriptor[0].length = length - 4; 2779 desc_array->descriptor[1].address = address + (length - 4); 2780 desc_array->descriptor[1].length = 4; 2781 desc_array->elements = 2; 2782 return desc_array->elements; 2783 } 2784 2785 2786 2787 2788 /********************************************************************** 2789 * 2790 * Update the board statistics counters. 2791 * 2792 **********************************************************************/ 2793 static void 2794 em_update_stats_counters(struct adapter *adapter) 2795 { 2796 struct ifnet *ifp; 2797 2798 if(adapter->hw.media_type == em_media_type_copper || 2799 (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU)) { 2800 adapter->stats.symerrs += E1000_READ_REG(&adapter->hw, SYMERRS); 2801 adapter->stats.sec += E1000_READ_REG(&adapter->hw, SEC); 2802 } 2803 adapter->stats.crcerrs += E1000_READ_REG(&adapter->hw, CRCERRS); 2804 adapter->stats.mpc += E1000_READ_REG(&adapter->hw, MPC); 2805 adapter->stats.scc += E1000_READ_REG(&adapter->hw, SCC); 2806 adapter->stats.ecol += E1000_READ_REG(&adapter->hw, ECOL); 2807 2808 adapter->stats.mcc += E1000_READ_REG(&adapter->hw, MCC); 2809 adapter->stats.latecol += E1000_READ_REG(&adapter->hw, LATECOL); 2810 adapter->stats.colc += E1000_READ_REG(&adapter->hw, COLC); 2811 adapter->stats.dc += E1000_READ_REG(&adapter->hw, DC); 2812 adapter->stats.rlec += E1000_READ_REG(&adapter->hw, RLEC); 2813 adapter->stats.xonrxc += E1000_READ_REG(&adapter->hw, XONRXC); 2814 adapter->stats.xontxc += E1000_READ_REG(&adapter->hw, XONTXC); 2815 adapter->stats.xoffrxc += E1000_READ_REG(&adapter->hw, XOFFRXC); 2816 adapter->stats.xofftxc += E1000_READ_REG(&adapter->hw, XOFFTXC); 2817 adapter->stats.fcruc += E1000_READ_REG(&adapter->hw, FCRUC); 2818 adapter->stats.prc64 += E1000_READ_REG(&adapter->hw, PRC64); 2819 adapter->stats.prc127 += E1000_READ_REG(&adapter->hw, PRC127); 2820 adapter->stats.prc255 += E1000_READ_REG(&adapter->hw, PRC255); 2821 adapter->stats.prc511 += E1000_READ_REG(&adapter->hw, PRC511); 2822 adapter->stats.prc1023 += E1000_READ_REG(&adapter->hw, PRC1023); 2823 adapter->stats.prc1522 += E1000_READ_REG(&adapter->hw, PRC1522); 2824 adapter->stats.gprc += E1000_READ_REG(&adapter->hw, GPRC); 2825 adapter->stats.bprc += E1000_READ_REG(&adapter->hw, BPRC); 2826 adapter->stats.mprc += E1000_READ_REG(&adapter->hw, MPRC); 2827 adapter->stats.gptc += E1000_READ_REG(&adapter->hw, GPTC); 2828 2829 /* For the 64-bit byte counters the low dword must be read first. */ 2830 /* Both registers clear on the read of the high dword */ 2831 2832 adapter->stats.gorcl += E1000_READ_REG(&adapter->hw, GORCL); 2833 adapter->stats.gorch += E1000_READ_REG(&adapter->hw, GORCH); 2834 adapter->stats.gotcl += E1000_READ_REG(&adapter->hw, GOTCL); 2835 adapter->stats.gotch += E1000_READ_REG(&adapter->hw, GOTCH); 2836 2837 adapter->stats.rnbc += E1000_READ_REG(&adapter->hw, RNBC); 2838 adapter->stats.ruc += E1000_READ_REG(&adapter->hw, RUC); 2839 adapter->stats.rfc += E1000_READ_REG(&adapter->hw, RFC); 2840 adapter->stats.roc += E1000_READ_REG(&adapter->hw, ROC); 2841 adapter->stats.rjc += E1000_READ_REG(&adapter->hw, RJC); 2842 2843 adapter->stats.torl += E1000_READ_REG(&adapter->hw, TORL); 2844 adapter->stats.torh += E1000_READ_REG(&adapter->hw, TORH); 2845 adapter->stats.totl += E1000_READ_REG(&adapter->hw, TOTL); 2846 adapter->stats.toth += E1000_READ_REG(&adapter->hw, TOTH); 2847 2848 adapter->stats.tpr += E1000_READ_REG(&adapter->hw, TPR); 2849 adapter->stats.tpt += E1000_READ_REG(&adapter->hw, TPT); 2850 adapter->stats.ptc64 += E1000_READ_REG(&adapter->hw, PTC64); 2851 adapter->stats.ptc127 += E1000_READ_REG(&adapter->hw, PTC127); 2852 adapter->stats.ptc255 += E1000_READ_REG(&adapter->hw, PTC255); 2853 adapter->stats.ptc511 += E1000_READ_REG(&adapter->hw, PTC511); 2854 adapter->stats.ptc1023 += E1000_READ_REG(&adapter->hw, PTC1023); 2855 adapter->stats.ptc1522 += E1000_READ_REG(&adapter->hw, PTC1522); 2856 adapter->stats.mptc += E1000_READ_REG(&adapter->hw, MPTC); 2857 adapter->stats.bptc += E1000_READ_REG(&adapter->hw, BPTC); 2858 2859 if (adapter->hw.mac_type >= em_82543) { 2860 adapter->stats.algnerrc += 2861 E1000_READ_REG(&adapter->hw, ALGNERRC); 2862 adapter->stats.rxerrc += 2863 E1000_READ_REG(&adapter->hw, RXERRC); 2864 adapter->stats.tncrs += 2865 E1000_READ_REG(&adapter->hw, TNCRS); 2866 adapter->stats.cexterr += 2867 E1000_READ_REG(&adapter->hw, CEXTERR); 2868 adapter->stats.tsctc += 2869 E1000_READ_REG(&adapter->hw, TSCTC); 2870 adapter->stats.tsctfc += 2871 E1000_READ_REG(&adapter->hw, TSCTFC); 2872 } 2873 ifp = &adapter->interface_data.ac_if; 2874 2875 /* Fill out the OS statistics structure */ 2876 ifp->if_ibytes = adapter->stats.gorcl; 2877 ifp->if_obytes = adapter->stats.gotcl; 2878 ifp->if_imcasts = adapter->stats.mprc; 2879 ifp->if_collisions = adapter->stats.colc; 2880 2881 /* Rx Errors */ 2882 ifp->if_ierrors = 2883 adapter->dropped_pkts + 2884 adapter->stats.rxerrc + 2885 adapter->stats.crcerrs + 2886 adapter->stats.algnerrc + 2887 adapter->stats.rlec + adapter->stats.rnbc + 2888 adapter->stats.mpc + adapter->stats.cexterr; 2889 2890 /* Tx Errors */ 2891 ifp->if_oerrors = adapter->stats.ecol + adapter->stats.latecol; 2892 2893 } 2894 2895 2896 /********************************************************************** 2897 * 2898 * This routine is called only when em_display_debug_stats is enabled. 2899 * This routine provides a way to take a look at important statistics 2900 * maintained by the driver and hardware. 2901 * 2902 **********************************************************************/ 2903 static void 2904 em_print_debug_info(struct adapter *adapter) 2905 { 2906 int unit = adapter->unit; 2907 uint8_t *hw_addr = adapter->hw.hw_addr; 2908 2909 printf("em%d: Adapter hardware address = %p \n", unit, hw_addr); 2910 printf("em%d:tx_int_delay = %d, tx_abs_int_delay = %d\n", unit, 2911 E1000_READ_REG(&adapter->hw, TIDV), 2912 E1000_READ_REG(&adapter->hw, TADV)); 2913 printf("em%d:rx_int_delay = %d, rx_abs_int_delay = %d\n", unit, 2914 E1000_READ_REG(&adapter->hw, RDTR), 2915 E1000_READ_REG(&adapter->hw, RADV)); 2916 #ifdef DBG_STATS 2917 printf("em%d: Packets not Avail = %ld\n", unit, 2918 adapter->no_pkts_avail); 2919 printf("em%d: CleanTxInterrupts = %ld\n", unit, 2920 adapter->clean_tx_interrupts); 2921 #endif 2922 printf("em%d: fifo workaround = %lld, fifo_reset = %lld\n", unit, 2923 (long long)adapter->tx_fifo_wrk, 2924 (long long)adapter->tx_fifo_reset); 2925 printf("em%d: hw tdh = %d, hw tdt = %d\n", unit, 2926 E1000_READ_REG(&adapter->hw, TDH), 2927 E1000_READ_REG(&adapter->hw, TDT)); 2928 printf("em%d: Num Tx descriptors avail = %d\n", unit, 2929 adapter->num_tx_desc_avail); 2930 printf("em%d: Tx Descriptors not avail1 = %ld\n", unit, 2931 adapter->no_tx_desc_avail1); 2932 printf("em%d: Tx Descriptors not avail2 = %ld\n", unit, 2933 adapter->no_tx_desc_avail2); 2934 printf("em%d: Std mbuf failed = %ld\n", unit, 2935 adapter->mbuf_alloc_failed); 2936 printf("em%d: Std mbuf cluster failed = %ld\n", unit, 2937 adapter->mbuf_cluster_failed); 2938 printf("em%d: Driver dropped packets = %ld\n", unit, 2939 adapter->dropped_pkts); 2940 2941 return; 2942 } 2943 2944 static void 2945 em_print_hw_stats(struct adapter *adapter) 2946 { 2947 int unit = adapter->unit; 2948 2949 printf("em%d: Excessive collisions = %lld\n", unit, 2950 (long long)adapter->stats.ecol); 2951 printf("em%d: Symbol errors = %lld\n", unit, 2952 (long long)adapter->stats.symerrs); 2953 printf("em%d: Sequence errors = %lld\n", unit, 2954 (long long)adapter->stats.sec); 2955 printf("em%d: Defer count = %lld\n", unit, 2956 (long long)adapter->stats.dc); 2957 2958 printf("em%d: Missed Packets = %lld\n", unit, 2959 (long long)adapter->stats.mpc); 2960 printf("em%d: Receive No Buffers = %lld\n", unit, 2961 (long long)adapter->stats.rnbc); 2962 printf("em%d: Receive length errors = %lld\n", unit, 2963 (long long)adapter->stats.rlec); 2964 printf("em%d: Receive errors = %lld\n", unit, 2965 (long long)adapter->stats.rxerrc); 2966 printf("em%d: Crc errors = %lld\n", unit, 2967 (long long)adapter->stats.crcerrs); 2968 printf("em%d: Alignment errors = %lld\n", unit, 2969 (long long)adapter->stats.algnerrc); 2970 printf("em%d: Carrier extension errors = %lld\n", unit, 2971 (long long)adapter->stats.cexterr); 2972 2973 printf("em%d: XON Rcvd = %lld\n", unit, 2974 (long long)adapter->stats.xonrxc); 2975 printf("em%d: XON Xmtd = %lld\n", unit, 2976 (long long)adapter->stats.xontxc); 2977 printf("em%d: XOFF Rcvd = %lld\n", unit, 2978 (long long)adapter->stats.xoffrxc); 2979 printf("em%d: XOFF Xmtd = %lld\n", unit, 2980 (long long)adapter->stats.xofftxc); 2981 2982 printf("em%d: Good Packets Rcvd = %lld\n", unit, 2983 (long long)adapter->stats.gprc); 2984 printf("em%d: Good Packets Xmtd = %lld\n", unit, 2985 (long long)adapter->stats.gptc); 2986 2987 return; 2988 } 2989 2990 static int 2991 em_sysctl_debug_info(SYSCTL_HANDLER_ARGS) 2992 { 2993 int error; 2994 int result; 2995 struct adapter *adapter; 2996 2997 result = -1; 2998 error = sysctl_handle_int(oidp, &result, 0, req); 2999 3000 if (error || !req->newptr) 3001 return (error); 3002 3003 if (result == 1) { 3004 adapter = (struct adapter *)arg1; 3005 em_print_debug_info(adapter); 3006 } 3007 3008 return error; 3009 } 3010 3011 3012 static int 3013 em_sysctl_stats(SYSCTL_HANDLER_ARGS) 3014 { 3015 int error; 3016 int result; 3017 struct adapter *adapter; 3018 3019 result = -1; 3020 error = sysctl_handle_int(oidp, &result, 0, req); 3021 3022 if (error || !req->newptr) 3023 return (error); 3024 3025 if (result == 1) { 3026 adapter = (struct adapter *)arg1; 3027 em_print_hw_stats(adapter); 3028 } 3029 3030 return error; 3031 } 3032 3033 static int 3034 em_sysctl_int_delay(SYSCTL_HANDLER_ARGS) 3035 { 3036 struct em_int_delay_info *info; 3037 struct adapter *adapter; 3038 u_int32_t regval; 3039 int error; 3040 int usecs; 3041 int ticks; 3042 int s; 3043 3044 info = (struct em_int_delay_info *)arg1; 3045 adapter = info->adapter; 3046 usecs = info->value; 3047 error = sysctl_handle_int(oidp, &usecs, 0, req); 3048 if (error != 0 || req->newptr == NULL) 3049 return error; 3050 if (usecs < 0 || usecs > E1000_TICKS_TO_USECS(65535)) 3051 return EINVAL; 3052 info->value = usecs; 3053 ticks = E1000_USECS_TO_TICKS(usecs); 3054 3055 s = splimp(); 3056 regval = E1000_READ_OFFSET(&adapter->hw, info->offset); 3057 regval = (regval & ~0xffff) | (ticks & 0xffff); 3058 /* Handle a few special cases. */ 3059 switch (info->offset) { 3060 case E1000_RDTR: 3061 case E1000_82542_RDTR: 3062 regval |= E1000_RDT_FPDB; 3063 break; 3064 case E1000_TIDV: 3065 case E1000_82542_TIDV: 3066 if (ticks == 0) { 3067 adapter->txd_cmd &= ~E1000_TXD_CMD_IDE; 3068 /* Don't write 0 into the TIDV register. */ 3069 regval++; 3070 } else 3071 adapter->txd_cmd |= E1000_TXD_CMD_IDE; 3072 break; 3073 } 3074 E1000_WRITE_OFFSET(&adapter->hw, info->offset, regval); 3075 splx(s); 3076 return 0; 3077 } 3078 3079 static void 3080 em_add_int_delay_sysctl(struct adapter *adapter, const char *name, 3081 const char *description, struct em_int_delay_info *info, 3082 int offset, int value) 3083 { 3084 info->adapter = adapter; 3085 info->offset = offset; 3086 info->value = value; 3087 SYSCTL_ADD_PROC(&adapter->sysctl_ctx, 3088 SYSCTL_CHILDREN(adapter->sysctl_tree), 3089 OID_AUTO, name, CTLTYPE_INT|CTLFLAG_RW, 3090 info, 0, em_sysctl_int_delay, "I", description); 3091 } 3092 3093