1 /************************************************************************** 2 3 Copyright (c) 2004 Joerg Sonnenberger <joerg@bec.de>. All rights reserved. 4 5 Copyright (c) 2001-2003, Intel Corporation 6 All rights reserved. 7 8 Redistribution and use in source and binary forms, with or without 9 modification, are permitted provided that the following conditions are met: 10 11 1. Redistributions of source code must retain the above copyright notice, 12 this list of conditions and the following disclaimer. 13 14 2. Redistributions in binary form must reproduce the above copyright 15 notice, this list of conditions and the following disclaimer in the 16 documentation and/or other materials provided with the distribution. 17 18 3. Neither the name of the Intel Corporation nor the names of its 19 contributors may be used to endorse or promote products derived from 20 this software without specific prior written permission. 21 22 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 23 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 25 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 26 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 27 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 28 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 29 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 30 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 31 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 32 POSSIBILITY OF SUCH DAMAGE. 33 34 ***************************************************************************/ 35 36 /*$FreeBSD: src/sys/dev/em/if_em.c,v 1.2.2.15 2003/06/09 22:10:15 pdeuskar Exp $*/ 37 /*$DragonFly: src/sys/dev/netif/em/if_em.c,v 1.41 2005/10/24 08:06:15 sephe Exp $*/ 38 39 #include "opt_polling.h" 40 41 #include <dev/netif/em/if_em.h> 42 #include <net/ifq_var.h> 43 44 /********************************************************************* 45 * Set this to one to display debug statistics 46 *********************************************************************/ 47 int em_display_debug_stats = 0; 48 49 /********************************************************************* 50 * Driver version 51 *********************************************************************/ 52 53 char em_driver_version[] = "1.7.35"; 54 55 56 /********************************************************************* 57 * PCI Device ID Table 58 * 59 * Used by probe to select devices to load on 60 * Last field stores an index into em_strings 61 * Last entry must be all 0s 62 * 63 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID, String Index } 64 *********************************************************************/ 65 66 static em_vendor_info_t em_vendor_info_array[] = 67 { 68 /* Intel(R) PRO/1000 Network Connection */ 69 { 0x8086, 0x1000, PCI_ANY_ID, PCI_ANY_ID, 0}, 70 { 0x8086, 0x1001, PCI_ANY_ID, PCI_ANY_ID, 0}, 71 { 0x8086, 0x1004, PCI_ANY_ID, PCI_ANY_ID, 0}, 72 { 0x8086, 0x1008, PCI_ANY_ID, PCI_ANY_ID, 0}, 73 { 0x8086, 0x1009, PCI_ANY_ID, PCI_ANY_ID, 0}, 74 { 0x8086, 0x100C, PCI_ANY_ID, PCI_ANY_ID, 0}, 75 { 0x8086, 0x100D, PCI_ANY_ID, PCI_ANY_ID, 0}, 76 { 0x8086, 0x100E, PCI_ANY_ID, PCI_ANY_ID, 0}, 77 { 0x8086, 0x100F, PCI_ANY_ID, PCI_ANY_ID, 0}, 78 { 0x8086, 0x1010, PCI_ANY_ID, PCI_ANY_ID, 0}, 79 { 0x8086, 0x1011, PCI_ANY_ID, PCI_ANY_ID, 0}, 80 { 0x8086, 0x1012, PCI_ANY_ID, PCI_ANY_ID, 0}, 81 { 0x8086, 0x1013, PCI_ANY_ID, PCI_ANY_ID, 0}, 82 { 0x8086, 0x1014, PCI_ANY_ID, PCI_ANY_ID, 0}, 83 { 0x8086, 0x1015, PCI_ANY_ID, PCI_ANY_ID, 0}, 84 { 0x8086, 0x1016, PCI_ANY_ID, PCI_ANY_ID, 0}, 85 { 0x8086, 0x1017, PCI_ANY_ID, PCI_ANY_ID, 0}, 86 { 0x8086, 0x1018, PCI_ANY_ID, PCI_ANY_ID, 0}, 87 { 0x8086, 0x1019, PCI_ANY_ID, PCI_ANY_ID, 0}, 88 { 0x8086, 0x101A, PCI_ANY_ID, PCI_ANY_ID, 0}, 89 { 0x8086, 0x101D, PCI_ANY_ID, PCI_ANY_ID, 0}, 90 { 0x8086, 0x101E, PCI_ANY_ID, PCI_ANY_ID, 0}, 91 { 0x8086, 0x1026, PCI_ANY_ID, PCI_ANY_ID, 0}, 92 { 0x8086, 0x1027, PCI_ANY_ID, PCI_ANY_ID, 0}, 93 { 0x8086, 0x1028, PCI_ANY_ID, PCI_ANY_ID, 0}, 94 { 0x8086, 0x1075, PCI_ANY_ID, PCI_ANY_ID, 0}, 95 { 0x8086, 0x1076, PCI_ANY_ID, PCI_ANY_ID, 0}, 96 { 0x8086, 0x1077, PCI_ANY_ID, PCI_ANY_ID, 0}, 97 { 0x8086, 0x1078, PCI_ANY_ID, PCI_ANY_ID, 0}, 98 { 0x8086, 0x1079, PCI_ANY_ID, PCI_ANY_ID, 0}, 99 { 0x8086, 0x107A, PCI_ANY_ID, PCI_ANY_ID, 0}, 100 { 0x8086, 0x107B, PCI_ANY_ID, PCI_ANY_ID, 0}, 101 { 0x8086, 0x107C, PCI_ANY_ID, PCI_ANY_ID, 0}, 102 { 0x8086, 0x108A, PCI_ANY_ID, PCI_ANY_ID, 0}, 103 /* required last entry */ 104 { 0, 0, 0, 0, 0} 105 }; 106 107 /********************************************************************* 108 * Table of branding strings for all supported NICs. 109 *********************************************************************/ 110 111 static const char *em_strings[] = { 112 "Intel(R) PRO/1000 Network Connection" 113 }; 114 115 /********************************************************************* 116 * Function prototypes 117 *********************************************************************/ 118 static int em_probe(device_t); 119 static int em_attach(device_t); 120 static int em_detach(device_t); 121 static int em_shutdown(device_t); 122 static void em_intr(void *); 123 static void em_start(struct ifnet *); 124 static void em_start_serialized(struct ifnet *); 125 static int em_ioctl(struct ifnet *, u_long, caddr_t, struct ucred *); 126 static void em_watchdog(struct ifnet *); 127 static void em_init(void *); 128 static void em_init_serialized(void *); 129 static void em_stop(void *); 130 static void em_media_status(struct ifnet *, struct ifmediareq *); 131 static int em_media_change(struct ifnet *); 132 static void em_identify_hardware(struct adapter *); 133 static void em_local_timer(void *); 134 static int em_hardware_init(struct adapter *); 135 static void em_setup_interface(device_t, struct adapter *); 136 static int em_setup_transmit_structures(struct adapter *); 137 static void em_initialize_transmit_unit(struct adapter *); 138 static int em_setup_receive_structures(struct adapter *); 139 static void em_initialize_receive_unit(struct adapter *); 140 static void em_enable_intr(struct adapter *); 141 static void em_disable_intr(struct adapter *); 142 static void em_free_transmit_structures(struct adapter *); 143 static void em_free_receive_structures(struct adapter *); 144 static void em_update_stats_counters(struct adapter *); 145 static void em_clean_transmit_interrupts(struct adapter *); 146 static int em_allocate_receive_structures(struct adapter *); 147 static int em_allocate_transmit_structures(struct adapter *); 148 static void em_process_receive_interrupts(struct adapter *, int); 149 static void em_receive_checksum(struct adapter *, struct em_rx_desc *, 150 struct mbuf *); 151 static void em_transmit_checksum_setup(struct adapter *, struct mbuf *, 152 uint32_t *, uint32_t *); 153 static void em_set_promisc(struct adapter *); 154 static void em_disable_promisc(struct adapter *); 155 static void em_set_multi(struct adapter *); 156 static void em_print_hw_stats(struct adapter *); 157 static void em_print_link_status(struct adapter *); 158 static int em_get_buf(int i, struct adapter *, struct mbuf *, int how); 159 static void em_enable_vlans(struct adapter *); 160 static int em_encap(struct adapter *, struct mbuf *); 161 static void em_smartspeed(struct adapter *); 162 static int em_82547_fifo_workaround(struct adapter *, int); 163 static void em_82547_update_fifo_head(struct adapter *, int); 164 static int em_82547_tx_fifo_reset(struct adapter *); 165 static void em_82547_move_tail(void *arg); 166 static void em_82547_move_tail_serialized(void *arg); 167 static int em_dma_malloc(struct adapter *, bus_size_t, 168 struct em_dma_alloc *, int); 169 static void em_dma_free(struct adapter *, struct em_dma_alloc *); 170 static void em_print_debug_info(struct adapter *); 171 static int em_is_valid_ether_addr(uint8_t *); 172 static int em_sysctl_stats(SYSCTL_HANDLER_ARGS); 173 static int em_sysctl_debug_info(SYSCTL_HANDLER_ARGS); 174 static uint32_t em_fill_descriptors(uint64_t address, uint32_t length, 175 PDESC_ARRAY desc_array); 176 static int em_sysctl_int_delay(SYSCTL_HANDLER_ARGS); 177 static int em_sysctl_int_throttle(SYSCTL_HANDLER_ARGS); 178 static void em_add_int_delay_sysctl(struct adapter *, const char *, 179 const char *, 180 struct em_int_delay_info *, int, int); 181 182 /********************************************************************* 183 * FreeBSD Device Interface Entry Points 184 *********************************************************************/ 185 186 static device_method_t em_methods[] = { 187 /* Device interface */ 188 DEVMETHOD(device_probe, em_probe), 189 DEVMETHOD(device_attach, em_attach), 190 DEVMETHOD(device_detach, em_detach), 191 DEVMETHOD(device_shutdown, em_shutdown), 192 {0, 0} 193 }; 194 195 static driver_t em_driver = { 196 "em", em_methods, sizeof(struct adapter), 197 }; 198 199 static devclass_t em_devclass; 200 201 DECLARE_DUMMY_MODULE(if_em); 202 DRIVER_MODULE(if_em, pci, em_driver, em_devclass, 0, 0); 203 204 /********************************************************************* 205 * Tunable default values. 206 *********************************************************************/ 207 208 #define E1000_TICKS_TO_USECS(ticks) ((1024 * (ticks) + 500) / 1000) 209 #define E1000_USECS_TO_TICKS(usecs) ((1000 * (usecs) + 512) / 1024) 210 211 static int em_tx_int_delay_dflt = E1000_TICKS_TO_USECS(EM_TIDV); 212 static int em_rx_int_delay_dflt = E1000_TICKS_TO_USECS(EM_RDTR); 213 static int em_tx_abs_int_delay_dflt = E1000_TICKS_TO_USECS(EM_TADV); 214 static int em_rx_abs_int_delay_dflt = E1000_TICKS_TO_USECS(EM_RADV); 215 static int em_int_throttle_ceil = 10000; 216 217 TUNABLE_INT("hw.em.tx_int_delay", &em_tx_int_delay_dflt); 218 TUNABLE_INT("hw.em.rx_int_delay", &em_rx_int_delay_dflt); 219 TUNABLE_INT("hw.em.tx_abs_int_delay", &em_tx_abs_int_delay_dflt); 220 TUNABLE_INT("hw.em.rx_abs_int_delay", &em_rx_abs_int_delay_dflt); 221 TUNABLE_INT("hw.em.int_throttle_ceil", &em_int_throttle_ceil); 222 223 /********************************************************************* 224 * Device identification routine 225 * 226 * em_probe determines if the driver should be loaded on 227 * adapter based on PCI vendor/device id of the adapter. 228 * 229 * return 0 on success, positive on failure 230 *********************************************************************/ 231 232 static int 233 em_probe(device_t dev) 234 { 235 em_vendor_info_t *ent; 236 237 uint16_t pci_vendor_id = 0; 238 uint16_t pci_device_id = 0; 239 uint16_t pci_subvendor_id = 0; 240 uint16_t pci_subdevice_id = 0; 241 char adapter_name[60]; 242 243 INIT_DEBUGOUT("em_probe: begin"); 244 245 pci_vendor_id = pci_get_vendor(dev); 246 if (pci_vendor_id != EM_VENDOR_ID) 247 return(ENXIO); 248 249 pci_device_id = pci_get_device(dev); 250 pci_subvendor_id = pci_get_subvendor(dev); 251 pci_subdevice_id = pci_get_subdevice(dev); 252 253 ent = em_vendor_info_array; 254 while (ent->vendor_id != 0) { 255 if ((pci_vendor_id == ent->vendor_id) && 256 (pci_device_id == ent->device_id) && 257 258 ((pci_subvendor_id == ent->subvendor_id) || 259 (ent->subvendor_id == PCI_ANY_ID)) && 260 261 ((pci_subdevice_id == ent->subdevice_id) || 262 (ent->subdevice_id == PCI_ANY_ID))) { 263 snprintf(adapter_name, sizeof(adapter_name), 264 "%s, Version - %s", em_strings[ent->index], 265 em_driver_version); 266 device_set_desc_copy(dev, adapter_name); 267 return(0); 268 } 269 ent++; 270 } 271 272 return(ENXIO); 273 } 274 275 /********************************************************************* 276 * Device initialization routine 277 * 278 * The attach entry point is called when the driver is being loaded. 279 * This routine identifies the type of hardware, allocates all resources 280 * and initializes the hardware. 281 * 282 * return 0 on success, positive on failure 283 *********************************************************************/ 284 285 static int 286 em_attach(device_t dev) 287 { 288 struct adapter *adapter; 289 int tsize, rsize; 290 int i, val, rid; 291 int error = 0; 292 293 INIT_DEBUGOUT("em_attach: begin"); 294 295 adapter = device_get_softc(dev); 296 297 lwkt_serialize_init(&adapter->serializer); 298 299 callout_init(&adapter->timer); 300 callout_init(&adapter->tx_fifo_timer); 301 302 adapter->dev = dev; 303 adapter->osdep.dev = dev; 304 305 /* SYSCTL stuff */ 306 sysctl_ctx_init(&adapter->sysctl_ctx); 307 adapter->sysctl_tree = SYSCTL_ADD_NODE(&adapter->sysctl_ctx, 308 SYSCTL_STATIC_CHILDREN(_hw), 309 OID_AUTO, 310 device_get_nameunit(dev), 311 CTLFLAG_RD, 312 0, ""); 313 314 if (adapter->sysctl_tree == NULL) { 315 error = EIO; 316 goto fail; 317 } 318 319 SYSCTL_ADD_PROC(&adapter->sysctl_ctx, 320 SYSCTL_CHILDREN(adapter->sysctl_tree), 321 OID_AUTO, "debug_info", CTLTYPE_INT|CTLFLAG_RW, 322 (void *)adapter, 0, 323 em_sysctl_debug_info, "I", "Debug Information"); 324 325 SYSCTL_ADD_PROC(&adapter->sysctl_ctx, 326 SYSCTL_CHILDREN(adapter->sysctl_tree), 327 OID_AUTO, "stats", CTLTYPE_INT|CTLFLAG_RW, 328 (void *)adapter, 0, 329 em_sysctl_stats, "I", "Statistics"); 330 331 /* Determine hardware revision */ 332 em_identify_hardware(adapter); 333 334 /* Set up some sysctls for the tunable interrupt delays */ 335 em_add_int_delay_sysctl(adapter, "rx_int_delay", 336 "receive interrupt delay in usecs", 337 &adapter->rx_int_delay, 338 E1000_REG_OFFSET(&adapter->hw, RDTR), 339 em_rx_int_delay_dflt); 340 em_add_int_delay_sysctl(adapter, "tx_int_delay", 341 "transmit interrupt delay in usecs", 342 &adapter->tx_int_delay, 343 E1000_REG_OFFSET(&adapter->hw, TIDV), 344 em_tx_int_delay_dflt); 345 if (adapter->hw.mac_type >= em_82540) { 346 em_add_int_delay_sysctl(adapter, "rx_abs_int_delay", 347 "receive interrupt delay limit in usecs", 348 &adapter->rx_abs_int_delay, 349 E1000_REG_OFFSET(&adapter->hw, RADV), 350 em_rx_abs_int_delay_dflt); 351 em_add_int_delay_sysctl(adapter, "tx_abs_int_delay", 352 "transmit interrupt delay limit in usecs", 353 &adapter->tx_abs_int_delay, 354 E1000_REG_OFFSET(&adapter->hw, TADV), 355 em_tx_abs_int_delay_dflt); 356 SYSCTL_ADD_PROC(&adapter->sysctl_ctx, 357 SYSCTL_CHILDREN(adapter->sysctl_tree), 358 OID_AUTO, "int_throttle_ceil", CTLTYPE_INT|CTLFLAG_RW, 359 adapter, 0, em_sysctl_int_throttle, "I", NULL); 360 } 361 362 /* Parameters (to be read from user) */ 363 adapter->num_tx_desc = EM_MAX_TXD; 364 adapter->num_rx_desc = EM_MAX_RXD; 365 adapter->hw.autoneg = DO_AUTO_NEG; 366 adapter->hw.wait_autoneg_complete = WAIT_FOR_AUTO_NEG_DEFAULT; 367 adapter->hw.autoneg_advertised = AUTONEG_ADV_DEFAULT; 368 adapter->hw.tbi_compatibility_en = TRUE; 369 adapter->rx_buffer_len = EM_RXBUFFER_2048; 370 371 /* 372 * These parameters control the automatic generation(Tx) and 373 * response(Rx) to Ethernet PAUSE frames. 374 */ 375 adapter->hw.fc_high_water = FC_DEFAULT_HI_THRESH; 376 adapter->hw.fc_low_water = FC_DEFAULT_LO_THRESH; 377 adapter->hw.fc_pause_time = FC_DEFAULT_TX_TIMER; 378 adapter->hw.fc_send_xon = TRUE; 379 adapter->hw.fc = em_fc_full; 380 381 adapter->hw.phy_init_script = 1; 382 adapter->hw.phy_reset_disable = FALSE; 383 384 #ifndef EM_MASTER_SLAVE 385 adapter->hw.master_slave = em_ms_hw_default; 386 #else 387 adapter->hw.master_slave = EM_MASTER_SLAVE; 388 #endif 389 390 /* 391 * Set the max frame size assuming standard ethernet 392 * sized frames 393 */ 394 adapter->hw.max_frame_size = ETHERMTU + ETHER_HDR_LEN + ETHER_CRC_LEN; 395 396 adapter->hw.min_frame_size = 397 MINIMUM_ETHERNET_PACKET_SIZE + ETHER_CRC_LEN; 398 399 /* 400 * This controls when hardware reports transmit completion 401 * status. 402 */ 403 adapter->hw.report_tx_early = 1; 404 405 rid = EM_MMBA; 406 adapter->res_memory = bus_alloc_resource_any(dev, SYS_RES_MEMORY, 407 &rid, RF_ACTIVE); 408 if (!(adapter->res_memory)) { 409 device_printf(dev, "Unable to allocate bus resource: memory\n"); 410 error = ENXIO; 411 goto fail; 412 } 413 adapter->osdep.mem_bus_space_tag = 414 rman_get_bustag(adapter->res_memory); 415 adapter->osdep.mem_bus_space_handle = 416 rman_get_bushandle(adapter->res_memory); 417 adapter->hw.hw_addr = (uint8_t *)&adapter->osdep.mem_bus_space_handle; 418 419 if (adapter->hw.mac_type > em_82543) { 420 /* Figure our where our IO BAR is ? */ 421 rid = EM_MMBA; 422 for (i = 0; i < 5; i++) { 423 val = pci_read_config(dev, rid, 4); 424 if (val & 0x00000001) { 425 adapter->io_rid = rid; 426 break; 427 } 428 rid += 4; 429 } 430 431 adapter->res_ioport = bus_alloc_resource_any(dev, 432 SYS_RES_IOPORT, &adapter->io_rid, RF_ACTIVE); 433 if (!(adapter->res_ioport)) { 434 device_printf(dev, "Unable to allocate bus resource: ioport\n"); 435 error = ENXIO; 436 goto fail; 437 } 438 439 adapter->hw.reg_io_tag = rman_get_bustag(adapter->res_ioport); 440 adapter->hw.reg_io_handle = rman_get_bushandle(adapter->res_ioport); 441 } 442 443 rid = 0x0; 444 adapter->res_interrupt = bus_alloc_resource_any(dev, SYS_RES_IRQ, 445 &rid, RF_SHAREABLE | RF_ACTIVE); 446 if (!(adapter->res_interrupt)) { 447 device_printf(dev, "Unable to allocate bus resource: interrupt\n"); 448 error = ENXIO; 449 goto fail; 450 } 451 452 adapter->hw.back = &adapter->osdep; 453 454 /* Initialize eeprom parameters */ 455 em_init_eeprom_params(&adapter->hw); 456 457 tsize = adapter->num_tx_desc * sizeof(struct em_tx_desc); 458 459 /* Allocate Transmit Descriptor ring */ 460 if (em_dma_malloc(adapter, tsize, &adapter->txdma, BUS_DMA_WAITOK)) { 461 device_printf(dev, "Unable to allocate TxDescriptor memory\n"); 462 error = ENOMEM; 463 goto fail; 464 } 465 adapter->tx_desc_base = (struct em_tx_desc *) adapter->txdma.dma_vaddr; 466 467 rsize = adapter->num_rx_desc * sizeof(struct em_rx_desc); 468 469 /* Allocate Receive Descriptor ring */ 470 if (em_dma_malloc(adapter, rsize, &adapter->rxdma, BUS_DMA_WAITOK)) { 471 device_printf(dev, "Unable to allocate rx_desc memory\n"); 472 error = ENOMEM; 473 goto fail; 474 } 475 adapter->rx_desc_base = (struct em_rx_desc *) adapter->rxdma.dma_vaddr; 476 477 /* Initialize the hardware */ 478 if (em_hardware_init(adapter)) { 479 device_printf(dev, "Unable to initialize the hardware\n"); 480 error = EIO; 481 goto fail; 482 } 483 484 /* Copy the permanent MAC address out of the EEPROM */ 485 if (em_read_mac_addr(&adapter->hw) < 0) { 486 device_printf(dev, "EEPROM read error while reading mac address\n"); 487 error = EIO; 488 goto fail; 489 } 490 491 if (!em_is_valid_ether_addr(adapter->hw.mac_addr)) { 492 device_printf(dev, "Invalid mac address\n"); 493 error = EIO; 494 goto fail; 495 } 496 497 /* Setup OS specific network interface */ 498 em_setup_interface(dev, adapter); 499 500 /* Initialize statistics */ 501 em_clear_hw_cntrs(&adapter->hw); 502 em_update_stats_counters(adapter); 503 adapter->hw.get_link_status = 1; 504 em_check_for_link(&adapter->hw); 505 506 /* Print the link status */ 507 if (adapter->link_active == 1) { 508 em_get_speed_and_duplex(&adapter->hw, &adapter->link_speed, 509 &adapter->link_duplex); 510 device_printf(dev, "Speed: %d Mbps, Duplex: %s\n", 511 adapter->link_speed, 512 adapter->link_duplex == FULL_DUPLEX ? "Full" : "Half"); 513 } else 514 device_printf(dev, "Speed: N/A, Duplex:N/A\n"); 515 516 /* Identify 82544 on PCIX */ 517 em_get_bus_info(&adapter->hw); 518 if (adapter->hw.bus_type == em_bus_type_pcix && 519 adapter->hw.mac_type == em_82544) 520 adapter->pcix_82544 = TRUE; 521 else 522 adapter->pcix_82544 = FALSE; 523 524 error = bus_setup_intr(dev, adapter->res_interrupt, 0, 525 (void (*)(void *)) em_intr, adapter, 526 &adapter->int_handler_tag, &adapter->serializer); 527 if (error) { 528 device_printf(dev, "Error registering interrupt handler!\n"); 529 ether_ifdetach(&adapter->interface_data.ac_if); 530 goto fail; 531 } 532 533 INIT_DEBUGOUT("em_attach: end"); 534 return(0); 535 536 fail: 537 em_detach(dev); 538 return(error); 539 } 540 541 /********************************************************************* 542 * Device removal routine 543 * 544 * The detach entry point is called when the driver is being removed. 545 * This routine stops the adapter and deallocates all the resources 546 * that were allocated for driver operation. 547 * 548 * return 0 on success, positive on failure 549 *********************************************************************/ 550 551 static int 552 em_detach(device_t dev) 553 { 554 struct adapter * adapter = device_get_softc(dev); 555 556 INIT_DEBUGOUT("em_detach: begin"); 557 558 lwkt_serialize_enter(&adapter->serializer); 559 adapter->in_detach = 1; 560 561 if (device_is_attached(dev)) { 562 em_stop(adapter); 563 em_phy_hw_reset(&adapter->hw); 564 ether_ifdetach(&adapter->interface_data.ac_if); 565 } 566 bus_generic_detach(dev); 567 568 if (adapter->res_interrupt != NULL) { 569 bus_teardown_intr(dev, adapter->res_interrupt, 570 adapter->int_handler_tag); 571 bus_release_resource(dev, SYS_RES_IRQ, 0, 572 adapter->res_interrupt); 573 } 574 if (adapter->res_memory != NULL) { 575 bus_release_resource(dev, SYS_RES_MEMORY, EM_MMBA, 576 adapter->res_memory); 577 } 578 579 if (adapter->res_ioport != NULL) { 580 bus_release_resource(dev, SYS_RES_IOPORT, adapter->io_rid, 581 adapter->res_ioport); 582 } 583 584 /* Free Transmit Descriptor ring */ 585 if (adapter->tx_desc_base != NULL) { 586 em_dma_free(adapter, &adapter->txdma); 587 adapter->tx_desc_base = NULL; 588 } 589 590 /* Free Receive Descriptor ring */ 591 if (adapter->rx_desc_base != NULL) { 592 em_dma_free(adapter, &adapter->rxdma); 593 adapter->rx_desc_base = NULL; 594 } 595 596 adapter->sysctl_tree = NULL; 597 sysctl_ctx_free(&adapter->sysctl_ctx); 598 599 lwkt_serialize_exit(&adapter->serializer); 600 return(0); 601 } 602 603 /********************************************************************* 604 * 605 * Shutdown entry point 606 * 607 **********************************************************************/ 608 609 static int 610 em_shutdown(device_t dev) 611 { 612 struct adapter *adapter = device_get_softc(dev); 613 em_stop(adapter); 614 return(0); 615 } 616 617 /********************************************************************* 618 * Transmit entry point 619 * 620 * em_start is called by the stack to initiate a transmit. 621 * The driver will remain in this routine as long as there are 622 * packets to transmit and transmit resources are available. 623 * In case resources are not available stack is notified and 624 * the packet is requeued. 625 **********************************************************************/ 626 627 static void 628 em_start(struct ifnet *ifp) 629 { 630 struct adapter *adapter = ifp->if_softc; 631 632 lwkt_serialize_enter(&adapter->serializer); 633 em_start_serialized(ifp); 634 lwkt_serialize_exit(&adapter->serializer); 635 } 636 637 static void 638 em_start_serialized(struct ifnet *ifp) 639 { 640 struct mbuf *m_head; 641 struct adapter *adapter = ifp->if_softc; 642 643 if (!adapter->link_active) 644 return; 645 while (!ifq_is_empty(&ifp->if_snd)) { 646 m_head = ifq_poll(&ifp->if_snd); 647 648 if (m_head == NULL) 649 break; 650 651 if (em_encap(adapter, m_head)) { 652 ifp->if_flags |= IFF_OACTIVE; 653 break; 654 } 655 m_head = ifq_dequeue(&ifp->if_snd); 656 657 /* Send a copy of the frame to the BPF listener */ 658 BPF_MTAP(ifp, m_head); 659 660 /* Set timeout in case hardware has problems transmitting */ 661 ifp->if_timer = EM_TX_TIMEOUT; 662 } 663 } 664 665 /********************************************************************* 666 * Ioctl entry point 667 * 668 * em_ioctl is called when the user wants to configure the 669 * interface. 670 * 671 * return 0 on success, positive on failure 672 **********************************************************************/ 673 674 static int 675 em_ioctl(struct ifnet *ifp, u_long command, caddr_t data, struct ucred *cr) 676 { 677 int mask, error = 0; 678 struct ifreq *ifr = (struct ifreq *) data; 679 struct adapter *adapter = ifp->if_softc; 680 681 lwkt_serialize_enter(&adapter->serializer); 682 683 if (adapter->in_detach) 684 goto out; 685 686 switch (command) { 687 case SIOCSIFADDR: 688 case SIOCGIFADDR: 689 IOCTL_DEBUGOUT("ioctl rcv'd: SIOCxIFADDR (Get/Set Interface Addr)"); 690 lwkt_serialize_exit(&adapter->serializer); 691 ether_ioctl(ifp, command, data); 692 lwkt_serialize_enter(&adapter->serializer); 693 break; 694 case SIOCSIFMTU: 695 IOCTL_DEBUGOUT("ioctl rcv'd: SIOCSIFMTU (Set Interface MTU)"); 696 if (ifr->ifr_mtu > MAX_JUMBO_FRAME_SIZE - ETHER_HDR_LEN) { 697 error = EINVAL; 698 } else { 699 ifp->if_mtu = ifr->ifr_mtu; 700 adapter->hw.max_frame_size = 701 ifp->if_mtu + ETHER_HDR_LEN + ETHER_CRC_LEN; 702 em_init_serialized(adapter); 703 } 704 break; 705 case SIOCSIFFLAGS: 706 IOCTL_DEBUGOUT("ioctl rcv'd: SIOCSIFFLAGS (Set Interface Flags)"); 707 if (ifp->if_flags & IFF_UP) { 708 if (!(ifp->if_flags & IFF_RUNNING)) 709 em_init_serialized(adapter); 710 em_disable_promisc(adapter); 711 em_set_promisc(adapter); 712 } else { 713 if (ifp->if_flags & IFF_RUNNING) 714 em_stop(adapter); 715 } 716 break; 717 case SIOCADDMULTI: 718 case SIOCDELMULTI: 719 IOCTL_DEBUGOUT("ioctl rcv'd: SIOC(ADD|DEL)MULTI"); 720 if (ifp->if_flags & IFF_RUNNING) { 721 em_disable_intr(adapter); 722 em_set_multi(adapter); 723 if (adapter->hw.mac_type == em_82542_rev2_0) 724 em_initialize_receive_unit(adapter); 725 em_enable_intr(adapter); 726 } 727 break; 728 case SIOCSIFMEDIA: 729 case SIOCGIFMEDIA: 730 IOCTL_DEBUGOUT("ioctl rcv'd: SIOCxIFMEDIA (Get/Set Interface Media)"); 731 error = ifmedia_ioctl(ifp, ifr, &adapter->media, command); 732 break; 733 case SIOCSIFCAP: 734 IOCTL_DEBUGOUT("ioctl rcv'd: SIOCSIFCAP (Set Capabilities)"); 735 mask = ifr->ifr_reqcap ^ ifp->if_capenable; 736 if (mask & IFCAP_HWCSUM) { 737 if (IFCAP_HWCSUM & ifp->if_capenable) 738 ifp->if_capenable &= ~IFCAP_HWCSUM; 739 else 740 ifp->if_capenable |= IFCAP_HWCSUM; 741 if (ifp->if_flags & IFF_RUNNING) 742 em_init_serialized(adapter); 743 } 744 break; 745 default: 746 IOCTL_DEBUGOUT1("ioctl received: UNKNOWN (0x%x)", (int)command); 747 error = EINVAL; 748 } 749 750 out: 751 lwkt_serialize_exit(&adapter->serializer); 752 return(error); 753 } 754 755 /********************************************************************* 756 * Watchdog entry point 757 * 758 * This routine is called whenever hardware quits transmitting. 759 * 760 **********************************************************************/ 761 762 static void 763 em_watchdog(struct ifnet *ifp) 764 { 765 struct adapter * adapter; 766 adapter = ifp->if_softc; 767 768 /* If we are in this routine because of pause frames, then 769 * don't reset the hardware. 770 */ 771 if (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_TXOFF) { 772 ifp->if_timer = EM_TX_TIMEOUT; 773 return; 774 } 775 776 if (em_check_for_link(&adapter->hw)) 777 if_printf(ifp, "watchdog timeout -- resetting\n"); 778 779 ifp->if_flags &= ~IFF_RUNNING; 780 781 em_init(adapter); 782 783 ifp->if_oerrors++; 784 } 785 786 /********************************************************************* 787 * Init entry point 788 * 789 * This routine is used in two ways. It is used by the stack as 790 * init entry point in network interface structure. It is also used 791 * by the driver as a hw/sw initialization routine to get to a 792 * consistent state. 793 * 794 * return 0 on success, positive on failure 795 **********************************************************************/ 796 797 static void 798 em_init(void *arg) 799 { 800 struct adapter *adapter = arg; 801 802 lwkt_serialize_enter(&adapter->serializer); 803 em_init_serialized(arg); 804 lwkt_serialize_exit(&adapter->serializer); 805 } 806 807 static void 808 em_init_serialized(void *arg) 809 { 810 struct adapter *adapter = arg; 811 uint32_t pba; 812 struct ifnet *ifp = &adapter->interface_data.ac_if; 813 814 INIT_DEBUGOUT("em_init: begin"); 815 816 em_stop(adapter); 817 818 /* 819 * Packet Buffer Allocation (PBA) 820 * Writing PBA sets the receive portion of the buffer 821 * the remainder is used for the transmit buffer. 822 * 823 * Devices before the 82547 had a Packet Buffer of 64K. 824 * Default allocation: PBA=48K for Rx, leaving 16K for Tx. 825 * After the 82547 the buffer was reduced to 40K. 826 * Default allocation: PBA=30K for Rx, leaving 10K for Tx. 827 * Note: default does not leave enough room for Jumbo Frame >10k. 828 */ 829 if(adapter->hw.mac_type < em_82547) { 830 /* Total FIFO is 64K */ 831 if(adapter->rx_buffer_len > EM_RXBUFFER_8192) 832 pba = E1000_PBA_40K; /* 40K for Rx, 24K for Tx */ 833 else 834 pba = E1000_PBA_48K; /* 48K for Rx, 16K for Tx */ 835 } else { 836 /* Total FIFO is 40K */ 837 if(adapter->hw.max_frame_size > EM_RXBUFFER_8192) { 838 pba = E1000_PBA_22K; /* 22K for Rx, 18K for Tx */ 839 } else { 840 pba = E1000_PBA_30K; /* 30K for Rx, 10K for Tx */ 841 } 842 adapter->tx_fifo_head = 0; 843 adapter->tx_head_addr = pba << EM_TX_HEAD_ADDR_SHIFT; 844 adapter->tx_fifo_size = 845 (E1000_PBA_40K - pba) << EM_PBA_BYTES_SHIFT; 846 } 847 INIT_DEBUGOUT1("em_init: pba=%dK",pba); 848 E1000_WRITE_REG(&adapter->hw, PBA, pba); 849 850 /* Get the latest mac address, User can use a LAA */ 851 bcopy(adapter->interface_data.ac_enaddr, adapter->hw.mac_addr, 852 ETHER_ADDR_LEN); 853 854 /* Initialize the hardware */ 855 if (em_hardware_init(adapter)) { 856 if_printf(ifp, "Unable to initialize the hardware\n"); 857 return; 858 } 859 860 em_enable_vlans(adapter); 861 862 /* Prepare transmit descriptors and buffers */ 863 if (em_setup_transmit_structures(adapter)) { 864 if_printf(ifp, "Could not setup transmit structures\n"); 865 em_stop(adapter); 866 return; 867 } 868 em_initialize_transmit_unit(adapter); 869 870 /* Setup Multicast table */ 871 em_set_multi(adapter); 872 873 /* Prepare receive descriptors and buffers */ 874 if (em_setup_receive_structures(adapter)) { 875 if_printf(ifp, "Could not setup receive structures\n"); 876 em_stop(adapter); 877 return; 878 } 879 em_initialize_receive_unit(adapter); 880 881 /* Don't loose promiscuous settings */ 882 em_set_promisc(adapter); 883 884 ifp->if_flags |= IFF_RUNNING; 885 ifp->if_flags &= ~IFF_OACTIVE; 886 887 if (adapter->hw.mac_type >= em_82543) { 888 if (ifp->if_capenable & IFCAP_TXCSUM) 889 ifp->if_hwassist = EM_CHECKSUM_FEATURES; 890 else 891 ifp->if_hwassist = 0; 892 } 893 894 callout_reset(&adapter->timer, hz, em_local_timer, adapter); 895 em_clear_hw_cntrs(&adapter->hw); 896 em_enable_intr(adapter); 897 898 /* Don't reset the phy next time init gets called */ 899 adapter->hw.phy_reset_disable = TRUE; 900 } 901 902 #ifdef DEVICE_POLLING 903 904 static void 905 em_poll(struct ifnet *ifp, enum poll_cmd cmd, int count) 906 { 907 struct adapter *adapter = ifp->if_softc; 908 uint32_t reg_icr; 909 910 lwkt_serialize_enter(&adapter->serializer); 911 switch(cmd) { 912 case POLL_REGISTER: 913 em_disable_intr(adapter); 914 break; 915 case POLL_DEREGISTER: 916 em_enable_intr(adapter); 917 break; 918 case POLL_AND_CHECK_STATUS: 919 reg_icr = E1000_READ_REG(&adapter->hw, ICR); 920 if (reg_icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) { 921 callout_stop(&adapter->timer); 922 adapter->hw.get_link_status = 1; 923 em_check_for_link(&adapter->hw); 924 em_print_link_status(adapter); 925 callout_reset(&adapter->timer, hz, em_local_timer, 926 adapter); 927 } 928 /* fall through */ 929 case POLL_ONLY: 930 if (ifp->if_flags & IFF_RUNNING) { 931 em_process_receive_interrupts(adapter, count); 932 em_clean_transmit_interrupts(adapter); 933 } 934 if (ifp->if_flags & IFF_RUNNING) { 935 if (!ifq_is_empty(&ifp->if_snd)) 936 em_start_serialized(ifp); 937 } 938 break; 939 } 940 lwkt_serialize_exit(&adapter->serializer); 941 } 942 943 #endif /* DEVICE_POLLING */ 944 945 /********************************************************************* 946 * 947 * Interrupt Service routine 948 * 949 **********************************************************************/ 950 static void 951 em_intr(void *arg) 952 { 953 uint32_t reg_icr; 954 struct ifnet *ifp; 955 struct adapter *adapter = arg; 956 957 ifp = &adapter->interface_data.ac_if; 958 959 reg_icr = E1000_READ_REG(&adapter->hw, ICR); 960 if (!reg_icr) 961 return; 962 963 /* Link status change */ 964 if (reg_icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) { 965 callout_stop(&adapter->timer); 966 adapter->hw.get_link_status = 1; 967 em_check_for_link(&adapter->hw); 968 em_print_link_status(adapter); 969 callout_reset(&adapter->timer, hz, em_local_timer, adapter); 970 } 971 972 /* 973 * note: do not attempt to improve efficiency by looping. This 974 * only results in unnecessary piecemeal collection of received 975 * packets and unnecessary piecemeal cleanups of the transmit ring. 976 */ 977 if (ifp->if_flags & IFF_RUNNING) { 978 em_process_receive_interrupts(adapter, -1); 979 em_clean_transmit_interrupts(adapter); 980 } 981 982 if ((ifp->if_flags & IFF_RUNNING) && !ifq_is_empty(&ifp->if_snd)) 983 em_start_serialized(ifp); 984 } 985 986 /********************************************************************* 987 * 988 * Media Ioctl callback 989 * 990 * This routine is called whenever the user queries the status of 991 * the interface using ifconfig. 992 * 993 **********************************************************************/ 994 static void 995 em_media_status(struct ifnet *ifp, struct ifmediareq *ifmr) 996 { 997 struct adapter * adapter = ifp->if_softc; 998 999 INIT_DEBUGOUT("em_media_status: begin"); 1000 1001 em_check_for_link(&adapter->hw); 1002 if (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU) { 1003 if (adapter->link_active == 0) { 1004 em_get_speed_and_duplex(&adapter->hw, 1005 &adapter->link_speed, 1006 &adapter->link_duplex); 1007 adapter->link_active = 1; 1008 } 1009 } else { 1010 if (adapter->link_active == 1) { 1011 adapter->link_speed = 0; 1012 adapter->link_duplex = 0; 1013 adapter->link_active = 0; 1014 } 1015 } 1016 1017 ifmr->ifm_status = IFM_AVALID; 1018 ifmr->ifm_active = IFM_ETHER; 1019 1020 if (!adapter->link_active) 1021 return; 1022 1023 ifmr->ifm_status |= IFM_ACTIVE; 1024 1025 if (adapter->hw.media_type == em_media_type_fiber) { 1026 ifmr->ifm_active |= IFM_1000_SX | IFM_FDX; 1027 } else { 1028 switch (adapter->link_speed) { 1029 case 10: 1030 ifmr->ifm_active |= IFM_10_T; 1031 break; 1032 case 100: 1033 ifmr->ifm_active |= IFM_100_TX; 1034 break; 1035 case 1000: 1036 ifmr->ifm_active |= IFM_1000_T; 1037 break; 1038 } 1039 if (adapter->link_duplex == FULL_DUPLEX) 1040 ifmr->ifm_active |= IFM_FDX; 1041 else 1042 ifmr->ifm_active |= IFM_HDX; 1043 } 1044 } 1045 1046 /********************************************************************* 1047 * 1048 * Media Ioctl callback 1049 * 1050 * This routine is called when the user changes speed/duplex using 1051 * media/mediopt option with ifconfig. 1052 * 1053 **********************************************************************/ 1054 static int 1055 em_media_change(struct ifnet *ifp) 1056 { 1057 struct adapter * adapter = ifp->if_softc; 1058 struct ifmedia *ifm = &adapter->media; 1059 1060 INIT_DEBUGOUT("em_media_change: begin"); 1061 1062 if (IFM_TYPE(ifm->ifm_media) != IFM_ETHER) 1063 return(EINVAL); 1064 1065 lwkt_serialize_enter(&adapter->serializer); 1066 1067 switch (IFM_SUBTYPE(ifm->ifm_media)) { 1068 case IFM_AUTO: 1069 adapter->hw.autoneg = DO_AUTO_NEG; 1070 adapter->hw.autoneg_advertised = AUTONEG_ADV_DEFAULT; 1071 break; 1072 case IFM_1000_SX: 1073 case IFM_1000_T: 1074 adapter->hw.autoneg = DO_AUTO_NEG; 1075 adapter->hw.autoneg_advertised = ADVERTISE_1000_FULL; 1076 break; 1077 case IFM_100_TX: 1078 adapter->hw.autoneg = FALSE; 1079 adapter->hw.autoneg_advertised = 0; 1080 if ((ifm->ifm_media & IFM_GMASK) == IFM_FDX) 1081 adapter->hw.forced_speed_duplex = em_100_full; 1082 else 1083 adapter->hw.forced_speed_duplex = em_100_half; 1084 break; 1085 case IFM_10_T: 1086 adapter->hw.autoneg = FALSE; 1087 adapter->hw.autoneg_advertised = 0; 1088 if ((ifm->ifm_media & IFM_GMASK) == IFM_FDX) 1089 adapter->hw.forced_speed_duplex = em_10_full; 1090 else 1091 adapter->hw.forced_speed_duplex = em_10_half; 1092 break; 1093 default: 1094 if_printf(ifp, "Unsupported media type\n"); 1095 } 1096 /* 1097 * As the speed/duplex settings may have changed we need to 1098 * reset the PHY. 1099 */ 1100 adapter->hw.phy_reset_disable = FALSE; 1101 1102 em_init_serialized(adapter); 1103 1104 lwkt_serialize_exit(&adapter->serializer); 1105 return(0); 1106 } 1107 1108 static void 1109 em_tx_cb(void *arg, bus_dma_segment_t *seg, int nsegs, bus_size_t mapsize, 1110 int error) 1111 { 1112 struct em_q *q = arg; 1113 1114 if (error) 1115 return; 1116 KASSERT(nsegs <= EM_MAX_SCATTER, 1117 ("Too many DMA segments returned when mapping tx packet")); 1118 q->nsegs = nsegs; 1119 bcopy(seg, q->segs, nsegs * sizeof(seg[0])); 1120 } 1121 1122 /********************************************************************* 1123 * 1124 * This routine maps the mbufs to tx descriptors. 1125 * 1126 * return 0 on success, positive on failure 1127 **********************************************************************/ 1128 static int 1129 em_encap(struct adapter *adapter, struct mbuf *m_head) 1130 { 1131 uint32_t txd_upper; 1132 uint32_t txd_lower, txd_used = 0, txd_saved = 0; 1133 int i, j, error; 1134 uint64_t address; 1135 1136 /* For 82544 Workaround */ 1137 DESC_ARRAY desc_array; 1138 uint32_t array_elements; 1139 uint32_t counter; 1140 1141 struct ifvlan *ifv = NULL; 1142 struct em_q q; 1143 struct em_buffer *tx_buffer = NULL; 1144 struct em_tx_desc *current_tx_desc = NULL; 1145 struct ifnet *ifp = &adapter->interface_data.ac_if; 1146 1147 /* 1148 * Force a cleanup if number of TX descriptors 1149 * available hits the threshold 1150 */ 1151 if (adapter->num_tx_desc_avail <= EM_TX_CLEANUP_THRESHOLD) { 1152 em_clean_transmit_interrupts(adapter); 1153 if (adapter->num_tx_desc_avail <= EM_TX_CLEANUP_THRESHOLD) { 1154 adapter->no_tx_desc_avail1++; 1155 return(ENOBUFS); 1156 } 1157 } 1158 /* 1159 * Map the packet for DMA. 1160 */ 1161 if (bus_dmamap_create(adapter->txtag, BUS_DMA_NOWAIT, &q.map)) { 1162 adapter->no_tx_map_avail++; 1163 return(ENOMEM); 1164 } 1165 error = bus_dmamap_load_mbuf(adapter->txtag, q.map, m_head, em_tx_cb, 1166 &q, BUS_DMA_NOWAIT); 1167 if (error != 0) { 1168 adapter->no_tx_dma_setup++; 1169 bus_dmamap_destroy(adapter->txtag, q.map); 1170 return(error); 1171 } 1172 KASSERT(q.nsegs != 0, ("em_encap: empty packet")); 1173 1174 if (q.nsegs > adapter->num_tx_desc_avail) { 1175 adapter->no_tx_desc_avail2++; 1176 bus_dmamap_unload(adapter->txtag, q.map); 1177 bus_dmamap_destroy(adapter->txtag, q.map); 1178 return(ENOBUFS); 1179 } 1180 1181 if (ifp->if_hwassist > 0) { 1182 em_transmit_checksum_setup(adapter, m_head, 1183 &txd_upper, &txd_lower); 1184 } 1185 else 1186 txd_upper = txd_lower = 0; 1187 1188 /* Find out if we are in vlan mode */ 1189 if ((m_head->m_flags & (M_PROTO1|M_PKTHDR)) == (M_PROTO1|M_PKTHDR) && 1190 m_head->m_pkthdr.rcvif != NULL && 1191 m_head->m_pkthdr.rcvif->if_type == IFT_L2VLAN) 1192 ifv = m_head->m_pkthdr.rcvif->if_softc; 1193 1194 i = adapter->next_avail_tx_desc; 1195 if (adapter->pcix_82544) { 1196 txd_saved = i; 1197 txd_used = 0; 1198 } 1199 for (j = 0; j < q.nsegs; j++) { 1200 /* If adapter is 82544 and on PCIX bus */ 1201 if(adapter->pcix_82544) { 1202 array_elements = 0; 1203 address = htole64(q.segs[j].ds_addr); 1204 /* 1205 * Check the Address and Length combination and 1206 * split the data accordingly 1207 */ 1208 array_elements = em_fill_descriptors(address, 1209 htole32(q.segs[j].ds_len), 1210 &desc_array); 1211 for (counter = 0; counter < array_elements; counter++) { 1212 if (txd_used == adapter->num_tx_desc_avail) { 1213 adapter->next_avail_tx_desc = txd_saved; 1214 adapter->no_tx_desc_avail2++; 1215 bus_dmamap_unload(adapter->txtag, q.map); 1216 bus_dmamap_destroy(adapter->txtag, q.map); 1217 return(ENOBUFS); 1218 } 1219 tx_buffer = &adapter->tx_buffer_area[i]; 1220 current_tx_desc = &adapter->tx_desc_base[i]; 1221 current_tx_desc->buffer_addr = htole64( 1222 desc_array.descriptor[counter].address); 1223 current_tx_desc->lower.data = htole32( 1224 (adapter->txd_cmd | txd_lower | 1225 (uint16_t)desc_array.descriptor[counter].length)); 1226 current_tx_desc->upper.data = htole32((txd_upper)); 1227 if (++i == adapter->num_tx_desc) 1228 i = 0; 1229 1230 tx_buffer->m_head = NULL; 1231 txd_used++; 1232 } 1233 } else { 1234 tx_buffer = &adapter->tx_buffer_area[i]; 1235 current_tx_desc = &adapter->tx_desc_base[i]; 1236 1237 current_tx_desc->buffer_addr = htole64(q.segs[j].ds_addr); 1238 current_tx_desc->lower.data = htole32( 1239 adapter->txd_cmd | txd_lower | q.segs[j].ds_len); 1240 current_tx_desc->upper.data = htole32(txd_upper); 1241 1242 if (++i == adapter->num_tx_desc) 1243 i = 0; 1244 1245 tx_buffer->m_head = NULL; 1246 } 1247 } 1248 1249 adapter->next_avail_tx_desc = i; 1250 if (adapter->pcix_82544) 1251 adapter->num_tx_desc_avail -= txd_used; 1252 else 1253 adapter->num_tx_desc_avail -= q.nsegs; 1254 1255 if (ifv != NULL) { 1256 /* Set the vlan id */ 1257 current_tx_desc->upper.fields.special = htole16(ifv->ifv_tag); 1258 1259 /* Tell hardware to add tag */ 1260 current_tx_desc->lower.data |= htole32(E1000_TXD_CMD_VLE); 1261 } 1262 1263 tx_buffer->m_head = m_head; 1264 tx_buffer->map = q.map; 1265 bus_dmamap_sync(adapter->txtag, q.map, BUS_DMASYNC_PREWRITE); 1266 1267 /* 1268 * Last Descriptor of Packet needs End Of Packet (EOP) 1269 */ 1270 current_tx_desc->lower.data |= htole32(E1000_TXD_CMD_EOP); 1271 1272 bus_dmamap_sync(adapter->txdma.dma_tag, adapter->txdma.dma_map, 1273 BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 1274 1275 /* 1276 * Advance the Transmit Descriptor Tail (Tdt), this tells the E1000 1277 * that this frame is available to transmit. 1278 */ 1279 if (adapter->hw.mac_type == em_82547 && 1280 adapter->link_duplex == HALF_DUPLEX) { 1281 em_82547_move_tail_serialized(adapter); 1282 } else { 1283 E1000_WRITE_REG(&adapter->hw, TDT, i); 1284 if (adapter->hw.mac_type == em_82547) { 1285 em_82547_update_fifo_head(adapter, 1286 m_head->m_pkthdr.len); 1287 } 1288 } 1289 1290 return(0); 1291 } 1292 1293 /********************************************************************* 1294 * 1295 * 82547 workaround to avoid controller hang in half-duplex environment. 1296 * The workaround is to avoid queuing a large packet that would span 1297 * the internal Tx FIFO ring boundary. We need to reset the FIFO pointers 1298 * in this case. We do that only when FIFO is quiescent. 1299 * 1300 **********************************************************************/ 1301 static void 1302 em_82547_move_tail(void *arg) 1303 { 1304 struct adapter *adapter = arg; 1305 1306 lwkt_serialize_enter(&adapter->serializer); 1307 em_82547_move_tail_serialized(arg); 1308 lwkt_serialize_exit(&adapter->serializer); 1309 } 1310 1311 static void 1312 em_82547_move_tail_serialized(void *arg) 1313 { 1314 struct adapter *adapter = arg; 1315 uint16_t hw_tdt; 1316 uint16_t sw_tdt; 1317 struct em_tx_desc *tx_desc; 1318 uint16_t length = 0; 1319 boolean_t eop = 0; 1320 1321 hw_tdt = E1000_READ_REG(&adapter->hw, TDT); 1322 sw_tdt = adapter->next_avail_tx_desc; 1323 1324 while (hw_tdt != sw_tdt) { 1325 tx_desc = &adapter->tx_desc_base[hw_tdt]; 1326 length += tx_desc->lower.flags.length; 1327 eop = tx_desc->lower.data & E1000_TXD_CMD_EOP; 1328 if(++hw_tdt == adapter->num_tx_desc) 1329 hw_tdt = 0; 1330 1331 if(eop) { 1332 if (em_82547_fifo_workaround(adapter, length)) { 1333 adapter->tx_fifo_wrk_cnt++; 1334 callout_reset(&adapter->tx_fifo_timer, 1, 1335 em_82547_move_tail, adapter); 1336 break; 1337 } 1338 E1000_WRITE_REG(&adapter->hw, TDT, hw_tdt); 1339 em_82547_update_fifo_head(adapter, length); 1340 length = 0; 1341 } 1342 } 1343 } 1344 1345 static int 1346 em_82547_fifo_workaround(struct adapter *adapter, int len) 1347 { 1348 int fifo_space, fifo_pkt_len; 1349 1350 fifo_pkt_len = EM_ROUNDUP(len + EM_FIFO_HDR, EM_FIFO_HDR); 1351 1352 if (adapter->link_duplex == HALF_DUPLEX) { 1353 fifo_space = adapter->tx_fifo_size - adapter->tx_fifo_head; 1354 1355 if (fifo_pkt_len >= (EM_82547_PKT_THRESH + fifo_space)) { 1356 if (em_82547_tx_fifo_reset(adapter)) 1357 return(0); 1358 else 1359 return(1); 1360 } 1361 } 1362 1363 return(0); 1364 } 1365 1366 static void 1367 em_82547_update_fifo_head(struct adapter *adapter, int len) 1368 { 1369 int fifo_pkt_len = EM_ROUNDUP(len + EM_FIFO_HDR, EM_FIFO_HDR); 1370 1371 /* tx_fifo_head is always 16 byte aligned */ 1372 adapter->tx_fifo_head += fifo_pkt_len; 1373 if (adapter->tx_fifo_head >= adapter->tx_fifo_size) 1374 adapter->tx_fifo_head -= adapter->tx_fifo_size; 1375 } 1376 1377 static int 1378 em_82547_tx_fifo_reset(struct adapter *adapter) 1379 { 1380 uint32_t tctl; 1381 1382 if ( (E1000_READ_REG(&adapter->hw, TDT) == 1383 E1000_READ_REG(&adapter->hw, TDH)) && 1384 (E1000_READ_REG(&adapter->hw, TDFT) == 1385 E1000_READ_REG(&adapter->hw, TDFH)) && 1386 (E1000_READ_REG(&adapter->hw, TDFTS) == 1387 E1000_READ_REG(&adapter->hw, TDFHS)) && 1388 (E1000_READ_REG(&adapter->hw, TDFPC) == 0)) { 1389 1390 /* Disable TX unit */ 1391 tctl = E1000_READ_REG(&adapter->hw, TCTL); 1392 E1000_WRITE_REG(&adapter->hw, TCTL, tctl & ~E1000_TCTL_EN); 1393 1394 /* Reset FIFO pointers */ 1395 E1000_WRITE_REG(&adapter->hw, TDFT, adapter->tx_head_addr); 1396 E1000_WRITE_REG(&adapter->hw, TDFH, adapter->tx_head_addr); 1397 E1000_WRITE_REG(&adapter->hw, TDFTS, adapter->tx_head_addr); 1398 E1000_WRITE_REG(&adapter->hw, TDFHS, adapter->tx_head_addr); 1399 1400 /* Re-enable TX unit */ 1401 E1000_WRITE_REG(&adapter->hw, TCTL, tctl); 1402 E1000_WRITE_FLUSH(&adapter->hw); 1403 1404 adapter->tx_fifo_head = 0; 1405 adapter->tx_fifo_reset_cnt++; 1406 1407 return(TRUE); 1408 } else { 1409 return(FALSE); 1410 } 1411 } 1412 1413 static void 1414 em_set_promisc(struct adapter *adapter) 1415 { 1416 uint32_t reg_rctl, ctrl; 1417 struct ifnet *ifp = &adapter->interface_data.ac_if; 1418 1419 reg_rctl = E1000_READ_REG(&adapter->hw, RCTL); 1420 ctrl = E1000_READ_REG(&adapter->hw, CTRL); 1421 1422 if (ifp->if_flags & IFF_PROMISC) { 1423 reg_rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE); 1424 E1000_WRITE_REG(&adapter->hw, RCTL, reg_rctl); 1425 1426 /* 1427 * Disable VLAN stripping in promiscous mode. 1428 * This enables bridging of vlan tagged frames to occur 1429 * and also allows vlan tags to be seen in tcpdump. 1430 */ 1431 ctrl &= ~E1000_CTRL_VME; 1432 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl); 1433 } else if (ifp->if_flags & IFF_ALLMULTI) { 1434 reg_rctl |= E1000_RCTL_MPE; 1435 reg_rctl &= ~E1000_RCTL_UPE; 1436 E1000_WRITE_REG(&adapter->hw, RCTL, reg_rctl); 1437 } 1438 } 1439 1440 static void 1441 em_disable_promisc(struct adapter *adapter) 1442 { 1443 uint32_t reg_rctl; 1444 1445 reg_rctl = E1000_READ_REG(&adapter->hw, RCTL); 1446 1447 reg_rctl &= (~E1000_RCTL_UPE); 1448 reg_rctl &= (~E1000_RCTL_MPE); 1449 E1000_WRITE_REG(&adapter->hw, RCTL, reg_rctl); 1450 1451 em_enable_vlans(adapter); 1452 } 1453 1454 /********************************************************************* 1455 * Multicast Update 1456 * 1457 * This routine is called whenever multicast address list is updated. 1458 * 1459 **********************************************************************/ 1460 1461 static void 1462 em_set_multi(struct adapter *adapter) 1463 { 1464 uint32_t reg_rctl = 0; 1465 uint8_t mta[MAX_NUM_MULTICAST_ADDRESSES * ETH_LENGTH_OF_ADDRESS]; 1466 struct ifmultiaddr *ifma; 1467 int mcnt = 0; 1468 struct ifnet *ifp = &adapter->interface_data.ac_if; 1469 1470 IOCTL_DEBUGOUT("em_set_multi: begin"); 1471 1472 if (adapter->hw.mac_type == em_82542_rev2_0) { 1473 reg_rctl = E1000_READ_REG(&adapter->hw, RCTL); 1474 if (adapter->hw.pci_cmd_word & CMD_MEM_WRT_INVALIDATE) 1475 em_pci_clear_mwi(&adapter->hw); 1476 reg_rctl |= E1000_RCTL_RST; 1477 E1000_WRITE_REG(&adapter->hw, RCTL, reg_rctl); 1478 msec_delay(5); 1479 } 1480 1481 LIST_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) { 1482 if (ifma->ifma_addr->sa_family != AF_LINK) 1483 continue; 1484 1485 if (mcnt == MAX_NUM_MULTICAST_ADDRESSES) 1486 break; 1487 1488 bcopy(LLADDR((struct sockaddr_dl *)ifma->ifma_addr), 1489 &mta[mcnt*ETH_LENGTH_OF_ADDRESS], ETH_LENGTH_OF_ADDRESS); 1490 mcnt++; 1491 } 1492 1493 if (mcnt >= MAX_NUM_MULTICAST_ADDRESSES) { 1494 reg_rctl = E1000_READ_REG(&adapter->hw, RCTL); 1495 reg_rctl |= E1000_RCTL_MPE; 1496 E1000_WRITE_REG(&adapter->hw, RCTL, reg_rctl); 1497 } else 1498 em_mc_addr_list_update(&adapter->hw, mta, mcnt, 0, 1); 1499 1500 if (adapter->hw.mac_type == em_82542_rev2_0) { 1501 reg_rctl = E1000_READ_REG(&adapter->hw, RCTL); 1502 reg_rctl &= ~E1000_RCTL_RST; 1503 E1000_WRITE_REG(&adapter->hw, RCTL, reg_rctl); 1504 msec_delay(5); 1505 if (adapter->hw.pci_cmd_word & CMD_MEM_WRT_INVALIDATE) 1506 em_pci_set_mwi(&adapter->hw); 1507 } 1508 } 1509 1510 /********************************************************************* 1511 * Timer routine 1512 * 1513 * This routine checks for link status and updates statistics. 1514 * 1515 **********************************************************************/ 1516 1517 static void 1518 em_local_timer(void *arg) 1519 { 1520 struct ifnet *ifp; 1521 struct adapter *adapter = arg; 1522 ifp = &adapter->interface_data.ac_if; 1523 1524 lwkt_serialize_enter(&adapter->serializer); 1525 1526 em_check_for_link(&adapter->hw); 1527 em_print_link_status(adapter); 1528 em_update_stats_counters(adapter); 1529 if (em_display_debug_stats && ifp->if_flags & IFF_RUNNING) 1530 em_print_hw_stats(adapter); 1531 em_smartspeed(adapter); 1532 1533 callout_reset(&adapter->timer, hz, em_local_timer, adapter); 1534 1535 lwkt_serialize_exit(&adapter->serializer); 1536 } 1537 1538 static void 1539 em_print_link_status(struct adapter *adapter) 1540 { 1541 if (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU) { 1542 if (adapter->link_active == 0) { 1543 em_get_speed_and_duplex(&adapter->hw, 1544 &adapter->link_speed, 1545 &adapter->link_duplex); 1546 device_printf(adapter->dev, "Link is up %d Mbps %s\n", 1547 adapter->link_speed, 1548 ((adapter->link_duplex == FULL_DUPLEX) ? 1549 "Full Duplex" : "Half Duplex")); 1550 adapter->link_active = 1; 1551 adapter->smartspeed = 0; 1552 } 1553 } else { 1554 if (adapter->link_active == 1) { 1555 adapter->link_speed = 0; 1556 adapter->link_duplex = 0; 1557 device_printf(adapter->dev, "Link is Down\n"); 1558 adapter->link_active = 0; 1559 } 1560 } 1561 } 1562 1563 /********************************************************************* 1564 * 1565 * This routine disables all traffic on the adapter by issuing a 1566 * global reset on the MAC and deallocates TX/RX buffers. 1567 * 1568 **********************************************************************/ 1569 1570 static void 1571 em_stop(void *arg) 1572 { 1573 struct ifnet *ifp; 1574 struct adapter * adapter = arg; 1575 ifp = &adapter->interface_data.ac_if; 1576 1577 INIT_DEBUGOUT("em_stop: begin"); 1578 em_disable_intr(adapter); 1579 em_reset_hw(&adapter->hw); 1580 callout_stop(&adapter->timer); 1581 callout_stop(&adapter->tx_fifo_timer); 1582 em_free_transmit_structures(adapter); 1583 em_free_receive_structures(adapter); 1584 1585 /* Tell the stack that the interface is no longer active */ 1586 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE); 1587 ifp->if_timer = 0; 1588 } 1589 1590 /********************************************************************* 1591 * 1592 * Determine hardware revision. 1593 * 1594 **********************************************************************/ 1595 static void 1596 em_identify_hardware(struct adapter * adapter) 1597 { 1598 device_t dev = adapter->dev; 1599 1600 /* Make sure our PCI config space has the necessary stuff set */ 1601 adapter->hw.pci_cmd_word = pci_read_config(dev, PCIR_COMMAND, 2); 1602 if (!((adapter->hw.pci_cmd_word & PCIM_CMD_BUSMASTEREN) && 1603 (adapter->hw.pci_cmd_word & PCIM_CMD_MEMEN))) { 1604 device_printf(dev, "Memory Access and/or Bus Master bits were not set!\n"); 1605 adapter->hw.pci_cmd_word |= 1606 (PCIM_CMD_BUSMASTEREN | PCIM_CMD_MEMEN); 1607 pci_write_config(dev, PCIR_COMMAND, adapter->hw.pci_cmd_word, 2); 1608 } 1609 1610 /* Save off the information about this board */ 1611 adapter->hw.vendor_id = pci_get_vendor(dev); 1612 adapter->hw.device_id = pci_get_device(dev); 1613 adapter->hw.revision_id = pci_get_revid(dev); 1614 adapter->hw.subsystem_vendor_id = pci_get_subvendor(dev); 1615 adapter->hw.subsystem_id = pci_get_subdevice(dev); 1616 1617 /* Identify the MAC */ 1618 if (em_set_mac_type(&adapter->hw)) 1619 device_printf(dev, "Unknown MAC Type\n"); 1620 1621 if (adapter->hw.mac_type == em_82541 || 1622 adapter->hw.mac_type == em_82541_rev_2 || 1623 adapter->hw.mac_type == em_82547 || 1624 adapter->hw.mac_type == em_82547_rev_2) 1625 adapter->hw.phy_init_script = TRUE; 1626 } 1627 1628 /********************************************************************* 1629 * 1630 * Initialize the hardware to a configuration as specified by the 1631 * adapter structure. The controller is reset, the EEPROM is 1632 * verified, the MAC address is set, then the shared initialization 1633 * routines are called. 1634 * 1635 **********************************************************************/ 1636 static int 1637 em_hardware_init(struct adapter *adapter) 1638 { 1639 INIT_DEBUGOUT("em_hardware_init: begin"); 1640 /* Issue a global reset */ 1641 em_reset_hw(&adapter->hw); 1642 1643 /* When hardware is reset, fifo_head is also reset */ 1644 adapter->tx_fifo_head = 0; 1645 1646 /* Make sure we have a good EEPROM before we read from it */ 1647 if (em_validate_eeprom_checksum(&adapter->hw) < 0) { 1648 device_printf(adapter->dev, "The EEPROM Checksum Is Not Valid\n"); 1649 return(EIO); 1650 } 1651 1652 if (em_read_part_num(&adapter->hw, &(adapter->part_num)) < 0) { 1653 device_printf(adapter->dev, "EEPROM read error while reading part number\n"); 1654 return(EIO); 1655 } 1656 1657 if (em_init_hw(&adapter->hw) < 0) { 1658 device_printf(adapter->dev, "Hardware Initialization Failed"); 1659 return(EIO); 1660 } 1661 1662 em_check_for_link(&adapter->hw); 1663 if (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU) 1664 adapter->link_active = 1; 1665 else 1666 adapter->link_active = 0; 1667 1668 if (adapter->link_active) { 1669 em_get_speed_and_duplex(&adapter->hw, 1670 &adapter->link_speed, 1671 &adapter->link_duplex); 1672 } else { 1673 adapter->link_speed = 0; 1674 adapter->link_duplex = 0; 1675 } 1676 1677 return(0); 1678 } 1679 1680 /********************************************************************* 1681 * 1682 * Setup networking device structure and register an interface. 1683 * 1684 **********************************************************************/ 1685 static void 1686 em_setup_interface(device_t dev, struct adapter *adapter) 1687 { 1688 struct ifnet *ifp; 1689 INIT_DEBUGOUT("em_setup_interface: begin"); 1690 1691 ifp = &adapter->interface_data.ac_if; 1692 if_initname(ifp, device_get_name(dev), device_get_unit(dev)); 1693 ifp->if_mtu = ETHERMTU; 1694 ifp->if_baudrate = 1000000000; 1695 ifp->if_init = em_init; 1696 ifp->if_softc = adapter; 1697 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 1698 ifp->if_ioctl = em_ioctl; 1699 ifp->if_start = em_start; 1700 #ifdef DEVICE_POLLING 1701 ifp->if_poll = em_poll; 1702 #endif 1703 ifp->if_watchdog = em_watchdog; 1704 ifq_set_maxlen(&ifp->if_snd, adapter->num_tx_desc - 1); 1705 ifq_set_ready(&ifp->if_snd); 1706 1707 if (adapter->hw.mac_type >= em_82543) 1708 ifp->if_capabilities |= IFCAP_HWCSUM; 1709 1710 ifp->if_capenable = ifp->if_capabilities; 1711 1712 ether_ifattach(ifp, adapter->hw.mac_addr); 1713 1714 /* 1715 * Tell the upper layer(s) we support long frames. 1716 */ 1717 ifp->if_data.ifi_hdrlen = sizeof(struct ether_vlan_header); 1718 ifp->if_capabilities |= IFCAP_VLAN_HWTAGGING | IFCAP_VLAN_MTU; 1719 1720 /* 1721 * Specify the media types supported by this adapter and register 1722 * callbacks to update media and link information 1723 */ 1724 ifmedia_init(&adapter->media, IFM_IMASK, em_media_change, 1725 em_media_status); 1726 if (adapter->hw.media_type == em_media_type_fiber) { 1727 ifmedia_add(&adapter->media, IFM_ETHER | IFM_1000_SX | IFM_FDX, 1728 0, NULL); 1729 ifmedia_add(&adapter->media, IFM_ETHER | IFM_1000_SX, 1730 0, NULL); 1731 } else { 1732 ifmedia_add(&adapter->media, IFM_ETHER | IFM_10_T, 0, NULL); 1733 ifmedia_add(&adapter->media, IFM_ETHER | IFM_10_T | IFM_FDX, 1734 0, NULL); 1735 ifmedia_add(&adapter->media, IFM_ETHER | IFM_100_TX, 1736 0, NULL); 1737 ifmedia_add(&adapter->media, IFM_ETHER | IFM_100_TX | IFM_FDX, 1738 0, NULL); 1739 ifmedia_add(&adapter->media, IFM_ETHER | IFM_1000_T | IFM_FDX, 1740 0, NULL); 1741 ifmedia_add(&adapter->media, IFM_ETHER | IFM_1000_T, 0, NULL); 1742 } 1743 ifmedia_add(&adapter->media, IFM_ETHER | IFM_AUTO, 0, NULL); 1744 ifmedia_set(&adapter->media, IFM_ETHER | IFM_AUTO); 1745 } 1746 1747 /********************************************************************* 1748 * 1749 * Workaround for SmartSpeed on 82541 and 82547 controllers 1750 * 1751 **********************************************************************/ 1752 static void 1753 em_smartspeed(struct adapter *adapter) 1754 { 1755 uint16_t phy_tmp; 1756 1757 if (adapter->link_active || (adapter->hw.phy_type != em_phy_igp) || 1758 !adapter->hw.autoneg || 1759 !(adapter->hw.autoneg_advertised & ADVERTISE_1000_FULL)) 1760 return; 1761 1762 if (adapter->smartspeed == 0) { 1763 /* 1764 * If Master/Slave config fault is asserted twice, 1765 * we assume back-to-back. 1766 */ 1767 em_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_tmp); 1768 if (!(phy_tmp & SR_1000T_MS_CONFIG_FAULT)) 1769 return; 1770 em_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_tmp); 1771 if (phy_tmp & SR_1000T_MS_CONFIG_FAULT) { 1772 em_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, 1773 &phy_tmp); 1774 if (phy_tmp & CR_1000T_MS_ENABLE) { 1775 phy_tmp &= ~CR_1000T_MS_ENABLE; 1776 em_write_phy_reg(&adapter->hw, 1777 PHY_1000T_CTRL, phy_tmp); 1778 adapter->smartspeed++; 1779 if (adapter->hw.autoneg && 1780 !em_phy_setup_autoneg(&adapter->hw) && 1781 !em_read_phy_reg(&adapter->hw, PHY_CTRL, 1782 &phy_tmp)) { 1783 phy_tmp |= (MII_CR_AUTO_NEG_EN | 1784 MII_CR_RESTART_AUTO_NEG); 1785 em_write_phy_reg(&adapter->hw, 1786 PHY_CTRL, phy_tmp); 1787 } 1788 } 1789 } 1790 return; 1791 } else if (adapter->smartspeed == EM_SMARTSPEED_DOWNSHIFT) { 1792 /* If still no link, perhaps using 2/3 pair cable */ 1793 em_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_tmp); 1794 phy_tmp |= CR_1000T_MS_ENABLE; 1795 em_write_phy_reg(&adapter->hw, PHY_1000T_CTRL, phy_tmp); 1796 if (adapter->hw.autoneg && 1797 !em_phy_setup_autoneg(&adapter->hw) && 1798 !em_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_tmp)) { 1799 phy_tmp |= (MII_CR_AUTO_NEG_EN | 1800 MII_CR_RESTART_AUTO_NEG); 1801 em_write_phy_reg(&adapter->hw, PHY_CTRL, phy_tmp); 1802 } 1803 } 1804 /* Restart process after EM_SMARTSPEED_MAX iterations */ 1805 if (adapter->smartspeed++ == EM_SMARTSPEED_MAX) 1806 adapter->smartspeed = 0; 1807 } 1808 1809 /* 1810 * Manage DMA'able memory. 1811 */ 1812 static void 1813 em_dmamap_cb(void *arg, bus_dma_segment_t *segs, int nseg, int error) 1814 { 1815 if (error) 1816 return; 1817 *(bus_addr_t*) arg = segs->ds_addr; 1818 } 1819 1820 static int 1821 em_dma_malloc(struct adapter *adapter, bus_size_t size, 1822 struct em_dma_alloc *dma, int mapflags) 1823 { 1824 int r; 1825 device_t dev = adapter->dev; 1826 1827 r = bus_dma_tag_create(NULL, /* parent */ 1828 PAGE_SIZE, 0, /* alignment, bounds */ 1829 BUS_SPACE_MAXADDR, /* lowaddr */ 1830 BUS_SPACE_MAXADDR, /* highaddr */ 1831 NULL, NULL, /* filter, filterarg */ 1832 size, /* maxsize */ 1833 1, /* nsegments */ 1834 size, /* maxsegsize */ 1835 BUS_DMA_ALLOCNOW, /* flags */ 1836 &dma->dma_tag); 1837 if (r != 0) { 1838 device_printf(dev, "em_dma_malloc: bus_dma_tag_create failed; " 1839 "error %u\n", r); 1840 goto fail_0; 1841 } 1842 1843 r = bus_dmamem_alloc(dma->dma_tag, (void**) &dma->dma_vaddr, 1844 BUS_DMA_NOWAIT, &dma->dma_map); 1845 if (r != 0) { 1846 device_printf(dev, "em_dma_malloc: bus_dmammem_alloc failed; " 1847 "size %llu, error %d\n", (uintmax_t)size, r); 1848 goto fail_2; 1849 } 1850 1851 r = bus_dmamap_load(dma->dma_tag, dma->dma_map, dma->dma_vaddr, 1852 size, 1853 em_dmamap_cb, 1854 &dma->dma_paddr, 1855 mapflags | BUS_DMA_NOWAIT); 1856 if (r != 0) { 1857 device_printf(dev, "em_dma_malloc: bus_dmamap_load failed; " 1858 "error %u\n", r); 1859 goto fail_3; 1860 } 1861 1862 dma->dma_size = size; 1863 return(0); 1864 1865 fail_3: 1866 bus_dmamap_unload(dma->dma_tag, dma->dma_map); 1867 fail_2: 1868 bus_dmamem_free(dma->dma_tag, dma->dma_vaddr, dma->dma_map); 1869 bus_dma_tag_destroy(dma->dma_tag); 1870 fail_0: 1871 dma->dma_map = NULL; 1872 dma->dma_tag = NULL; 1873 return(r); 1874 } 1875 1876 static void 1877 em_dma_free(struct adapter *adapter, struct em_dma_alloc *dma) 1878 { 1879 bus_dmamap_unload(dma->dma_tag, dma->dma_map); 1880 bus_dmamem_free(dma->dma_tag, dma->dma_vaddr, dma->dma_map); 1881 bus_dma_tag_destroy(dma->dma_tag); 1882 } 1883 1884 /********************************************************************* 1885 * 1886 * Allocate memory for tx_buffer structures. The tx_buffer stores all 1887 * the information needed to transmit a packet on the wire. 1888 * 1889 **********************************************************************/ 1890 static int 1891 em_allocate_transmit_structures(struct adapter * adapter) 1892 { 1893 adapter->tx_buffer_area = malloc(sizeof(struct em_buffer) * 1894 adapter->num_tx_desc, M_DEVBUF, M_NOWAIT | M_ZERO); 1895 if (adapter->tx_buffer_area == NULL) { 1896 device_printf(adapter->dev, "Unable to allocate tx_buffer memory\n"); 1897 return(ENOMEM); 1898 } 1899 1900 return(0); 1901 } 1902 1903 /********************************************************************* 1904 * 1905 * Allocate and initialize transmit structures. 1906 * 1907 **********************************************************************/ 1908 static int 1909 em_setup_transmit_structures(struct adapter * adapter) 1910 { 1911 /* 1912 * Setup DMA descriptor areas. 1913 */ 1914 if (bus_dma_tag_create(NULL, /* parent */ 1915 1, 0, /* alignment, bounds */ 1916 BUS_SPACE_MAXADDR, /* lowaddr */ 1917 BUS_SPACE_MAXADDR, /* highaddr */ 1918 NULL, NULL, /* filter, filterarg */ 1919 MCLBYTES * 8, /* maxsize */ 1920 EM_MAX_SCATTER, /* nsegments */ 1921 MCLBYTES * 8, /* maxsegsize */ 1922 BUS_DMA_ALLOCNOW, /* flags */ 1923 &adapter->txtag)) { 1924 device_printf(adapter->dev, "Unable to allocate TX DMA tag\n"); 1925 return(ENOMEM); 1926 } 1927 1928 if (em_allocate_transmit_structures(adapter)) 1929 return(ENOMEM); 1930 1931 bzero((void *) adapter->tx_desc_base, 1932 (sizeof(struct em_tx_desc)) * adapter->num_tx_desc); 1933 1934 adapter->next_avail_tx_desc = 0; 1935 adapter->oldest_used_tx_desc = 0; 1936 1937 /* Set number of descriptors available */ 1938 adapter->num_tx_desc_avail = adapter->num_tx_desc; 1939 1940 /* Set checksum context */ 1941 adapter->active_checksum_context = OFFLOAD_NONE; 1942 1943 return(0); 1944 } 1945 1946 /********************************************************************* 1947 * 1948 * Enable transmit unit. 1949 * 1950 **********************************************************************/ 1951 static void 1952 em_initialize_transmit_unit(struct adapter * adapter) 1953 { 1954 uint32_t reg_tctl; 1955 uint32_t reg_tipg = 0; 1956 uint64_t bus_addr; 1957 1958 INIT_DEBUGOUT("em_initialize_transmit_unit: begin"); 1959 1960 /* Setup the Base and Length of the Tx Descriptor Ring */ 1961 bus_addr = adapter->txdma.dma_paddr; 1962 E1000_WRITE_REG(&adapter->hw, TDBAL, (uint32_t)bus_addr); 1963 E1000_WRITE_REG(&adapter->hw, TDBAH, (uint32_t)(bus_addr >> 32)); 1964 E1000_WRITE_REG(&adapter->hw, TDLEN, 1965 adapter->num_tx_desc * sizeof(struct em_tx_desc)); 1966 1967 /* Setup the HW Tx Head and Tail descriptor pointers */ 1968 E1000_WRITE_REG(&adapter->hw, TDH, 0); 1969 E1000_WRITE_REG(&adapter->hw, TDT, 0); 1970 1971 HW_DEBUGOUT2("Base = %x, Length = %x\n", 1972 E1000_READ_REG(&adapter->hw, TDBAL), 1973 E1000_READ_REG(&adapter->hw, TDLEN)); 1974 1975 /* Set the default values for the Tx Inter Packet Gap timer */ 1976 switch (adapter->hw.mac_type) { 1977 case em_82542_rev2_0: 1978 case em_82542_rev2_1: 1979 reg_tipg = DEFAULT_82542_TIPG_IPGT; 1980 reg_tipg |= DEFAULT_82542_TIPG_IPGR1 << E1000_TIPG_IPGR1_SHIFT; 1981 reg_tipg |= DEFAULT_82542_TIPG_IPGR2 << E1000_TIPG_IPGR2_SHIFT; 1982 break; 1983 default: 1984 if (adapter->hw.media_type == em_media_type_fiber) 1985 reg_tipg = DEFAULT_82543_TIPG_IPGT_FIBER; 1986 else 1987 reg_tipg = DEFAULT_82543_TIPG_IPGT_COPPER; 1988 reg_tipg |= DEFAULT_82543_TIPG_IPGR1 << E1000_TIPG_IPGR1_SHIFT; 1989 reg_tipg |= DEFAULT_82543_TIPG_IPGR2 << E1000_TIPG_IPGR2_SHIFT; 1990 } 1991 1992 E1000_WRITE_REG(&adapter->hw, TIPG, reg_tipg); 1993 E1000_WRITE_REG(&adapter->hw, TIDV, adapter->tx_int_delay.value); 1994 if (adapter->hw.mac_type >= em_82540) 1995 E1000_WRITE_REG(&adapter->hw, TADV, 1996 adapter->tx_abs_int_delay.value); 1997 1998 /* Program the Transmit Control Register */ 1999 reg_tctl = E1000_TCTL_PSP | E1000_TCTL_EN | 2000 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT); 2001 if (adapter->link_duplex == 1) 2002 reg_tctl |= E1000_FDX_COLLISION_DISTANCE << E1000_COLD_SHIFT; 2003 else 2004 reg_tctl |= E1000_HDX_COLLISION_DISTANCE << E1000_COLD_SHIFT; 2005 E1000_WRITE_REG(&adapter->hw, TCTL, reg_tctl); 2006 2007 /* Setup Transmit Descriptor Settings for this adapter */ 2008 adapter->txd_cmd = E1000_TXD_CMD_IFCS | E1000_TXD_CMD_RS; 2009 2010 if (adapter->tx_int_delay.value > 0) 2011 adapter->txd_cmd |= E1000_TXD_CMD_IDE; 2012 } 2013 2014 /********************************************************************* 2015 * 2016 * Free all transmit related data structures. 2017 * 2018 **********************************************************************/ 2019 static void 2020 em_free_transmit_structures(struct adapter * adapter) 2021 { 2022 struct em_buffer *tx_buffer; 2023 int i; 2024 2025 INIT_DEBUGOUT("free_transmit_structures: begin"); 2026 2027 if (adapter->tx_buffer_area != NULL) { 2028 tx_buffer = adapter->tx_buffer_area; 2029 for (i = 0; i < adapter->num_tx_desc; i++, tx_buffer++) { 2030 if (tx_buffer->m_head != NULL) { 2031 bus_dmamap_unload(adapter->txtag, tx_buffer->map); 2032 bus_dmamap_destroy(adapter->txtag, tx_buffer->map); 2033 m_freem(tx_buffer->m_head); 2034 } 2035 tx_buffer->m_head = NULL; 2036 } 2037 } 2038 if (adapter->tx_buffer_area != NULL) { 2039 free(adapter->tx_buffer_area, M_DEVBUF); 2040 adapter->tx_buffer_area = NULL; 2041 } 2042 if (adapter->txtag != NULL) { 2043 bus_dma_tag_destroy(adapter->txtag); 2044 adapter->txtag = NULL; 2045 } 2046 } 2047 2048 /********************************************************************* 2049 * 2050 * The offload context needs to be set when we transfer the first 2051 * packet of a particular protocol (TCP/UDP). We change the 2052 * context only if the protocol type changes. 2053 * 2054 **********************************************************************/ 2055 static void 2056 em_transmit_checksum_setup(struct adapter * adapter, 2057 struct mbuf *mp, 2058 uint32_t *txd_upper, 2059 uint32_t *txd_lower) 2060 { 2061 struct em_context_desc *TXD; 2062 struct em_buffer *tx_buffer; 2063 int curr_txd; 2064 2065 if (mp->m_pkthdr.csum_flags) { 2066 if (mp->m_pkthdr.csum_flags & CSUM_TCP) { 2067 *txd_upper = E1000_TXD_POPTS_TXSM << 8; 2068 *txd_lower = E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D; 2069 if (adapter->active_checksum_context == OFFLOAD_TCP_IP) 2070 return; 2071 else 2072 adapter->active_checksum_context = OFFLOAD_TCP_IP; 2073 } else if (mp->m_pkthdr.csum_flags & CSUM_UDP) { 2074 *txd_upper = E1000_TXD_POPTS_TXSM << 8; 2075 *txd_lower = E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D; 2076 if (adapter->active_checksum_context == OFFLOAD_UDP_IP) 2077 return; 2078 else 2079 adapter->active_checksum_context = OFFLOAD_UDP_IP; 2080 } else { 2081 *txd_upper = 0; 2082 *txd_lower = 0; 2083 return; 2084 } 2085 } else { 2086 *txd_upper = 0; 2087 *txd_lower = 0; 2088 return; 2089 } 2090 2091 /* If we reach this point, the checksum offload context 2092 * needs to be reset. 2093 */ 2094 curr_txd = adapter->next_avail_tx_desc; 2095 tx_buffer = &adapter->tx_buffer_area[curr_txd]; 2096 TXD = (struct em_context_desc *) &adapter->tx_desc_base[curr_txd]; 2097 2098 TXD->lower_setup.ip_fields.ipcss = ETHER_HDR_LEN; 2099 TXD->lower_setup.ip_fields.ipcso = 2100 ETHER_HDR_LEN + offsetof(struct ip, ip_sum); 2101 TXD->lower_setup.ip_fields.ipcse = 2102 htole16(ETHER_HDR_LEN + sizeof(struct ip) - 1); 2103 2104 TXD->upper_setup.tcp_fields.tucss = 2105 ETHER_HDR_LEN + sizeof(struct ip); 2106 TXD->upper_setup.tcp_fields.tucse = htole16(0); 2107 2108 if (adapter->active_checksum_context == OFFLOAD_TCP_IP) { 2109 TXD->upper_setup.tcp_fields.tucso = 2110 ETHER_HDR_LEN + sizeof(struct ip) + 2111 offsetof(struct tcphdr, th_sum); 2112 } else if (adapter->active_checksum_context == OFFLOAD_UDP_IP) { 2113 TXD->upper_setup.tcp_fields.tucso = 2114 ETHER_HDR_LEN + sizeof(struct ip) + 2115 offsetof(struct udphdr, uh_sum); 2116 } 2117 2118 TXD->tcp_seg_setup.data = htole32(0); 2119 TXD->cmd_and_length = htole32(adapter->txd_cmd | E1000_TXD_CMD_DEXT); 2120 2121 tx_buffer->m_head = NULL; 2122 2123 if (++curr_txd == adapter->num_tx_desc) 2124 curr_txd = 0; 2125 2126 adapter->num_tx_desc_avail--; 2127 adapter->next_avail_tx_desc = curr_txd; 2128 } 2129 2130 /********************************************************************** 2131 * 2132 * Examine each tx_buffer in the used queue. If the hardware is done 2133 * processing the packet then free associated resources. The 2134 * tx_buffer is put back on the free queue. 2135 * 2136 **********************************************************************/ 2137 2138 static void 2139 em_clean_transmit_interrupts(struct adapter *adapter) 2140 { 2141 int i, num_avail; 2142 struct em_buffer *tx_buffer; 2143 struct em_tx_desc *tx_desc; 2144 struct ifnet *ifp = &adapter->interface_data.ac_if; 2145 2146 if (adapter->num_tx_desc_avail == adapter->num_tx_desc) 2147 return; 2148 2149 #ifdef DBG_STATS 2150 adapter->clean_tx_interrupts++; 2151 #endif 2152 num_avail = adapter->num_tx_desc_avail; 2153 i = adapter->oldest_used_tx_desc; 2154 2155 tx_buffer = &adapter->tx_buffer_area[i]; 2156 tx_desc = &adapter->tx_desc_base[i]; 2157 2158 bus_dmamap_sync(adapter->txdma.dma_tag, adapter->txdma.dma_map, 2159 BUS_DMASYNC_POSTREAD); 2160 2161 while(tx_desc->upper.fields.status & E1000_TXD_STAT_DD) { 2162 tx_desc->upper.data = 0; 2163 num_avail++; 2164 2165 if (tx_buffer->m_head) { 2166 ifp->if_opackets++; 2167 bus_dmamap_sync(adapter->txtag, tx_buffer->map, 2168 BUS_DMASYNC_POSTWRITE); 2169 bus_dmamap_unload(adapter->txtag, tx_buffer->map); 2170 bus_dmamap_destroy(adapter->txtag, tx_buffer->map); 2171 2172 m_freem(tx_buffer->m_head); 2173 tx_buffer->m_head = NULL; 2174 } 2175 2176 if (++i == adapter->num_tx_desc) 2177 i = 0; 2178 2179 tx_buffer = &adapter->tx_buffer_area[i]; 2180 tx_desc = &adapter->tx_desc_base[i]; 2181 } 2182 2183 bus_dmamap_sync(adapter->txdma.dma_tag, adapter->txdma.dma_map, 2184 BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 2185 2186 adapter->oldest_used_tx_desc = i; 2187 2188 /* 2189 * If we have enough room, clear IFF_OACTIVE to tell the stack 2190 * that it is OK to send packets. 2191 * If there are no pending descriptors, clear the timeout. Otherwise, 2192 * if some descriptors have been freed, restart the timeout. 2193 */ 2194 if (num_avail > EM_TX_CLEANUP_THRESHOLD) { 2195 ifp->if_flags &= ~IFF_OACTIVE; 2196 if (num_avail == adapter->num_tx_desc) 2197 ifp->if_timer = 0; 2198 else if (num_avail == adapter->num_tx_desc_avail) 2199 ifp->if_timer = EM_TX_TIMEOUT; 2200 } 2201 adapter->num_tx_desc_avail = num_avail; 2202 } 2203 2204 /********************************************************************* 2205 * 2206 * Get a buffer from system mbuf buffer pool. 2207 * 2208 **********************************************************************/ 2209 static int 2210 em_get_buf(int i, struct adapter *adapter, struct mbuf *nmp, int how) 2211 { 2212 struct mbuf *mp = nmp; 2213 struct em_buffer *rx_buffer; 2214 struct ifnet *ifp; 2215 bus_addr_t paddr; 2216 int error; 2217 2218 ifp = &adapter->interface_data.ac_if; 2219 2220 if (mp == NULL) { 2221 mp = m_getcl(how, MT_DATA, M_PKTHDR); 2222 if (mp == NULL) { 2223 adapter->mbuf_cluster_failed++; 2224 return(ENOBUFS); 2225 } 2226 mp->m_len = mp->m_pkthdr.len = MCLBYTES; 2227 } else { 2228 mp->m_len = mp->m_pkthdr.len = MCLBYTES; 2229 mp->m_data = mp->m_ext.ext_buf; 2230 mp->m_next = NULL; 2231 } 2232 if (ifp->if_mtu <= ETHERMTU) 2233 m_adj(mp, ETHER_ALIGN); 2234 2235 rx_buffer = &adapter->rx_buffer_area[i]; 2236 2237 /* 2238 * Using memory from the mbuf cluster pool, invoke the 2239 * bus_dma machinery to arrange the memory mapping. 2240 */ 2241 error = bus_dmamap_load(adapter->rxtag, rx_buffer->map, 2242 mtod(mp, void *), mp->m_len, 2243 em_dmamap_cb, &paddr, 0); 2244 if (error) { 2245 m_free(mp); 2246 return(error); 2247 } 2248 rx_buffer->m_head = mp; 2249 adapter->rx_desc_base[i].buffer_addr = htole64(paddr); 2250 bus_dmamap_sync(adapter->rxtag, rx_buffer->map, BUS_DMASYNC_PREREAD); 2251 2252 return(0); 2253 } 2254 2255 /********************************************************************* 2256 * 2257 * Allocate memory for rx_buffer structures. Since we use one 2258 * rx_buffer per received packet, the maximum number of rx_buffer's 2259 * that we'll need is equal to the number of receive descriptors 2260 * that we've allocated. 2261 * 2262 **********************************************************************/ 2263 static int 2264 em_allocate_receive_structures(struct adapter *adapter) 2265 { 2266 int i, error, size; 2267 struct em_buffer *rx_buffer; 2268 2269 size = adapter->num_rx_desc * sizeof(struct em_buffer); 2270 adapter->rx_buffer_area = malloc(size, M_DEVBUF, M_WAITOK | M_ZERO); 2271 2272 error = bus_dma_tag_create(NULL, /* parent */ 2273 1, 0, /* alignment, bounds */ 2274 BUS_SPACE_MAXADDR, /* lowaddr */ 2275 BUS_SPACE_MAXADDR, /* highaddr */ 2276 NULL, NULL, /* filter, filterarg */ 2277 MCLBYTES, /* maxsize */ 2278 1, /* nsegments */ 2279 MCLBYTES, /* maxsegsize */ 2280 BUS_DMA_ALLOCNOW, /* flags */ 2281 &adapter->rxtag); 2282 if (error != 0) { 2283 device_printf(adapter->dev, "em_allocate_receive_structures: " 2284 "bus_dma_tag_create failed; error %u\n", error); 2285 goto fail_0; 2286 } 2287 2288 rx_buffer = adapter->rx_buffer_area; 2289 for (i = 0; i < adapter->num_rx_desc; i++, rx_buffer++) { 2290 error = bus_dmamap_create(adapter->rxtag, BUS_DMA_NOWAIT, 2291 &rx_buffer->map); 2292 if (error != 0) { 2293 device_printf(adapter->dev, 2294 "em_allocate_receive_structures: " 2295 "bus_dmamap_create failed; error %u\n", 2296 error); 2297 goto fail_1; 2298 } 2299 } 2300 2301 for (i = 0; i < adapter->num_rx_desc; i++) { 2302 error = em_get_buf(i, adapter, NULL, MB_WAIT); 2303 if (error != 0) { 2304 adapter->rx_buffer_area[i].m_head = NULL; 2305 adapter->rx_desc_base[i].buffer_addr = 0; 2306 return(error); 2307 } 2308 } 2309 2310 bus_dmamap_sync(adapter->rxdma.dma_tag, adapter->rxdma.dma_map, 2311 BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 2312 2313 return(0); 2314 2315 fail_1: 2316 bus_dma_tag_destroy(adapter->rxtag); 2317 fail_0: 2318 adapter->rxtag = NULL; 2319 free(adapter->rx_buffer_area, M_DEVBUF); 2320 adapter->rx_buffer_area = NULL; 2321 return(error); 2322 } 2323 2324 /********************************************************************* 2325 * 2326 * Allocate and initialize receive structures. 2327 * 2328 **********************************************************************/ 2329 static int 2330 em_setup_receive_structures(struct adapter *adapter) 2331 { 2332 bzero((void *) adapter->rx_desc_base, 2333 (sizeof(struct em_rx_desc)) * adapter->num_rx_desc); 2334 2335 if (em_allocate_receive_structures(adapter)) 2336 return(ENOMEM); 2337 2338 /* Setup our descriptor pointers */ 2339 adapter->next_rx_desc_to_check = 0; 2340 return(0); 2341 } 2342 2343 /********************************************************************* 2344 * 2345 * Enable receive unit. 2346 * 2347 **********************************************************************/ 2348 static void 2349 em_initialize_receive_unit(struct adapter *adapter) 2350 { 2351 uint32_t reg_rctl; 2352 uint32_t reg_rxcsum; 2353 struct ifnet *ifp; 2354 uint64_t bus_addr; 2355 2356 INIT_DEBUGOUT("em_initialize_receive_unit: begin"); 2357 2358 ifp = &adapter->interface_data.ac_if; 2359 2360 /* Make sure receives are disabled while setting up the descriptor ring */ 2361 E1000_WRITE_REG(&adapter->hw, RCTL, 0); 2362 2363 /* Set the Receive Delay Timer Register */ 2364 E1000_WRITE_REG(&adapter->hw, RDTR, 2365 adapter->rx_int_delay.value | E1000_RDT_FPDB); 2366 2367 if(adapter->hw.mac_type >= em_82540) { 2368 E1000_WRITE_REG(&adapter->hw, RADV, 2369 adapter->rx_abs_int_delay.value); 2370 2371 /* Set the interrupt throttling rate in 256ns increments */ 2372 if (em_int_throttle_ceil) { 2373 E1000_WRITE_REG(&adapter->hw, ITR, 2374 1000000000 / 256 / em_int_throttle_ceil); 2375 } else { 2376 E1000_WRITE_REG(&adapter->hw, ITR, 0); 2377 } 2378 } 2379 2380 /* Setup the Base and Length of the Rx Descriptor Ring */ 2381 bus_addr = adapter->rxdma.dma_paddr; 2382 E1000_WRITE_REG(&adapter->hw, RDBAL, (uint32_t)bus_addr); 2383 E1000_WRITE_REG(&adapter->hw, RDBAH, (uint32_t)(bus_addr >> 32)); 2384 E1000_WRITE_REG(&adapter->hw, RDLEN, adapter->num_rx_desc * 2385 sizeof(struct em_rx_desc)); 2386 2387 /* Setup the HW Rx Head and Tail Descriptor Pointers */ 2388 E1000_WRITE_REG(&adapter->hw, RDH, 0); 2389 E1000_WRITE_REG(&adapter->hw, RDT, adapter->num_rx_desc - 1); 2390 2391 /* Setup the Receive Control Register */ 2392 reg_rctl = E1000_RCTL_EN | E1000_RCTL_BAM | E1000_RCTL_LBM_NO | 2393 E1000_RCTL_RDMTS_HALF | 2394 (adapter->hw.mc_filter_type << E1000_RCTL_MO_SHIFT); 2395 2396 if (adapter->hw.tbi_compatibility_on == TRUE) 2397 reg_rctl |= E1000_RCTL_SBP; 2398 2399 switch (adapter->rx_buffer_len) { 2400 default: 2401 case EM_RXBUFFER_2048: 2402 reg_rctl |= E1000_RCTL_SZ_2048; 2403 break; 2404 case EM_RXBUFFER_4096: 2405 reg_rctl |= E1000_RCTL_SZ_4096 | E1000_RCTL_BSEX | E1000_RCTL_LPE; 2406 break; 2407 case EM_RXBUFFER_8192: 2408 reg_rctl |= E1000_RCTL_SZ_8192 | E1000_RCTL_BSEX | E1000_RCTL_LPE; 2409 break; 2410 case EM_RXBUFFER_16384: 2411 reg_rctl |= E1000_RCTL_SZ_16384 | E1000_RCTL_BSEX | E1000_RCTL_LPE; 2412 break; 2413 } 2414 2415 if (ifp->if_mtu > ETHERMTU) 2416 reg_rctl |= E1000_RCTL_LPE; 2417 2418 /* Enable 82543 Receive Checksum Offload for TCP and UDP */ 2419 if ((adapter->hw.mac_type >= em_82543) && 2420 (ifp->if_capenable & IFCAP_RXCSUM)) { 2421 reg_rxcsum = E1000_READ_REG(&adapter->hw, RXCSUM); 2422 reg_rxcsum |= (E1000_RXCSUM_IPOFL | E1000_RXCSUM_TUOFL); 2423 E1000_WRITE_REG(&adapter->hw, RXCSUM, reg_rxcsum); 2424 } 2425 2426 /* Enable Receives */ 2427 E1000_WRITE_REG(&adapter->hw, RCTL, reg_rctl); 2428 } 2429 2430 /********************************************************************* 2431 * 2432 * Free receive related data structures. 2433 * 2434 **********************************************************************/ 2435 static void 2436 em_free_receive_structures(struct adapter *adapter) 2437 { 2438 struct em_buffer *rx_buffer; 2439 int i; 2440 2441 INIT_DEBUGOUT("free_receive_structures: begin"); 2442 2443 if (adapter->rx_buffer_area != NULL) { 2444 rx_buffer = adapter->rx_buffer_area; 2445 for (i = 0; i < adapter->num_rx_desc; i++, rx_buffer++) { 2446 if (rx_buffer->map != NULL) { 2447 bus_dmamap_unload(adapter->rxtag, rx_buffer->map); 2448 bus_dmamap_destroy(adapter->rxtag, rx_buffer->map); 2449 } 2450 if (rx_buffer->m_head != NULL) 2451 m_freem(rx_buffer->m_head); 2452 rx_buffer->m_head = NULL; 2453 } 2454 } 2455 if (adapter->rx_buffer_area != NULL) { 2456 free(adapter->rx_buffer_area, M_DEVBUF); 2457 adapter->rx_buffer_area = NULL; 2458 } 2459 if (adapter->rxtag != NULL) { 2460 bus_dma_tag_destroy(adapter->rxtag); 2461 adapter->rxtag = NULL; 2462 } 2463 } 2464 2465 /********************************************************************* 2466 * 2467 * This routine executes in interrupt context. It replenishes 2468 * the mbufs in the descriptor and sends data which has been 2469 * dma'ed into host memory to upper layer. 2470 * 2471 * We loop at most count times if count is > 0, or until done if 2472 * count < 0. 2473 * 2474 *********************************************************************/ 2475 static void 2476 em_process_receive_interrupts(struct adapter *adapter, int count) 2477 { 2478 struct ifnet *ifp; 2479 struct mbuf *mp; 2480 uint8_t accept_frame = 0; 2481 uint8_t eop = 0; 2482 uint16_t len, desc_len, prev_len_adj; 2483 int i; 2484 2485 /* Pointer to the receive descriptor being examined. */ 2486 struct em_rx_desc *current_desc; 2487 2488 ifp = &adapter->interface_data.ac_if; 2489 i = adapter->next_rx_desc_to_check; 2490 current_desc = &adapter->rx_desc_base[i]; 2491 2492 bus_dmamap_sync(adapter->rxdma.dma_tag, adapter->rxdma.dma_map, 2493 BUS_DMASYNC_POSTREAD); 2494 2495 if (!((current_desc->status) & E1000_RXD_STAT_DD)) { 2496 #ifdef DBG_STATS 2497 adapter->no_pkts_avail++; 2498 #endif 2499 return; 2500 } 2501 while ((current_desc->status & E1000_RXD_STAT_DD) && (count != 0)) { 2502 mp = adapter->rx_buffer_area[i].m_head; 2503 bus_dmamap_sync(adapter->rxtag, adapter->rx_buffer_area[i].map, 2504 BUS_DMASYNC_POSTREAD); 2505 2506 accept_frame = 1; 2507 prev_len_adj = 0; 2508 desc_len = le16toh(current_desc->length); 2509 if (current_desc->status & E1000_RXD_STAT_EOP) { 2510 count--; 2511 eop = 1; 2512 if (desc_len < ETHER_CRC_LEN) { 2513 len = 0; 2514 prev_len_adj = ETHER_CRC_LEN - desc_len; 2515 } 2516 else { 2517 len = desc_len - ETHER_CRC_LEN; 2518 } 2519 } else { 2520 eop = 0; 2521 len = desc_len; 2522 } 2523 2524 if (current_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK) { 2525 uint8_t last_byte; 2526 uint32_t pkt_len = desc_len; 2527 2528 if (adapter->fmp != NULL) 2529 pkt_len += adapter->fmp->m_pkthdr.len; 2530 2531 last_byte = *(mtod(mp, caddr_t) + desc_len - 1); 2532 2533 if (TBI_ACCEPT(&adapter->hw, current_desc->status, 2534 current_desc->errors, 2535 pkt_len, last_byte)) { 2536 em_tbi_adjust_stats(&adapter->hw, 2537 &adapter->stats, 2538 pkt_len, 2539 adapter->hw.mac_addr); 2540 if (len > 0) 2541 len--; 2542 } 2543 else { 2544 accept_frame = 0; 2545 } 2546 } 2547 2548 if (accept_frame) { 2549 if (em_get_buf(i, adapter, NULL, MB_DONTWAIT) == ENOBUFS) { 2550 adapter->dropped_pkts++; 2551 em_get_buf(i, adapter, mp, MB_DONTWAIT); 2552 if (adapter->fmp != NULL) 2553 m_freem(adapter->fmp); 2554 adapter->fmp = NULL; 2555 adapter->lmp = NULL; 2556 break; 2557 } 2558 2559 /* Assign correct length to the current fragment */ 2560 mp->m_len = len; 2561 2562 if (adapter->fmp == NULL) { 2563 mp->m_pkthdr.len = len; 2564 adapter->fmp = mp; /* Store the first mbuf */ 2565 adapter->lmp = mp; 2566 } else { 2567 /* Chain mbuf's together */ 2568 /* 2569 * Adjust length of previous mbuf in chain if we 2570 * received less than 4 bytes in the last descriptor. 2571 */ 2572 if (prev_len_adj > 0) { 2573 adapter->lmp->m_len -= prev_len_adj; 2574 adapter->fmp->m_pkthdr.len -= prev_len_adj; 2575 } 2576 adapter->lmp->m_next = mp; 2577 adapter->lmp = adapter->lmp->m_next; 2578 adapter->fmp->m_pkthdr.len += len; 2579 } 2580 2581 if (eop) { 2582 adapter->fmp->m_pkthdr.rcvif = ifp; 2583 ifp->if_ipackets++; 2584 2585 em_receive_checksum(adapter, current_desc, 2586 adapter->fmp); 2587 if (current_desc->status & E1000_RXD_STAT_VP) 2588 VLAN_INPUT_TAG(adapter->fmp, 2589 (current_desc->special & 2590 E1000_RXD_SPC_VLAN_MASK)); 2591 else 2592 (*ifp->if_input)(ifp, adapter->fmp); 2593 adapter->fmp = NULL; 2594 adapter->lmp = NULL; 2595 } 2596 } else { 2597 adapter->dropped_pkts++; 2598 em_get_buf(i, adapter, mp, MB_DONTWAIT); 2599 if (adapter->fmp != NULL) 2600 m_freem(adapter->fmp); 2601 adapter->fmp = NULL; 2602 adapter->lmp = NULL; 2603 } 2604 2605 /* Zero out the receive descriptors status */ 2606 current_desc->status = 0; 2607 2608 /* Advance the E1000's Receive Queue #0 "Tail Pointer". */ 2609 E1000_WRITE_REG(&adapter->hw, RDT, i); 2610 2611 /* Advance our pointers to the next descriptor */ 2612 if (++i == adapter->num_rx_desc) { 2613 i = 0; 2614 current_desc = adapter->rx_desc_base; 2615 } else 2616 current_desc++; 2617 } 2618 2619 bus_dmamap_sync(adapter->rxdma.dma_tag, adapter->rxdma.dma_map, 2620 BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 2621 2622 adapter->next_rx_desc_to_check = i; 2623 } 2624 2625 /********************************************************************* 2626 * 2627 * Verify that the hardware indicated that the checksum is valid. 2628 * Inform the stack about the status of checksum so that stack 2629 * doesn't spend time verifying the checksum. 2630 * 2631 *********************************************************************/ 2632 static void 2633 em_receive_checksum(struct adapter *adapter, 2634 struct em_rx_desc *rx_desc, 2635 struct mbuf *mp) 2636 { 2637 /* 82543 or newer only */ 2638 if ((adapter->hw.mac_type < em_82543) || 2639 /* Ignore Checksum bit is set */ 2640 (rx_desc->status & E1000_RXD_STAT_IXSM)) { 2641 mp->m_pkthdr.csum_flags = 0; 2642 return; 2643 } 2644 2645 if (rx_desc->status & E1000_RXD_STAT_IPCS) { 2646 /* Did it pass? */ 2647 if (!(rx_desc->errors & E1000_RXD_ERR_IPE)) { 2648 /* IP Checksum Good */ 2649 mp->m_pkthdr.csum_flags = CSUM_IP_CHECKED; 2650 mp->m_pkthdr.csum_flags |= CSUM_IP_VALID; 2651 } else { 2652 mp->m_pkthdr.csum_flags = 0; 2653 } 2654 } 2655 2656 if (rx_desc->status & E1000_RXD_STAT_TCPCS) { 2657 /* Did it pass? */ 2658 if (!(rx_desc->errors & E1000_RXD_ERR_TCPE)) { 2659 mp->m_pkthdr.csum_flags |= 2660 (CSUM_DATA_VALID | CSUM_PSEUDO_HDR); 2661 mp->m_pkthdr.csum_data = htons(0xffff); 2662 } 2663 } 2664 } 2665 2666 2667 static void 2668 em_enable_vlans(struct adapter *adapter) 2669 { 2670 uint32_t ctrl; 2671 2672 E1000_WRITE_REG(&adapter->hw, VET, ETHERTYPE_VLAN); 2673 2674 ctrl = E1000_READ_REG(&adapter->hw, CTRL); 2675 ctrl |= E1000_CTRL_VME; 2676 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl); 2677 } 2678 2679 /* 2680 * note: we must call bus_enable_intr() prior to enabling the hardware 2681 * interrupt and bus_disable_intr() after disabling the hardware interrupt 2682 * in order to avoid handler execution races from scheduled interrupt 2683 * threads. 2684 */ 2685 static void 2686 em_enable_intr(struct adapter *adapter) 2687 { 2688 struct ifnet *ifp = &adapter->interface_data.ac_if; 2689 2690 if ((ifp->if_flags & IFF_POLLING) == 0) { 2691 lwkt_serialize_handler_enable(&adapter->serializer); 2692 E1000_WRITE_REG(&adapter->hw, IMS, (IMS_ENABLE_MASK)); 2693 } 2694 } 2695 2696 static void 2697 em_disable_intr(struct adapter *adapter) 2698 { 2699 /* 2700 * The first version of 82542 had an errata where when link was 2701 * forced it would stay up even up even if the cable was disconnected. 2702 * Sequence errors were used to detect the disconnect and then the 2703 * driver would unforce the link. This code in the in the ISR. For 2704 * this to work correctly the Sequence error interrupt had to be 2705 * enabled all the time. 2706 */ 2707 if (adapter->hw.mac_type == em_82542_rev2_0) { 2708 E1000_WRITE_REG(&adapter->hw, IMC, 2709 (0xffffffff & ~E1000_IMC_RXSEQ)); 2710 } else { 2711 E1000_WRITE_REG(&adapter->hw, IMC, 0xffffffff); 2712 } 2713 2714 lwkt_serialize_handler_disable(&adapter->serializer); 2715 } 2716 2717 static int 2718 em_is_valid_ether_addr(uint8_t *addr) 2719 { 2720 char zero_addr[6] = { 0, 0, 0, 0, 0, 0 }; 2721 2722 if ((addr[0] & 1) || (!bcmp(addr, zero_addr, ETHER_ADDR_LEN))) 2723 return(FALSE); 2724 else 2725 return(TRUE); 2726 } 2727 2728 void 2729 em_write_pci_cfg(struct em_hw *hw, uint32_t reg, uint16_t *value) 2730 { 2731 pci_write_config(((struct em_osdep *)hw->back)->dev, reg, *value, 2); 2732 } 2733 2734 void 2735 em_read_pci_cfg(struct em_hw *hw, uint32_t reg, uint16_t *value) 2736 { 2737 *value = pci_read_config(((struct em_osdep *)hw->back)->dev, reg, 2); 2738 } 2739 2740 void 2741 em_pci_set_mwi(struct em_hw *hw) 2742 { 2743 pci_write_config(((struct em_osdep *)hw->back)->dev, PCIR_COMMAND, 2744 (hw->pci_cmd_word | CMD_MEM_WRT_INVALIDATE), 2); 2745 } 2746 2747 void 2748 em_pci_clear_mwi(struct em_hw *hw) 2749 { 2750 pci_write_config(((struct em_osdep *)hw->back)->dev, PCIR_COMMAND, 2751 (hw->pci_cmd_word & ~CMD_MEM_WRT_INVALIDATE), 2); 2752 } 2753 2754 uint32_t 2755 em_read_reg_io(struct em_hw *hw, uint32_t offset) 2756 { 2757 bus_space_write_4(hw->reg_io_tag, hw->reg_io_handle, 0, offset); 2758 return(bus_space_read_4(hw->reg_io_tag, hw->reg_io_handle, 4)); 2759 } 2760 2761 void 2762 em_write_reg_io(struct em_hw *hw, uint32_t offset, uint32_t value) 2763 { 2764 bus_space_write_4(hw->reg_io_tag, hw->reg_io_handle, 0, offset); 2765 bus_space_write_4(hw->reg_io_tag, hw->reg_io_handle, 4, value); 2766 } 2767 2768 /********************************************************************* 2769 * 82544 Coexistence issue workaround. 2770 * There are 2 issues. 2771 * 1. Transmit Hang issue. 2772 * To detect this issue, following equation can be used... 2773 * SIZE[3:0] + ADDR[2:0] = SUM[3:0]. 2774 * If SUM[3:0] is in between 1 to 4, we will have this issue. 2775 * 2776 * 2. DAC issue. 2777 * To detect this issue, following equation can be used... 2778 * SIZE[3:0] + ADDR[2:0] = SUM[3:0]. 2779 * If SUM[3:0] is in between 9 to c, we will have this issue. 2780 * 2781 * 2782 * WORKAROUND: 2783 * Make sure we do not have ending address as 1,2,3,4(Hang) or 2784 * 9,a,b,c (DAC) 2785 * 2786 *************************************************************************/ 2787 static uint32_t 2788 em_fill_descriptors(uint64_t address, uint32_t length, PDESC_ARRAY desc_array) 2789 { 2790 /* Since issue is sensitive to length and address.*/ 2791 /* Let us first check the address...*/ 2792 uint32_t safe_terminator; 2793 if (length <= 4) { 2794 desc_array->descriptor[0].address = address; 2795 desc_array->descriptor[0].length = length; 2796 desc_array->elements = 1; 2797 return(desc_array->elements); 2798 } 2799 safe_terminator = (uint32_t)((((uint32_t)address & 0x7) + (length & 0xF)) & 0xF); 2800 /* if it does not fall between 0x1 to 0x4 and 0x9 to 0xC then return */ 2801 if (safe_terminator == 0 || 2802 (safe_terminator > 4 && safe_terminator < 9) || 2803 (safe_terminator > 0xC && safe_terminator <= 0xF)) { 2804 desc_array->descriptor[0].address = address; 2805 desc_array->descriptor[0].length = length; 2806 desc_array->elements = 1; 2807 return(desc_array->elements); 2808 } 2809 2810 desc_array->descriptor[0].address = address; 2811 desc_array->descriptor[0].length = length - 4; 2812 desc_array->descriptor[1].address = address + (length - 4); 2813 desc_array->descriptor[1].length = 4; 2814 desc_array->elements = 2; 2815 return(desc_array->elements); 2816 } 2817 2818 /********************************************************************** 2819 * 2820 * Update the board statistics counters. 2821 * 2822 **********************************************************************/ 2823 static void 2824 em_update_stats_counters(struct adapter *adapter) 2825 { 2826 struct ifnet *ifp; 2827 2828 if (adapter->hw.media_type == em_media_type_copper || 2829 (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU)) { 2830 adapter->stats.symerrs += E1000_READ_REG(&adapter->hw, SYMERRS); 2831 adapter->stats.sec += E1000_READ_REG(&adapter->hw, SEC); 2832 } 2833 adapter->stats.crcerrs += E1000_READ_REG(&adapter->hw, CRCERRS); 2834 adapter->stats.mpc += E1000_READ_REG(&adapter->hw, MPC); 2835 adapter->stats.scc += E1000_READ_REG(&adapter->hw, SCC); 2836 adapter->stats.ecol += E1000_READ_REG(&adapter->hw, ECOL); 2837 2838 adapter->stats.mcc += E1000_READ_REG(&adapter->hw, MCC); 2839 adapter->stats.latecol += E1000_READ_REG(&adapter->hw, LATECOL); 2840 adapter->stats.colc += E1000_READ_REG(&adapter->hw, COLC); 2841 adapter->stats.dc += E1000_READ_REG(&adapter->hw, DC); 2842 adapter->stats.rlec += E1000_READ_REG(&adapter->hw, RLEC); 2843 adapter->stats.xonrxc += E1000_READ_REG(&adapter->hw, XONRXC); 2844 adapter->stats.xontxc += E1000_READ_REG(&adapter->hw, XONTXC); 2845 adapter->stats.xoffrxc += E1000_READ_REG(&adapter->hw, XOFFRXC); 2846 adapter->stats.xofftxc += E1000_READ_REG(&adapter->hw, XOFFTXC); 2847 adapter->stats.fcruc += E1000_READ_REG(&adapter->hw, FCRUC); 2848 adapter->stats.prc64 += E1000_READ_REG(&adapter->hw, PRC64); 2849 adapter->stats.prc127 += E1000_READ_REG(&adapter->hw, PRC127); 2850 adapter->stats.prc255 += E1000_READ_REG(&adapter->hw, PRC255); 2851 adapter->stats.prc511 += E1000_READ_REG(&adapter->hw, PRC511); 2852 adapter->stats.prc1023 += E1000_READ_REG(&adapter->hw, PRC1023); 2853 adapter->stats.prc1522 += E1000_READ_REG(&adapter->hw, PRC1522); 2854 adapter->stats.gprc += E1000_READ_REG(&adapter->hw, GPRC); 2855 adapter->stats.bprc += E1000_READ_REG(&adapter->hw, BPRC); 2856 adapter->stats.mprc += E1000_READ_REG(&adapter->hw, MPRC); 2857 adapter->stats.gptc += E1000_READ_REG(&adapter->hw, GPTC); 2858 2859 /* For the 64-bit byte counters the low dword must be read first. */ 2860 /* Both registers clear on the read of the high dword */ 2861 2862 adapter->stats.gorcl += E1000_READ_REG(&adapter->hw, GORCL); 2863 adapter->stats.gorch += E1000_READ_REG(&adapter->hw, GORCH); 2864 adapter->stats.gotcl += E1000_READ_REG(&adapter->hw, GOTCL); 2865 adapter->stats.gotch += E1000_READ_REG(&adapter->hw, GOTCH); 2866 2867 adapter->stats.rnbc += E1000_READ_REG(&adapter->hw, RNBC); 2868 adapter->stats.ruc += E1000_READ_REG(&adapter->hw, RUC); 2869 adapter->stats.rfc += E1000_READ_REG(&adapter->hw, RFC); 2870 adapter->stats.roc += E1000_READ_REG(&adapter->hw, ROC); 2871 adapter->stats.rjc += E1000_READ_REG(&adapter->hw, RJC); 2872 2873 adapter->stats.torl += E1000_READ_REG(&adapter->hw, TORL); 2874 adapter->stats.torh += E1000_READ_REG(&adapter->hw, TORH); 2875 adapter->stats.totl += E1000_READ_REG(&adapter->hw, TOTL); 2876 adapter->stats.toth += E1000_READ_REG(&adapter->hw, TOTH); 2877 2878 adapter->stats.tpr += E1000_READ_REG(&adapter->hw, TPR); 2879 adapter->stats.tpt += E1000_READ_REG(&adapter->hw, TPT); 2880 adapter->stats.ptc64 += E1000_READ_REG(&adapter->hw, PTC64); 2881 adapter->stats.ptc127 += E1000_READ_REG(&adapter->hw, PTC127); 2882 adapter->stats.ptc255 += E1000_READ_REG(&adapter->hw, PTC255); 2883 adapter->stats.ptc511 += E1000_READ_REG(&adapter->hw, PTC511); 2884 adapter->stats.ptc1023 += E1000_READ_REG(&adapter->hw, PTC1023); 2885 adapter->stats.ptc1522 += E1000_READ_REG(&adapter->hw, PTC1522); 2886 adapter->stats.mptc += E1000_READ_REG(&adapter->hw, MPTC); 2887 adapter->stats.bptc += E1000_READ_REG(&adapter->hw, BPTC); 2888 2889 if (adapter->hw.mac_type >= em_82543) { 2890 adapter->stats.algnerrc += 2891 E1000_READ_REG(&adapter->hw, ALGNERRC); 2892 adapter->stats.rxerrc += 2893 E1000_READ_REG(&adapter->hw, RXERRC); 2894 adapter->stats.tncrs += 2895 E1000_READ_REG(&adapter->hw, TNCRS); 2896 adapter->stats.cexterr += 2897 E1000_READ_REG(&adapter->hw, CEXTERR); 2898 adapter->stats.tsctc += 2899 E1000_READ_REG(&adapter->hw, TSCTC); 2900 adapter->stats.tsctfc += 2901 E1000_READ_REG(&adapter->hw, TSCTFC); 2902 } 2903 ifp = &adapter->interface_data.ac_if; 2904 2905 /* Fill out the OS statistics structure */ 2906 ifp->if_ibytes = adapter->stats.gorcl; 2907 ifp->if_obytes = adapter->stats.gotcl; 2908 ifp->if_imcasts = adapter->stats.mprc; 2909 ifp->if_collisions = adapter->stats.colc; 2910 2911 /* Rx Errors */ 2912 ifp->if_ierrors = adapter->dropped_pkts + adapter->stats.rxerrc + 2913 adapter->stats.crcerrs + adapter->stats.algnerrc + 2914 adapter->stats.rlec + adapter->stats.mpc + adapter->stats.cexterr; 2915 2916 /* Tx Errors */ 2917 ifp->if_oerrors = adapter->stats.ecol + adapter->stats.latecol; 2918 } 2919 2920 2921 /********************************************************************** 2922 * 2923 * This routine is called only when em_display_debug_stats is enabled. 2924 * This routine provides a way to take a look at important statistics 2925 * maintained by the driver and hardware. 2926 * 2927 **********************************************************************/ 2928 static void 2929 em_print_debug_info(struct adapter *adapter) 2930 { 2931 device_t dev= adapter->dev; 2932 uint8_t *hw_addr = adapter->hw.hw_addr; 2933 2934 device_printf(dev, "Adapter hardware address = %p \n", hw_addr); 2935 device_printf(dev, "CTRL = 0x%x\n", 2936 E1000_READ_REG(&adapter->hw, CTRL)); 2937 device_printf(dev, "RCTL = 0x%x PS=(0x8402)\n", 2938 E1000_READ_REG(&adapter->hw, RCTL)); 2939 device_printf(dev, "tx_int_delay = %d, tx_abs_int_delay = %d\n", 2940 E1000_READ_REG(&adapter->hw, TIDV), 2941 E1000_READ_REG(&adapter->hw, TADV)); 2942 device_printf(dev, "rx_int_delay = %d, rx_abs_int_delay = %d\n", 2943 E1000_READ_REG(&adapter->hw, RDTR), 2944 E1000_READ_REG(&adapter->hw, RADV)); 2945 #ifdef DBG_STATS 2946 device_printf(dev, "Packets not Avail = %ld\n", adapter->no_pkts_avail); 2947 device_printf(dev, "CleanTxInterrupts = %ld\n", 2948 adapter->clean_tx_interrupts); 2949 #endif 2950 device_printf(dev, "fifo workaround = %lld, fifo_reset = %lld\n", 2951 (long long)adapter->tx_fifo_wrk_cnt, 2952 (long long)adapter->tx_fifo_reset_cnt); 2953 device_printf(dev, "hw tdh = %d, hw tdt = %d\n", 2954 E1000_READ_REG(&adapter->hw, TDH), 2955 E1000_READ_REG(&adapter->hw, TDT)); 2956 device_printf(dev, "Num Tx descriptors avail = %d\n", 2957 adapter->num_tx_desc_avail); 2958 device_printf(dev, "Tx Descriptors not avail1 = %ld\n", 2959 adapter->no_tx_desc_avail1); 2960 device_printf(dev, "Tx Descriptors not avail2 = %ld\n", 2961 adapter->no_tx_desc_avail2); 2962 device_printf(dev, "Std mbuf failed = %ld\n", 2963 adapter->mbuf_alloc_failed); 2964 device_printf(dev, "Std mbuf cluster failed = %ld\n", 2965 adapter->mbuf_cluster_failed); 2966 device_printf(dev, "Driver dropped packets = %ld\n", 2967 adapter->dropped_pkts); 2968 } 2969 2970 static void 2971 em_print_hw_stats(struct adapter *adapter) 2972 { 2973 device_t dev= adapter->dev; 2974 2975 device_printf(dev, "Adapter: %p\n", adapter); 2976 2977 device_printf(dev, "Excessive collisions = %lld\n", 2978 (long long)adapter->stats.ecol); 2979 device_printf(dev, "Symbol errors = %lld\n", 2980 (long long)adapter->stats.symerrs); 2981 device_printf(dev, "Sequence errors = %lld\n", 2982 (long long)adapter->stats.sec); 2983 device_printf(dev, "Defer count = %lld\n", 2984 (long long)adapter->stats.dc); 2985 2986 device_printf(dev, "Missed Packets = %lld\n", 2987 (long long)adapter->stats.mpc); 2988 device_printf(dev, "Receive No Buffers = %lld\n", 2989 (long long)adapter->stats.rnbc); 2990 device_printf(dev, "Receive length errors = %lld\n", 2991 (long long)adapter->stats.rlec); 2992 device_printf(dev, "Receive errors = %lld\n", 2993 (long long)adapter->stats.rxerrc); 2994 device_printf(dev, "Crc errors = %lld\n", 2995 (long long)adapter->stats.crcerrs); 2996 device_printf(dev, "Alignment errors = %lld\n", 2997 (long long)adapter->stats.algnerrc); 2998 device_printf(dev, "Carrier extension errors = %lld\n", 2999 (long long)adapter->stats.cexterr); 3000 3001 device_printf(dev, "XON Rcvd = %lld\n", 3002 (long long)adapter->stats.xonrxc); 3003 device_printf(dev, "XON Xmtd = %lld\n", 3004 (long long)adapter->stats.xontxc); 3005 device_printf(dev, "XOFF Rcvd = %lld\n", 3006 (long long)adapter->stats.xoffrxc); 3007 device_printf(dev, "XOFF Xmtd = %lld\n", 3008 (long long)adapter->stats.xofftxc); 3009 3010 device_printf(dev, "Good Packets Rcvd = %lld\n", 3011 (long long)adapter->stats.gprc); 3012 device_printf(dev, "Good Packets Xmtd = %lld\n", 3013 (long long)adapter->stats.gptc); 3014 } 3015 3016 static int 3017 em_sysctl_debug_info(SYSCTL_HANDLER_ARGS) 3018 { 3019 int error; 3020 int result; 3021 struct adapter *adapter; 3022 3023 result = -1; 3024 error = sysctl_handle_int(oidp, &result, 0, req); 3025 3026 if (error || !req->newptr) 3027 return(error); 3028 3029 if (result == 1) { 3030 adapter = (struct adapter *)arg1; 3031 em_print_debug_info(adapter); 3032 } 3033 3034 return(error); 3035 } 3036 3037 static int 3038 em_sysctl_stats(SYSCTL_HANDLER_ARGS) 3039 { 3040 int error; 3041 int result; 3042 struct adapter *adapter; 3043 3044 result = -1; 3045 error = sysctl_handle_int(oidp, &result, 0, req); 3046 3047 if (error || !req->newptr) 3048 return(error); 3049 3050 if (result == 1) { 3051 adapter = (struct adapter *)arg1; 3052 em_print_hw_stats(adapter); 3053 } 3054 3055 return(error); 3056 } 3057 3058 static int 3059 em_sysctl_int_delay(SYSCTL_HANDLER_ARGS) 3060 { 3061 struct em_int_delay_info *info; 3062 struct adapter *adapter; 3063 uint32_t regval; 3064 int error; 3065 int usecs; 3066 int ticks; 3067 3068 info = (struct em_int_delay_info *)arg1; 3069 adapter = info->adapter; 3070 usecs = info->value; 3071 error = sysctl_handle_int(oidp, &usecs, 0, req); 3072 if (error != 0 || req->newptr == NULL) 3073 return(error); 3074 if (usecs < 0 || usecs > E1000_TICKS_TO_USECS(65535)) 3075 return(EINVAL); 3076 info->value = usecs; 3077 ticks = E1000_USECS_TO_TICKS(usecs); 3078 3079 lwkt_serialize_enter(&adapter->serializer); 3080 regval = E1000_READ_OFFSET(&adapter->hw, info->offset); 3081 regval = (regval & ~0xffff) | (ticks & 0xffff); 3082 /* Handle a few special cases. */ 3083 switch (info->offset) { 3084 case E1000_RDTR: 3085 case E1000_82542_RDTR: 3086 regval |= E1000_RDT_FPDB; 3087 break; 3088 case E1000_TIDV: 3089 case E1000_82542_TIDV: 3090 if (ticks == 0) { 3091 adapter->txd_cmd &= ~E1000_TXD_CMD_IDE; 3092 /* Don't write 0 into the TIDV register. */ 3093 regval++; 3094 } else 3095 adapter->txd_cmd |= E1000_TXD_CMD_IDE; 3096 break; 3097 } 3098 E1000_WRITE_OFFSET(&adapter->hw, info->offset, regval); 3099 lwkt_serialize_exit(&adapter->serializer); 3100 return(0); 3101 } 3102 3103 static void 3104 em_add_int_delay_sysctl(struct adapter *adapter, const char *name, 3105 const char *description, struct em_int_delay_info *info, 3106 int offset, int value) 3107 { 3108 info->adapter = adapter; 3109 info->offset = offset; 3110 info->value = value; 3111 SYSCTL_ADD_PROC(&adapter->sysctl_ctx, 3112 SYSCTL_CHILDREN(adapter->sysctl_tree), 3113 OID_AUTO, name, CTLTYPE_INT|CTLFLAG_RW, 3114 info, 0, em_sysctl_int_delay, "I", description); 3115 } 3116 3117 static int 3118 em_sysctl_int_throttle(SYSCTL_HANDLER_ARGS) 3119 { 3120 struct adapter *adapter = (void *)arg1; 3121 int error; 3122 int throttle; 3123 3124 throttle = em_int_throttle_ceil; 3125 error = sysctl_handle_int(oidp, &throttle, 0, req); 3126 if (error || req->newptr == NULL) 3127 return error; 3128 if (throttle < 0 || throttle > 1000000000 / 256) 3129 return EINVAL; 3130 if (throttle) { 3131 /* 3132 * Set the interrupt throttling rate in 256ns increments, 3133 * recalculate sysctl value assignment to get exact frequency. 3134 */ 3135 throttle = 1000000000 / 256 / throttle; 3136 lwkt_serialize_enter(&adapter->serializer); 3137 em_int_throttle_ceil = 1000000000 / 256 / throttle; 3138 E1000_WRITE_REG(&adapter->hw, ITR, throttle); 3139 lwkt_serialize_exit(&adapter->serializer); 3140 } else { 3141 lwkt_serialize_enter(&adapter->serializer); 3142 em_int_throttle_ceil = 0; 3143 E1000_WRITE_REG(&adapter->hw, ITR, 0); 3144 lwkt_serialize_exit(&adapter->serializer); 3145 } 3146 device_printf(adapter->dev, "Interrupt moderation set to %d/sec\n", 3147 em_int_throttle_ceil); 3148 return 0; 3149 } 3150 3151