xref: /dflybsd-src/sys/dev/netif/ath/ath_hal/ar9002/ar9287an.h (revision 572ff6f6e8b95055988f178b6ba12ce77bb5b3c2)
1*572ff6f6SMatthew Dillon /*
2*572ff6f6SMatthew Dillon  * Copyright (c) 2010 Atheros Communications, Inc.
3*572ff6f6SMatthew Dillon  *
4*572ff6f6SMatthew Dillon  * Permission to use, copy, modify, and/or distribute this software for any
5*572ff6f6SMatthew Dillon  * purpose with or without fee is hereby granted, provided that the above
6*572ff6f6SMatthew Dillon  * copyright notice and this permission notice appear in all copies.
7*572ff6f6SMatthew Dillon  *
8*572ff6f6SMatthew Dillon  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9*572ff6f6SMatthew Dillon  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10*572ff6f6SMatthew Dillon  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11*572ff6f6SMatthew Dillon  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12*572ff6f6SMatthew Dillon  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13*572ff6f6SMatthew Dillon  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14*572ff6f6SMatthew Dillon  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15*572ff6f6SMatthew Dillon  *
16*572ff6f6SMatthew Dillon  * $FreeBSD$
17*572ff6f6SMatthew Dillon  */
18*572ff6f6SMatthew Dillon 
19*572ff6f6SMatthew Dillon #ifndef	__AR9287AN_H__
20*572ff6f6SMatthew Dillon #define	__AR9287AN_H__
21*572ff6f6SMatthew Dillon 
22*572ff6f6SMatthew Dillon #define	AR9287_AN_RF2G3_CH0			0x7808
23*572ff6f6SMatthew Dillon #define	AR9287_AN_RF2G3_CH1			0x785c
24*572ff6f6SMatthew Dillon #define	AR9287_AN_RF2G3_DB1			0xE0000000
25*572ff6f6SMatthew Dillon #define	AR9287_AN_RF2G3_DB1_S			29
26*572ff6f6SMatthew Dillon #define	AR9287_AN_RF2G3_DB2			0x1C000000
27*572ff6f6SMatthew Dillon #define	AR9287_AN_RF2G3_DB2_S			26
28*572ff6f6SMatthew Dillon #define	AR9287_AN_RF2G3_OB_CCK			0x03800000
29*572ff6f6SMatthew Dillon #define	AR9287_AN_RF2G3_OB_CCK_S		23
30*572ff6f6SMatthew Dillon #define	AR9287_AN_RF2G3_OB_PSK			0x00700000
31*572ff6f6SMatthew Dillon #define	AR9287_AN_RF2G3_OB_PSK_S		20
32*572ff6f6SMatthew Dillon #define	AR9287_AN_RF2G3_OB_QAM			0x000E0000
33*572ff6f6SMatthew Dillon #define	AR9287_AN_RF2G3_OB_QAM_S		17
34*572ff6f6SMatthew Dillon #define	AR9287_AN_RF2G3_OB_PAL_OFF		0x0001C000
35*572ff6f6SMatthew Dillon #define	AR9287_AN_RF2G3_OB_PAL_OFF_S		14
36*572ff6f6SMatthew Dillon 
37*572ff6f6SMatthew Dillon #define	AR9287_AN_TXPC0				0x7898
38*572ff6f6SMatthew Dillon #define	AR9287_AN_TXPC0_TXPCMODE		0x0000C000
39*572ff6f6SMatthew Dillon #define	AR9287_AN_TXPC0_TXPCMODE_S     		14
40*572ff6f6SMatthew Dillon #define	AR9287_AN_TXPC0_TXPCMODE_NORMAL		0
41*572ff6f6SMatthew Dillon #define	AR9287_AN_TXPC0_TXPCMODE_TEST		1
42*572ff6f6SMatthew Dillon #define	AR9287_AN_TXPC0_TXPCMODE_TEMPSENSE	2
43*572ff6f6SMatthew Dillon #define	AR9287_AN_TXPC0_TXPCMODE_ATBTEST	3
44*572ff6f6SMatthew Dillon 
45*572ff6f6SMatthew Dillon #define	AR9287_AN_TOP2				0x78b4
46*572ff6f6SMatthew Dillon #define	AR9287_AN_TOP2_XPABIAS_LVL		0xC0000000
47*572ff6f6SMatthew Dillon #define	AR9287_AN_TOP2_XPABIAS_LVL_S		30
48*572ff6f6SMatthew Dillon 
49*572ff6f6SMatthew Dillon #endif
50