xref: /dflybsd-src/sys/dev/netif/ath/ath_hal/ah_devid.h (revision b14ca477c2f404b36ad553a9e4f1b8b18836304e)
1572ff6f6SMatthew Dillon /*
2572ff6f6SMatthew Dillon  * Copyright (c) 2002-2008 Sam Leffler, Errno Consulting
3572ff6f6SMatthew Dillon  * Copyright (c) 2002-2008 Atheros Communications, Inc.
4572ff6f6SMatthew Dillon  *
5572ff6f6SMatthew Dillon  * Permission to use, copy, modify, and/or distribute this software for any
6572ff6f6SMatthew Dillon  * purpose with or without fee is hereby granted, provided that the above
7572ff6f6SMatthew Dillon  * copyright notice and this permission notice appear in all copies.
8572ff6f6SMatthew Dillon  *
9572ff6f6SMatthew Dillon  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
10572ff6f6SMatthew Dillon  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11572ff6f6SMatthew Dillon  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
12572ff6f6SMatthew Dillon  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
13572ff6f6SMatthew Dillon  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
14572ff6f6SMatthew Dillon  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
15572ff6f6SMatthew Dillon  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
16572ff6f6SMatthew Dillon  *
17572ff6f6SMatthew Dillon  * $FreeBSD$
18572ff6f6SMatthew Dillon  */
19572ff6f6SMatthew Dillon 
20572ff6f6SMatthew Dillon #ifndef _DEV_ATH_DEVID_H_
21572ff6f6SMatthew Dillon #define _DEV_ATH_DEVID_H_
22572ff6f6SMatthew Dillon 
23572ff6f6SMatthew Dillon #define ATHEROS_VENDOR_ID	0x168c		/* Atheros PCI vendor ID */
24572ff6f6SMatthew Dillon /*
25572ff6f6SMatthew Dillon  * NB: all Atheros-based devices should have a PCI vendor ID
26572ff6f6SMatthew Dillon  *     of 0x168c, but some vendors, in their infinite wisdom
27572ff6f6SMatthew Dillon  *     do not follow this so we must handle them specially.
28572ff6f6SMatthew Dillon  */
29572ff6f6SMatthew Dillon #define	ATHEROS_3COM_VENDOR_ID	0xa727		/* 3Com 3CRPAG175 vendor ID */
30572ff6f6SMatthew Dillon #define	ATHEROS_3COM2_VENDOR_ID	0x10b7		/* 3Com 3CRDAG675 vendor ID */
31572ff6f6SMatthew Dillon 
32572ff6f6SMatthew Dillon /* AR5210 (for reference) */
33572ff6f6SMatthew Dillon #define AR5210_DEFAULT          0x1107          /* No eeprom HW default */
34572ff6f6SMatthew Dillon #define AR5210_PROD             0x0007          /* Final device ID */
35572ff6f6SMatthew Dillon #define AR5210_AP               0x0207          /* Early AP11s */
36572ff6f6SMatthew Dillon 
37572ff6f6SMatthew Dillon /* AR5211 */
38572ff6f6SMatthew Dillon #define AR5211_DEFAULT          0x1112          /* No eeprom HW default */
39572ff6f6SMatthew Dillon #define AR5311_DEVID            0x0011          /* Final ar5311 devid */
40572ff6f6SMatthew Dillon #define AR5211_DEVID            0x0012          /* Final ar5211 devid */
41572ff6f6SMatthew Dillon #define AR5211_LEGACY           0xff12          /* Original emulation board */
42572ff6f6SMatthew Dillon #define AR5211_FPGA11B          0xf11b          /* 11b emulation board */
43572ff6f6SMatthew Dillon 
44572ff6f6SMatthew Dillon /* AR5212 */
45572ff6f6SMatthew Dillon #define AR5212_DEFAULT          0x1113          /* No eeprom HW default */
46572ff6f6SMatthew Dillon #define AR5212_DEVID            0x0013          /* Final ar5212 devid */
47572ff6f6SMatthew Dillon #define AR5212_FPGA             0xf013          /* Emulation board */
48572ff6f6SMatthew Dillon #define	AR5212_DEVID_IBM	0x1014          /* IBM minipci ID */
49572ff6f6SMatthew Dillon #define AR5212_AR5312_REV2      0x0052          /* AR5312 WMAC (AP31) */
50572ff6f6SMatthew Dillon #define AR5212_AR5312_REV7      0x0057          /* AR5312 WMAC (AP30-040) */
51572ff6f6SMatthew Dillon #define AR5212_AR2313_REV8      0x0058          /* AR2313 WMAC (AP43-030) */
52572ff6f6SMatthew Dillon #define AR5212_AR2315_REV6      0x0086          /* AR2315 WMAC (AP51-Light) */
53572ff6f6SMatthew Dillon #define AR5212_AR2315_REV7      0x0087          /* AR2315 WMAC (AP51-Full) */
54572ff6f6SMatthew Dillon #define AR5212_AR2317_REV1      0x0090          /* AR2317 WMAC (AP61-Light) */
55572ff6f6SMatthew Dillon #define AR5212_AR2317_REV2      0x0091          /* AR2317 WMAC (AP61-Full) */
56572ff6f6SMatthew Dillon 
57572ff6f6SMatthew Dillon /* AR5212 compatible devid's also attach to 5212 */
58572ff6f6SMatthew Dillon #define	AR5212_DEVID_0014	0x0014
59572ff6f6SMatthew Dillon #define	AR5212_DEVID_0015	0x0015
60572ff6f6SMatthew Dillon #define	AR5212_DEVID_0016	0x0016
61572ff6f6SMatthew Dillon #define	AR5212_DEVID_0017	0x0017
62572ff6f6SMatthew Dillon #define	AR5212_DEVID_0018	0x0018
63572ff6f6SMatthew Dillon #define	AR5212_DEVID_0019	0x0019
64572ff6f6SMatthew Dillon #define AR5212_AR2413      	0x001a          /* AR2413 aka Griffin-lite */
65572ff6f6SMatthew Dillon #define AR5212_AR5413		0x001b          /* Eagle */
66572ff6f6SMatthew Dillon #define AR5212_AR5424		0x001c          /* Condor (PCI express) */
67572ff6f6SMatthew Dillon #define AR5212_AR2417		0x001d          /* Nala, PCI */
68572ff6f6SMatthew Dillon #define AR5212_DEVID_FF19	0xff19          /* XXX PCI express */
69572ff6f6SMatthew Dillon 
70572ff6f6SMatthew Dillon /* AR5213 */
71572ff6f6SMatthew Dillon #define	AR5213_SREV_1_0		0x0055
72572ff6f6SMatthew Dillon #define	AR5213_SREV_REG		0x4020
73572ff6f6SMatthew Dillon 
74572ff6f6SMatthew Dillon /* AR5416 compatible devid's  */
75572ff6f6SMatthew Dillon #define AR5416_DEVID_PCI	0x0023          /* AR5416 PCI (MB/CB) Owl */
76572ff6f6SMatthew Dillon #define AR5416_DEVID_PCIE	0x0024          /* AR5418 PCI-E (XB) Owl */
77572ff6f6SMatthew Dillon #define	AR5416_AR9130_DEVID     0x000b          /* AR9130 SoC WiMAC */
78572ff6f6SMatthew Dillon #define AR9160_DEVID_PCI	0x0027          /* AR9160 PCI Sowl */
79572ff6f6SMatthew Dillon #define AR9280_DEVID_PCI	0x0029          /* AR9280 PCI Merlin */
80572ff6f6SMatthew Dillon #define AR9280_DEVID_PCIE	0x002a          /* AR9220 PCI-E Merlin */
81572ff6f6SMatthew Dillon #define AR9285_DEVID_PCIE	0x002b          /* AR9285 PCI-E Kite */
82572ff6f6SMatthew Dillon #define	AR2427_DEVID_PCIE	0x002c		/* AR2427 PCI-E w/ 802.11n bonded out */
83572ff6f6SMatthew Dillon #define	AR9287_DEVID_PCI	0x002d		/* AR9227 PCI Kiwi */
84572ff6f6SMatthew Dillon #define	AR9287_DEVID_PCIE	0x002e		/* AR9287 PCI-E Kiwi */
85572ff6f6SMatthew Dillon 
86572ff6f6SMatthew Dillon /* AR9300 */
87572ff6f6SMatthew Dillon #define	AR9300_DEVID_AR9380_PCIE	0x0030
88572ff6f6SMatthew Dillon #define	AR9300_DEVID_EMU_PCIE		0xabcd
89572ff6f6SMatthew Dillon #define	AR9300_DEVID_AR9340		0x0031
90572ff6f6SMatthew Dillon #define	AR9300_DEVID_AR9485_PCIE	0x0032
91572ff6f6SMatthew Dillon #define	AR9300_DEVID_AR9580_PCIE	0x0033
92572ff6f6SMatthew Dillon #define	AR9300_DEVID_AR946X_PCIE	0x0034
93572ff6f6SMatthew Dillon #define	AR9300_DEVID_AR9330		0x0035
94572ff6f6SMatthew Dillon #define	AR9300_DEVID_QCA9565		0x0036
954b8649cbSMatthew Dillon #define	AR9300_DEVID_AR1111_PCIE	0x0037
96572ff6f6SMatthew Dillon #define	AR9300_DEVID_QCA955X		0x0039
97*b14ca477SMatthew Dillon #define	AR9300_DEVID_QCA953X		0x003d        /* Honey Bee */
98572ff6f6SMatthew Dillon 
99572ff6f6SMatthew Dillon #define	AR_SUBVENDOR_ID_NOG	0x0e11		/* No 11G subvendor ID */
100572ff6f6SMatthew Dillon #define AR_SUBVENDOR_ID_NEW_A	0x7065		/* Update device to new RD */
101572ff6f6SMatthew Dillon #endif /* _DEV_ATH_DEVID_H */
102