xref: /dflybsd-src/sys/dev/drm/radeon/rv740d.h (revision 57e252bfa9ffec9f583f486376e43c8b2c0b8809)
1*57e252bfSMichael Neumann /*
2*57e252bfSMichael Neumann  * Copyright 2011 Advanced Micro Devices, Inc.
3*57e252bfSMichael Neumann  *
4*57e252bfSMichael Neumann  * Permission is hereby granted, free of charge, to any person obtaining a
5*57e252bfSMichael Neumann  * copy of this software and associated documentation files (the "Software"),
6*57e252bfSMichael Neumann  * to deal in the Software without restriction, including without limitation
7*57e252bfSMichael Neumann  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8*57e252bfSMichael Neumann  * and/or sell copies of the Software, and to permit persons to whom the
9*57e252bfSMichael Neumann  * Software is furnished to do so, subject to the following conditions:
10*57e252bfSMichael Neumann  *
11*57e252bfSMichael Neumann  * The above copyright notice and this permission notice shall be included in
12*57e252bfSMichael Neumann  * all copies or substantial portions of the Software.
13*57e252bfSMichael Neumann  *
14*57e252bfSMichael Neumann  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15*57e252bfSMichael Neumann  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16*57e252bfSMichael Neumann  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17*57e252bfSMichael Neumann  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18*57e252bfSMichael Neumann  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19*57e252bfSMichael Neumann  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20*57e252bfSMichael Neumann  * OTHER DEALINGS IN THE SOFTWARE.
21*57e252bfSMichael Neumann  *
22*57e252bfSMichael Neumann  */
23*57e252bfSMichael Neumann #ifndef RV740_H
24*57e252bfSMichael Neumann #define RV740_H
25*57e252bfSMichael Neumann 
26*57e252bfSMichael Neumann #define	CG_SPLL_FUNC_CNTL				0x600
27*57e252bfSMichael Neumann #define		SPLL_RESET				(1 << 0)
28*57e252bfSMichael Neumann #define		SPLL_SLEEP				(1 << 1)
29*57e252bfSMichael Neumann #define		SPLL_BYPASS_EN				(1 << 3)
30*57e252bfSMichael Neumann #define		SPLL_REF_DIV(x)				((x) << 4)
31*57e252bfSMichael Neumann #define		SPLL_REF_DIV_MASK			(0x3f << 4)
32*57e252bfSMichael Neumann #define		SPLL_PDIV_A(x)				((x) << 20)
33*57e252bfSMichael Neumann #define		SPLL_PDIV_A_MASK			(0x7f << 20)
34*57e252bfSMichael Neumann #define	CG_SPLL_FUNC_CNTL_2				0x604
35*57e252bfSMichael Neumann #define		SCLK_MUX_SEL(x)				((x) << 0)
36*57e252bfSMichael Neumann #define		SCLK_MUX_SEL_MASK			(0x1ff << 0)
37*57e252bfSMichael Neumann #define	CG_SPLL_FUNC_CNTL_3				0x608
38*57e252bfSMichael Neumann #define		SPLL_FB_DIV(x)				((x) << 0)
39*57e252bfSMichael Neumann #define		SPLL_FB_DIV_MASK			(0x3ffffff << 0)
40*57e252bfSMichael Neumann #define		SPLL_DITHEN				(1 << 28)
41*57e252bfSMichael Neumann 
42*57e252bfSMichael Neumann #define	MPLL_CNTL_MODE					0x61c
43*57e252bfSMichael Neumann #define		SS_SSEN					(1 << 24)
44*57e252bfSMichael Neumann 
45*57e252bfSMichael Neumann #define	MPLL_AD_FUNC_CNTL				0x624
46*57e252bfSMichael Neumann #define		CLKF(x)					((x) << 0)
47*57e252bfSMichael Neumann #define		CLKF_MASK				(0x7f << 0)
48*57e252bfSMichael Neumann #define		CLKR(x)					((x) << 7)
49*57e252bfSMichael Neumann #define		CLKR_MASK				(0x1f << 7)
50*57e252bfSMichael Neumann #define		CLKFRAC(x)				((x) << 12)
51*57e252bfSMichael Neumann #define		CLKFRAC_MASK				(0x1f << 12)
52*57e252bfSMichael Neumann #define		YCLK_POST_DIV(x)			((x) << 17)
53*57e252bfSMichael Neumann #define		YCLK_POST_DIV_MASK			(3 << 17)
54*57e252bfSMichael Neumann #define		IBIAS(x)				((x) << 20)
55*57e252bfSMichael Neumann #define		IBIAS_MASK				(0x3ff << 20)
56*57e252bfSMichael Neumann #define		RESET					(1 << 30)
57*57e252bfSMichael Neumann #define		PDNB					(1 << 31)
58*57e252bfSMichael Neumann #define	MPLL_AD_FUNC_CNTL_2				0x628
59*57e252bfSMichael Neumann #define		BYPASS					(1 << 19)
60*57e252bfSMichael Neumann #define		BIAS_GEN_PDNB				(1 << 24)
61*57e252bfSMichael Neumann #define		RESET_EN				(1 << 25)
62*57e252bfSMichael Neumann #define		VCO_MODE				(1 << 29)
63*57e252bfSMichael Neumann #define	MPLL_DQ_FUNC_CNTL				0x62c
64*57e252bfSMichael Neumann #define	MPLL_DQ_FUNC_CNTL_2				0x630
65*57e252bfSMichael Neumann 
66*57e252bfSMichael Neumann #define	MCLK_PWRMGT_CNTL				0x648
67*57e252bfSMichael Neumann #define		DLL_SPEED(x)				((x) << 0)
68*57e252bfSMichael Neumann #define		DLL_SPEED_MASK				(0x1f << 0)
69*57e252bfSMichael Neumann #       define MPLL_PWRMGT_OFF                          (1 << 5)
70*57e252bfSMichael Neumann #       define DLL_READY                                (1 << 6)
71*57e252bfSMichael Neumann #       define MC_INT_CNTL                              (1 << 7)
72*57e252bfSMichael Neumann #       define MRDCKA0_SLEEP                            (1 << 8)
73*57e252bfSMichael Neumann #       define MRDCKA1_SLEEP                            (1 << 9)
74*57e252bfSMichael Neumann #       define MRDCKB0_SLEEP                            (1 << 10)
75*57e252bfSMichael Neumann #       define MRDCKB1_SLEEP                            (1 << 11)
76*57e252bfSMichael Neumann #       define MRDCKC0_SLEEP                            (1 << 12)
77*57e252bfSMichael Neumann #       define MRDCKC1_SLEEP                            (1 << 13)
78*57e252bfSMichael Neumann #       define MRDCKD0_SLEEP                            (1 << 14)
79*57e252bfSMichael Neumann #       define MRDCKD1_SLEEP                            (1 << 15)
80*57e252bfSMichael Neumann #       define MRDCKA0_RESET                            (1 << 16)
81*57e252bfSMichael Neumann #       define MRDCKA1_RESET                            (1 << 17)
82*57e252bfSMichael Neumann #       define MRDCKB0_RESET                            (1 << 18)
83*57e252bfSMichael Neumann #       define MRDCKB1_RESET                            (1 << 19)
84*57e252bfSMichael Neumann #       define MRDCKC0_RESET                            (1 << 20)
85*57e252bfSMichael Neumann #       define MRDCKC1_RESET                            (1 << 21)
86*57e252bfSMichael Neumann #       define MRDCKD0_RESET                            (1 << 22)
87*57e252bfSMichael Neumann #       define MRDCKD1_RESET                            (1 << 23)
88*57e252bfSMichael Neumann #       define DLL_READY_READ                           (1 << 24)
89*57e252bfSMichael Neumann #       define USE_DISPLAY_GAP                          (1 << 25)
90*57e252bfSMichael Neumann #       define USE_DISPLAY_URGENT_NORMAL                (1 << 26)
91*57e252bfSMichael Neumann #       define MPLL_TURNOFF_D2                          (1 << 28)
92*57e252bfSMichael Neumann #define	DLL_CNTL					0x64c
93*57e252bfSMichael Neumann #       define MRDCKA0_BYPASS                           (1 << 24)
94*57e252bfSMichael Neumann #       define MRDCKA1_BYPASS                           (1 << 25)
95*57e252bfSMichael Neumann #       define MRDCKB0_BYPASS                           (1 << 26)
96*57e252bfSMichael Neumann #       define MRDCKB1_BYPASS                           (1 << 27)
97*57e252bfSMichael Neumann #       define MRDCKC0_BYPASS                           (1 << 28)
98*57e252bfSMichael Neumann #       define MRDCKC1_BYPASS                           (1 << 29)
99*57e252bfSMichael Neumann #       define MRDCKD0_BYPASS                           (1 << 30)
100*57e252bfSMichael Neumann #       define MRDCKD1_BYPASS                           (1 << 31)
101*57e252bfSMichael Neumann 
102*57e252bfSMichael Neumann #define	CG_SPLL_SPREAD_SPECTRUM				0x790
103*57e252bfSMichael Neumann #define		SSEN					(1 << 0)
104*57e252bfSMichael Neumann #define		CLK_S(x)				((x) << 4)
105*57e252bfSMichael Neumann #define		CLK_S_MASK				(0xfff << 4)
106*57e252bfSMichael Neumann #define	CG_SPLL_SPREAD_SPECTRUM_2			0x794
107*57e252bfSMichael Neumann #define		CLK_V(x)				((x) << 0)
108*57e252bfSMichael Neumann #define		CLK_V_MASK				(0x3ffffff << 0)
109*57e252bfSMichael Neumann 
110*57e252bfSMichael Neumann #define	MPLL_SS1					0x85c
111*57e252bfSMichael Neumann #define		CLKV(x)					((x) << 0)
112*57e252bfSMichael Neumann #define		CLKV_MASK				(0x3ffffff << 0)
113*57e252bfSMichael Neumann #define	MPLL_SS2					0x860
114*57e252bfSMichael Neumann #define		CLKS(x)					((x) << 0)
115*57e252bfSMichael Neumann #define		CLKS_MASK				(0xfff << 0)
116*57e252bfSMichael Neumann 
117*57e252bfSMichael Neumann #endif
118