1926deccbSFrançois Tigeot /* 2926deccbSFrançois Tigeot * Copyright 2009 VMware, Inc. 3926deccbSFrançois Tigeot * 4926deccbSFrançois Tigeot * Permission is hereby granted, free of charge, to any person obtaining a 5926deccbSFrançois Tigeot * copy of this software and associated documentation files (the "Software"), 6926deccbSFrançois Tigeot * to deal in the Software without restriction, including without limitation 7926deccbSFrançois Tigeot * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8926deccbSFrançois Tigeot * and/or sell copies of the Software, and to permit persons to whom the 9926deccbSFrançois Tigeot * Software is furnished to do so, subject to the following conditions: 10926deccbSFrançois Tigeot * 11926deccbSFrançois Tigeot * The above copyright notice and this permission notice shall be included in 12926deccbSFrançois Tigeot * all copies or substantial portions of the Software. 13926deccbSFrançois Tigeot * 14926deccbSFrançois Tigeot * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15926deccbSFrançois Tigeot * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16926deccbSFrançois Tigeot * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17926deccbSFrançois Tigeot * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18926deccbSFrançois Tigeot * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19926deccbSFrançois Tigeot * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20926deccbSFrançois Tigeot * OTHER DEALINGS IN THE SOFTWARE. 21926deccbSFrançois Tigeot * 22926deccbSFrançois Tigeot * Authors: Michel Dänzer 23926deccbSFrançois Tigeot */ 24926deccbSFrançois Tigeot #include <drm/drmP.h> 2583b4b9b9SFrançois Tigeot #include <drm/radeon_drm.h> 26926deccbSFrançois Tigeot #include "radeon_reg.h" 27926deccbSFrançois Tigeot #include "radeon.h" 28926deccbSFrançois Tigeot 29926deccbSFrançois Tigeot #define RADEON_TEST_COPY_BLIT 1 30926deccbSFrançois Tigeot #define RADEON_TEST_COPY_DMA 0 31926deccbSFrançois Tigeot 32926deccbSFrançois Tigeot 33926deccbSFrançois Tigeot /* Test BO GTT->VRAM and VRAM->GTT GPU copies across the whole GTT aperture */ 34926deccbSFrançois Tigeot static void radeon_do_test_moves(struct radeon_device *rdev, int flag) 35926deccbSFrançois Tigeot { 36926deccbSFrançois Tigeot struct radeon_bo *vram_obj = NULL; 37926deccbSFrançois Tigeot struct radeon_bo **gtt_obj = NULL; 38926deccbSFrançois Tigeot struct radeon_fence *fence = NULL; 39f77dbd6cSFrançois Tigeot u64 gtt_addr, vram_addr; 404cd92098Szrj unsigned n, size; 414cd92098Szrj int i, r, ring; 42926deccbSFrançois Tigeot 43926deccbSFrançois Tigeot switch (flag) { 44926deccbSFrançois Tigeot case RADEON_TEST_COPY_DMA: 45926deccbSFrançois Tigeot ring = radeon_copy_dma_ring_index(rdev); 46926deccbSFrançois Tigeot break; 47926deccbSFrançois Tigeot case RADEON_TEST_COPY_BLIT: 48926deccbSFrançois Tigeot ring = radeon_copy_blit_ring_index(rdev); 49926deccbSFrançois Tigeot break; 50926deccbSFrançois Tigeot default: 51926deccbSFrançois Tigeot DRM_ERROR("Unknown copy method\n"); 52926deccbSFrançois Tigeot return; 53926deccbSFrançois Tigeot } 54926deccbSFrançois Tigeot 55926deccbSFrançois Tigeot size = 1024 * 1024; 56926deccbSFrançois Tigeot 57926deccbSFrançois Tigeot /* Number of tests = 58926deccbSFrançois Tigeot * (Total GTT - IB pool - writeback page - ring buffers) / test size 59926deccbSFrançois Tigeot */ 60c6f73aabSFrançois Tigeot n = rdev->mc.gtt_size - rdev->gart_pin_size; 61926deccbSFrançois Tigeot n /= size; 62926deccbSFrançois Tigeot 63c4ef309bSzrj gtt_obj = kzalloc(n * sizeof(*gtt_obj), GFP_KERNEL); 64926deccbSFrançois Tigeot if (!gtt_obj) { 65926deccbSFrançois Tigeot DRM_ERROR("Failed to allocate %d pointers\n", n); 66926deccbSFrançois Tigeot r = 1; 67926deccbSFrançois Tigeot goto out_cleanup; 68926deccbSFrançois Tigeot } 69926deccbSFrançois Tigeot 70926deccbSFrançois Tigeot r = radeon_bo_create(rdev, size, PAGE_SIZE, true, RADEON_GEM_DOMAIN_VRAM, 71c6f73aabSFrançois Tigeot 0, NULL, &vram_obj); 72926deccbSFrançois Tigeot if (r) { 73926deccbSFrançois Tigeot DRM_ERROR("Failed to create VRAM object\n"); 74926deccbSFrançois Tigeot goto out_cleanup; 75926deccbSFrançois Tigeot } 76926deccbSFrançois Tigeot r = radeon_bo_reserve(vram_obj, false); 77926deccbSFrançois Tigeot if (unlikely(r != 0)) 78*a34b4168SMatthew Dillon goto out_unref; 79926deccbSFrançois Tigeot r = radeon_bo_pin(vram_obj, RADEON_GEM_DOMAIN_VRAM, &vram_addr); 80926deccbSFrançois Tigeot if (r) { 81926deccbSFrançois Tigeot DRM_ERROR("Failed to pin VRAM object\n"); 82*a34b4168SMatthew Dillon goto out_unres; 83926deccbSFrançois Tigeot } 84926deccbSFrançois Tigeot for (i = 0; i < n; i++) { 85926deccbSFrançois Tigeot void *gtt_map, *vram_map; 86926deccbSFrançois Tigeot void **gtt_start, **gtt_end; 87926deccbSFrançois Tigeot void **vram_start, **vram_end; 88926deccbSFrançois Tigeot 89926deccbSFrançois Tigeot r = radeon_bo_create(rdev, size, PAGE_SIZE, true, 90c6f73aabSFrançois Tigeot RADEON_GEM_DOMAIN_GTT, 0, NULL, gtt_obj + i); 91926deccbSFrançois Tigeot if (r) { 92926deccbSFrançois Tigeot DRM_ERROR("Failed to create GTT object %d\n", i); 93*a34b4168SMatthew Dillon goto out_lclean; 94926deccbSFrançois Tigeot } 95926deccbSFrançois Tigeot 96926deccbSFrançois Tigeot r = radeon_bo_reserve(gtt_obj[i], false); 97926deccbSFrançois Tigeot if (unlikely(r != 0)) 98*a34b4168SMatthew Dillon goto out_lclean_unref; 99926deccbSFrançois Tigeot r = radeon_bo_pin(gtt_obj[i], RADEON_GEM_DOMAIN_GTT, >t_addr); 100926deccbSFrançois Tigeot if (r) { 101926deccbSFrançois Tigeot DRM_ERROR("Failed to pin GTT object %d\n", i); 102*a34b4168SMatthew Dillon goto out_lclean_unres; 103926deccbSFrançois Tigeot } 104926deccbSFrançois Tigeot 105926deccbSFrançois Tigeot r = radeon_bo_kmap(gtt_obj[i], >t_map); 106926deccbSFrançois Tigeot if (r) { 107926deccbSFrançois Tigeot DRM_ERROR("Failed to map GTT object %d\n", i); 108*a34b4168SMatthew Dillon goto out_lclean_unpin; 109926deccbSFrançois Tigeot } 110926deccbSFrançois Tigeot 111926deccbSFrançois Tigeot for (gtt_start = gtt_map, gtt_end = (void *)((uintptr_t)gtt_map + size); 112926deccbSFrançois Tigeot gtt_start < gtt_end; 113926deccbSFrançois Tigeot gtt_start++) 114926deccbSFrançois Tigeot *gtt_start = gtt_start; 115926deccbSFrançois Tigeot 116926deccbSFrançois Tigeot radeon_bo_kunmap(gtt_obj[i]); 117926deccbSFrançois Tigeot 118926deccbSFrançois Tigeot if (ring == R600_RING_TYPE_DMA_INDEX) 119926deccbSFrançois Tigeot r = radeon_copy_dma(rdev, gtt_addr, vram_addr, size / RADEON_GPU_PAGE_SIZE, &fence); 120926deccbSFrançois Tigeot else 121926deccbSFrançois Tigeot r = radeon_copy_blit(rdev, gtt_addr, vram_addr, size / RADEON_GPU_PAGE_SIZE, &fence); 122926deccbSFrançois Tigeot if (r) { 123926deccbSFrançois Tigeot DRM_ERROR("Failed GTT->VRAM copy %d\n", i); 124*a34b4168SMatthew Dillon goto out_lclean_unpin; 125926deccbSFrançois Tigeot } 126926deccbSFrançois Tigeot 127926deccbSFrançois Tigeot r = radeon_fence_wait(fence, false); 128926deccbSFrançois Tigeot if (r) { 129926deccbSFrançois Tigeot DRM_ERROR("Failed to wait for GTT->VRAM fence %d\n", i); 130*a34b4168SMatthew Dillon goto out_lclean_unpin; 131926deccbSFrançois Tigeot } 132926deccbSFrançois Tigeot 133926deccbSFrançois Tigeot radeon_fence_unref(&fence); 134926deccbSFrançois Tigeot 135926deccbSFrançois Tigeot r = radeon_bo_kmap(vram_obj, &vram_map); 136926deccbSFrançois Tigeot if (r) { 137926deccbSFrançois Tigeot DRM_ERROR("Failed to map VRAM object after copy %d\n", i); 138*a34b4168SMatthew Dillon goto out_lclean_unpin; 139926deccbSFrançois Tigeot } 140926deccbSFrançois Tigeot 141926deccbSFrançois Tigeot for (gtt_start = gtt_map, gtt_end = (void *)((uintptr_t)gtt_map + size), 142926deccbSFrançois Tigeot vram_start = vram_map, vram_end = (void *)((uintptr_t)vram_map + size); 143926deccbSFrançois Tigeot vram_start < vram_end; 144926deccbSFrançois Tigeot gtt_start++, vram_start++) { 145926deccbSFrançois Tigeot if (*vram_start != gtt_start) { 146926deccbSFrançois Tigeot DRM_ERROR("Incorrect GTT->VRAM copy %d: Got 0x%p, " 147926deccbSFrançois Tigeot "expected 0x%p (GTT/VRAM offset " 148926deccbSFrançois Tigeot "0x%16llx/0x%16llx)\n", 149926deccbSFrançois Tigeot i, *vram_start, gtt_start, 150926deccbSFrançois Tigeot (unsigned long long) 151926deccbSFrançois Tigeot ((uintptr_t)gtt_addr - (uintptr_t)rdev->mc.gtt_start + 152926deccbSFrançois Tigeot (uintptr_t)gtt_start - (uintptr_t)gtt_map), 153926deccbSFrançois Tigeot (unsigned long long) 154926deccbSFrançois Tigeot ((uintptr_t)vram_addr - (uintptr_t)rdev->mc.vram_start + 155926deccbSFrançois Tigeot (uintptr_t)gtt_start - (uintptr_t)gtt_map)); 156926deccbSFrançois Tigeot radeon_bo_kunmap(vram_obj); 157*a34b4168SMatthew Dillon goto out_lclean_unpin; 158926deccbSFrançois Tigeot } 159926deccbSFrançois Tigeot *vram_start = vram_start; 160926deccbSFrançois Tigeot } 161926deccbSFrançois Tigeot 162926deccbSFrançois Tigeot radeon_bo_kunmap(vram_obj); 163926deccbSFrançois Tigeot 164926deccbSFrançois Tigeot if (ring == R600_RING_TYPE_DMA_INDEX) 165926deccbSFrançois Tigeot r = radeon_copy_dma(rdev, vram_addr, gtt_addr, size / RADEON_GPU_PAGE_SIZE, &fence); 166926deccbSFrançois Tigeot else 167926deccbSFrançois Tigeot r = radeon_copy_blit(rdev, vram_addr, gtt_addr, size / RADEON_GPU_PAGE_SIZE, &fence); 168926deccbSFrançois Tigeot if (r) { 169926deccbSFrançois Tigeot DRM_ERROR("Failed VRAM->GTT copy %d\n", i); 170*a34b4168SMatthew Dillon goto out_lclean_unpin; 171926deccbSFrançois Tigeot } 172926deccbSFrançois Tigeot 173926deccbSFrançois Tigeot r = radeon_fence_wait(fence, false); 174926deccbSFrançois Tigeot if (r) { 175926deccbSFrançois Tigeot DRM_ERROR("Failed to wait for VRAM->GTT fence %d\n", i); 176*a34b4168SMatthew Dillon goto out_lclean_unpin; 177926deccbSFrançois Tigeot } 178926deccbSFrançois Tigeot 179926deccbSFrançois Tigeot radeon_fence_unref(&fence); 180926deccbSFrançois Tigeot 181926deccbSFrançois Tigeot r = radeon_bo_kmap(gtt_obj[i], >t_map); 182926deccbSFrançois Tigeot if (r) { 183926deccbSFrançois Tigeot DRM_ERROR("Failed to map GTT object after copy %d\n", i); 184*a34b4168SMatthew Dillon goto out_lclean_unpin; 185926deccbSFrançois Tigeot } 186926deccbSFrançois Tigeot 187926deccbSFrançois Tigeot for (gtt_start = gtt_map, gtt_end = (void *)((uintptr_t)gtt_map + size), 188926deccbSFrançois Tigeot vram_start = vram_map, vram_end = (void *)((uintptr_t)vram_map + size); 189926deccbSFrançois Tigeot gtt_start < gtt_end; 190926deccbSFrançois Tigeot gtt_start++, vram_start++) { 191926deccbSFrançois Tigeot if (*gtt_start != vram_start) { 192926deccbSFrançois Tigeot DRM_ERROR("Incorrect VRAM->GTT copy %d: Got 0x%p, " 193926deccbSFrançois Tigeot "expected 0x%p (VRAM/GTT offset " 194926deccbSFrançois Tigeot "0x%16llx/0x%16llx)\n", 195926deccbSFrançois Tigeot i, *gtt_start, vram_start, 196926deccbSFrançois Tigeot (unsigned long long) 197926deccbSFrançois Tigeot ((uintptr_t)vram_addr - (uintptr_t)rdev->mc.vram_start + 198926deccbSFrançois Tigeot (uintptr_t)vram_start - (uintptr_t)vram_map), 199926deccbSFrançois Tigeot (unsigned long long) 200926deccbSFrançois Tigeot ((uintptr_t)gtt_addr - (uintptr_t)rdev->mc.gtt_start + 201926deccbSFrançois Tigeot (uintptr_t)vram_start - (uintptr_t)vram_map)); 202926deccbSFrançois Tigeot radeon_bo_kunmap(gtt_obj[i]); 203*a34b4168SMatthew Dillon goto out_lclean_unpin; 204926deccbSFrançois Tigeot } 205926deccbSFrançois Tigeot } 206926deccbSFrançois Tigeot 207926deccbSFrançois Tigeot radeon_bo_kunmap(gtt_obj[i]); 208926deccbSFrançois Tigeot 209f77dbd6cSFrançois Tigeot DRM_INFO("Tested GTT->VRAM and VRAM->GTT copy for GTT offset 0x%llx\n", 210926deccbSFrançois Tigeot (uintmax_t)gtt_addr - rdev->mc.gtt_start); 211*a34b4168SMatthew Dillon continue; 212926deccbSFrançois Tigeot 213*a34b4168SMatthew Dillon out_lclean_unpin: 214*a34b4168SMatthew Dillon radeon_bo_unpin(gtt_obj[i]); 215*a34b4168SMatthew Dillon out_lclean_unres: 216*a34b4168SMatthew Dillon radeon_bo_unreserve(gtt_obj[i]); 217*a34b4168SMatthew Dillon out_lclean_unref: 218*a34b4168SMatthew Dillon radeon_bo_unref(>t_obj[i]); 219*a34b4168SMatthew Dillon out_lclean: 220*a34b4168SMatthew Dillon for (--i; i >= 0; --i) { 221926deccbSFrançois Tigeot radeon_bo_unpin(gtt_obj[i]); 222926deccbSFrançois Tigeot radeon_bo_unreserve(gtt_obj[i]); 223926deccbSFrançois Tigeot radeon_bo_unref(>t_obj[i]); 224926deccbSFrançois Tigeot } 225*a34b4168SMatthew Dillon if (fence && !IS_ERR(fence)) 226*a34b4168SMatthew Dillon radeon_fence_unref(&fence); 227*a34b4168SMatthew Dillon break; 228926deccbSFrançois Tigeot } 229*a34b4168SMatthew Dillon 230*a34b4168SMatthew Dillon radeon_bo_unpin(vram_obj); 231*a34b4168SMatthew Dillon out_unres: 232*a34b4168SMatthew Dillon radeon_bo_unreserve(vram_obj); 233*a34b4168SMatthew Dillon out_unref: 234*a34b4168SMatthew Dillon radeon_bo_unref(&vram_obj); 235*a34b4168SMatthew Dillon out_cleanup: 236*a34b4168SMatthew Dillon if (gtt_obj) 237c4ef309bSzrj kfree(gtt_obj); 238926deccbSFrançois Tigeot if (fence) { 239926deccbSFrançois Tigeot radeon_fence_unref(&fence); 240926deccbSFrançois Tigeot } 241926deccbSFrançois Tigeot if (r) { 242c4ef309bSzrj printk(KERN_WARNING "Error while testing BO move.\n"); 243926deccbSFrançois Tigeot } 244926deccbSFrançois Tigeot } 245926deccbSFrançois Tigeot 246926deccbSFrançois Tigeot void radeon_test_moves(struct radeon_device *rdev) 247926deccbSFrançois Tigeot { 248926deccbSFrançois Tigeot if (rdev->asic->copy.dma) 249926deccbSFrançois Tigeot radeon_do_test_moves(rdev, RADEON_TEST_COPY_DMA); 250926deccbSFrançois Tigeot if (rdev->asic->copy.blit) 251926deccbSFrançois Tigeot radeon_do_test_moves(rdev, RADEON_TEST_COPY_BLIT); 252926deccbSFrançois Tigeot } 253926deccbSFrançois Tigeot 254f43cf1b1SMichael Neumann static int radeon_test_create_and_emit_fence(struct radeon_device *rdev, 255f43cf1b1SMichael Neumann struct radeon_ring *ring, 256f43cf1b1SMichael Neumann struct radeon_fence **fence) 257f43cf1b1SMichael Neumann { 258c6f73aabSFrançois Tigeot uint32_t handle = ring->idx ^ 0xdeafbeef; 259f43cf1b1SMichael Neumann int r; 260f43cf1b1SMichael Neumann 261f43cf1b1SMichael Neumann if (ring->idx == R600_RING_TYPE_UVD_INDEX) { 262c6f73aabSFrançois Tigeot r = radeon_uvd_get_create_msg(rdev, ring->idx, handle, NULL); 263f43cf1b1SMichael Neumann if (r) { 264f43cf1b1SMichael Neumann DRM_ERROR("Failed to get dummy create msg\n"); 265f43cf1b1SMichael Neumann return r; 266f43cf1b1SMichael Neumann } 267f43cf1b1SMichael Neumann 268c6f73aabSFrançois Tigeot r = radeon_uvd_get_destroy_msg(rdev, ring->idx, handle, fence); 269f43cf1b1SMichael Neumann if (r) { 270f43cf1b1SMichael Neumann DRM_ERROR("Failed to get dummy destroy msg\n"); 271f43cf1b1SMichael Neumann return r; 272f43cf1b1SMichael Neumann } 273c6f73aabSFrançois Tigeot 274c6f73aabSFrançois Tigeot } else if (ring->idx == TN_RING_TYPE_VCE1_INDEX || 275c6f73aabSFrançois Tigeot ring->idx == TN_RING_TYPE_VCE2_INDEX) { 276c6f73aabSFrançois Tigeot r = radeon_vce_get_create_msg(rdev, ring->idx, handle, NULL); 277c6f73aabSFrançois Tigeot if (r) { 278c6f73aabSFrançois Tigeot DRM_ERROR("Failed to get dummy create msg\n"); 279c6f73aabSFrançois Tigeot return r; 280c6f73aabSFrançois Tigeot } 281c6f73aabSFrançois Tigeot 282c6f73aabSFrançois Tigeot r = radeon_vce_get_destroy_msg(rdev, ring->idx, handle, fence); 283c6f73aabSFrançois Tigeot if (r) { 284c6f73aabSFrançois Tigeot DRM_ERROR("Failed to get dummy destroy msg\n"); 285c6f73aabSFrançois Tigeot return r; 286c6f73aabSFrançois Tigeot } 287c6f73aabSFrançois Tigeot 288f43cf1b1SMichael Neumann } else { 289f43cf1b1SMichael Neumann r = radeon_ring_lock(rdev, ring, 64); 290f43cf1b1SMichael Neumann if (r) { 291f43cf1b1SMichael Neumann DRM_ERROR("Failed to lock ring A %d\n", ring->idx); 292f43cf1b1SMichael Neumann return r; 293f43cf1b1SMichael Neumann } 294f43cf1b1SMichael Neumann radeon_fence_emit(rdev, fence, ring->idx); 295c6f73aabSFrançois Tigeot radeon_ring_unlock_commit(rdev, ring, false); 296f43cf1b1SMichael Neumann } 297f43cf1b1SMichael Neumann return 0; 298f43cf1b1SMichael Neumann } 299f43cf1b1SMichael Neumann 300926deccbSFrançois Tigeot void radeon_test_ring_sync(struct radeon_device *rdev, 301926deccbSFrançois Tigeot struct radeon_ring *ringA, 302926deccbSFrançois Tigeot struct radeon_ring *ringB) 303926deccbSFrançois Tigeot { 304926deccbSFrançois Tigeot struct radeon_fence *fence1 = NULL, *fence2 = NULL; 305926deccbSFrançois Tigeot struct radeon_semaphore *semaphore = NULL; 306926deccbSFrançois Tigeot int r; 307926deccbSFrançois Tigeot 308926deccbSFrançois Tigeot r = radeon_semaphore_create(rdev, &semaphore); 309926deccbSFrançois Tigeot if (r) { 310926deccbSFrançois Tigeot DRM_ERROR("Failed to create semaphore\n"); 311926deccbSFrançois Tigeot goto out_cleanup; 312926deccbSFrançois Tigeot } 313926deccbSFrançois Tigeot 314926deccbSFrançois Tigeot r = radeon_ring_lock(rdev, ringA, 64); 315926deccbSFrançois Tigeot if (r) { 316926deccbSFrançois Tigeot DRM_ERROR("Failed to lock ring A %d\n", ringA->idx); 317926deccbSFrançois Tigeot goto out_cleanup; 318926deccbSFrançois Tigeot } 319926deccbSFrançois Tigeot radeon_semaphore_emit_wait(rdev, ringA->idx, semaphore); 320c6f73aabSFrançois Tigeot radeon_ring_unlock_commit(rdev, ringA, false); 321f43cf1b1SMichael Neumann 322f43cf1b1SMichael Neumann r = radeon_test_create_and_emit_fence(rdev, ringA, &fence1); 323f43cf1b1SMichael Neumann if (r) 324f43cf1b1SMichael Neumann goto out_cleanup; 325f43cf1b1SMichael Neumann 326f43cf1b1SMichael Neumann r = radeon_ring_lock(rdev, ringA, 64); 327926deccbSFrançois Tigeot if (r) { 328f43cf1b1SMichael Neumann DRM_ERROR("Failed to lock ring A %d\n", ringA->idx); 329926deccbSFrançois Tigeot goto out_cleanup; 330926deccbSFrançois Tigeot } 331926deccbSFrançois Tigeot radeon_semaphore_emit_wait(rdev, ringA->idx, semaphore); 332c6f73aabSFrançois Tigeot radeon_ring_unlock_commit(rdev, ringA, false); 333926deccbSFrançois Tigeot 334f43cf1b1SMichael Neumann r = radeon_test_create_and_emit_fence(rdev, ringA, &fence2); 335f43cf1b1SMichael Neumann if (r) 336f43cf1b1SMichael Neumann goto out_cleanup; 337f43cf1b1SMichael Neumann 338c4ef309bSzrj mdelay(1000); 339926deccbSFrançois Tigeot 340926deccbSFrançois Tigeot if (radeon_fence_signaled(fence1)) { 341926deccbSFrançois Tigeot DRM_ERROR("Fence 1 signaled without waiting for semaphore.\n"); 342926deccbSFrançois Tigeot goto out_cleanup; 343926deccbSFrançois Tigeot } 344926deccbSFrançois Tigeot 345926deccbSFrançois Tigeot r = radeon_ring_lock(rdev, ringB, 64); 346926deccbSFrançois Tigeot if (r) { 347926deccbSFrançois Tigeot DRM_ERROR("Failed to lock ring B %p\n", ringB); 348926deccbSFrançois Tigeot goto out_cleanup; 349926deccbSFrançois Tigeot } 350926deccbSFrançois Tigeot radeon_semaphore_emit_signal(rdev, ringB->idx, semaphore); 351c6f73aabSFrançois Tigeot radeon_ring_unlock_commit(rdev, ringB, false); 352926deccbSFrançois Tigeot 353926deccbSFrançois Tigeot r = radeon_fence_wait(fence1, false); 354926deccbSFrançois Tigeot if (r) { 355926deccbSFrançois Tigeot DRM_ERROR("Failed to wait for sync fence 1\n"); 356926deccbSFrançois Tigeot goto out_cleanup; 357926deccbSFrançois Tigeot } 358926deccbSFrançois Tigeot 359c4ef309bSzrj mdelay(1000); 360926deccbSFrançois Tigeot 361926deccbSFrançois Tigeot if (radeon_fence_signaled(fence2)) { 362926deccbSFrançois Tigeot DRM_ERROR("Fence 2 signaled without waiting for semaphore.\n"); 363926deccbSFrançois Tigeot goto out_cleanup; 364926deccbSFrançois Tigeot } 365926deccbSFrançois Tigeot 366926deccbSFrançois Tigeot r = radeon_ring_lock(rdev, ringB, 64); 367926deccbSFrançois Tigeot if (r) { 368926deccbSFrançois Tigeot DRM_ERROR("Failed to lock ring B %p\n", ringB); 369926deccbSFrançois Tigeot goto out_cleanup; 370926deccbSFrançois Tigeot } 371926deccbSFrançois Tigeot radeon_semaphore_emit_signal(rdev, ringB->idx, semaphore); 372c6f73aabSFrançois Tigeot radeon_ring_unlock_commit(rdev, ringB, false); 373926deccbSFrançois Tigeot 374926deccbSFrançois Tigeot r = radeon_fence_wait(fence2, false); 375926deccbSFrançois Tigeot if (r) { 376926deccbSFrançois Tigeot DRM_ERROR("Failed to wait for sync fence 1\n"); 377926deccbSFrançois Tigeot goto out_cleanup; 378926deccbSFrançois Tigeot } 379926deccbSFrançois Tigeot 380926deccbSFrançois Tigeot out_cleanup: 381926deccbSFrançois Tigeot radeon_semaphore_free(rdev, &semaphore, NULL); 382926deccbSFrançois Tigeot 383926deccbSFrançois Tigeot if (fence1) 384926deccbSFrançois Tigeot radeon_fence_unref(&fence1); 385926deccbSFrançois Tigeot 386926deccbSFrançois Tigeot if (fence2) 387926deccbSFrançois Tigeot radeon_fence_unref(&fence2); 388926deccbSFrançois Tigeot 389926deccbSFrançois Tigeot if (r) 390c4ef309bSzrj printk(KERN_WARNING "Error while testing ring sync (%d).\n", r); 391926deccbSFrançois Tigeot } 392926deccbSFrançois Tigeot 393926deccbSFrançois Tigeot static void radeon_test_ring_sync2(struct radeon_device *rdev, 394926deccbSFrançois Tigeot struct radeon_ring *ringA, 395926deccbSFrançois Tigeot struct radeon_ring *ringB, 396926deccbSFrançois Tigeot struct radeon_ring *ringC) 397926deccbSFrançois Tigeot { 398926deccbSFrançois Tigeot struct radeon_fence *fenceA = NULL, *fenceB = NULL; 399926deccbSFrançois Tigeot struct radeon_semaphore *semaphore = NULL; 400926deccbSFrançois Tigeot bool sigA, sigB; 401926deccbSFrançois Tigeot int i, r; 402926deccbSFrançois Tigeot 403926deccbSFrançois Tigeot r = radeon_semaphore_create(rdev, &semaphore); 404926deccbSFrançois Tigeot if (r) { 405926deccbSFrançois Tigeot DRM_ERROR("Failed to create semaphore\n"); 406926deccbSFrançois Tigeot goto out_cleanup; 407926deccbSFrançois Tigeot } 408926deccbSFrançois Tigeot 409926deccbSFrançois Tigeot r = radeon_ring_lock(rdev, ringA, 64); 410926deccbSFrançois Tigeot if (r) { 411926deccbSFrançois Tigeot DRM_ERROR("Failed to lock ring A %d\n", ringA->idx); 412926deccbSFrançois Tigeot goto out_cleanup; 413926deccbSFrançois Tigeot } 414926deccbSFrançois Tigeot radeon_semaphore_emit_wait(rdev, ringA->idx, semaphore); 415c6f73aabSFrançois Tigeot radeon_ring_unlock_commit(rdev, ringA, false); 416926deccbSFrançois Tigeot 417f43cf1b1SMichael Neumann r = radeon_test_create_and_emit_fence(rdev, ringA, &fenceA); 418f43cf1b1SMichael Neumann if (r) 419f43cf1b1SMichael Neumann goto out_cleanup; 420f43cf1b1SMichael Neumann 421926deccbSFrançois Tigeot r = radeon_ring_lock(rdev, ringB, 64); 422926deccbSFrançois Tigeot if (r) { 423926deccbSFrançois Tigeot DRM_ERROR("Failed to lock ring B %d\n", ringB->idx); 424926deccbSFrançois Tigeot goto out_cleanup; 425926deccbSFrançois Tigeot } 426926deccbSFrançois Tigeot radeon_semaphore_emit_wait(rdev, ringB->idx, semaphore); 427c6f73aabSFrançois Tigeot radeon_ring_unlock_commit(rdev, ringB, false); 428f43cf1b1SMichael Neumann r = radeon_test_create_and_emit_fence(rdev, ringB, &fenceB); 429f43cf1b1SMichael Neumann if (r) 430f43cf1b1SMichael Neumann goto out_cleanup; 431926deccbSFrançois Tigeot 432c4ef309bSzrj mdelay(1000); 433926deccbSFrançois Tigeot 434926deccbSFrançois Tigeot if (radeon_fence_signaled(fenceA)) { 435926deccbSFrançois Tigeot DRM_ERROR("Fence A signaled without waiting for semaphore.\n"); 436926deccbSFrançois Tigeot goto out_cleanup; 437926deccbSFrançois Tigeot } 438926deccbSFrançois Tigeot if (radeon_fence_signaled(fenceB)) { 439f43cf1b1SMichael Neumann DRM_ERROR("Fence B signaled without waiting for semaphore.\n"); 440926deccbSFrançois Tigeot goto out_cleanup; 441926deccbSFrançois Tigeot } 442926deccbSFrançois Tigeot 443926deccbSFrançois Tigeot r = radeon_ring_lock(rdev, ringC, 64); 444926deccbSFrançois Tigeot if (r) { 445926deccbSFrançois Tigeot DRM_ERROR("Failed to lock ring B %p\n", ringC); 446926deccbSFrançois Tigeot goto out_cleanup; 447926deccbSFrançois Tigeot } 448926deccbSFrançois Tigeot radeon_semaphore_emit_signal(rdev, ringC->idx, semaphore); 449c6f73aabSFrançois Tigeot radeon_ring_unlock_commit(rdev, ringC, false); 450926deccbSFrançois Tigeot 451926deccbSFrançois Tigeot for (i = 0; i < 30; ++i) { 452c4ef309bSzrj mdelay(100); 453926deccbSFrançois Tigeot sigA = radeon_fence_signaled(fenceA); 454926deccbSFrançois Tigeot sigB = radeon_fence_signaled(fenceB); 455926deccbSFrançois Tigeot if (sigA || sigB) 456926deccbSFrançois Tigeot break; 457926deccbSFrançois Tigeot } 458926deccbSFrançois Tigeot 459926deccbSFrançois Tigeot if (!sigA && !sigB) { 460926deccbSFrançois Tigeot DRM_ERROR("Neither fence A nor B has been signaled\n"); 461926deccbSFrançois Tigeot goto out_cleanup; 462926deccbSFrançois Tigeot } else if (sigA && sigB) { 463926deccbSFrançois Tigeot DRM_ERROR("Both fence A and B has been signaled\n"); 464926deccbSFrançois Tigeot goto out_cleanup; 465926deccbSFrançois Tigeot } 466926deccbSFrançois Tigeot 467926deccbSFrançois Tigeot DRM_INFO("Fence %c was first signaled\n", sigA ? 'A' : 'B'); 468926deccbSFrançois Tigeot 469926deccbSFrançois Tigeot r = radeon_ring_lock(rdev, ringC, 64); 470926deccbSFrançois Tigeot if (r) { 471926deccbSFrançois Tigeot DRM_ERROR("Failed to lock ring B %p\n", ringC); 472926deccbSFrançois Tigeot goto out_cleanup; 473926deccbSFrançois Tigeot } 474926deccbSFrançois Tigeot radeon_semaphore_emit_signal(rdev, ringC->idx, semaphore); 475c6f73aabSFrançois Tigeot radeon_ring_unlock_commit(rdev, ringC, false); 476926deccbSFrançois Tigeot 477c4ef309bSzrj mdelay(1000); 478926deccbSFrançois Tigeot 479926deccbSFrançois Tigeot r = radeon_fence_wait(fenceA, false); 480926deccbSFrançois Tigeot if (r) { 481926deccbSFrançois Tigeot DRM_ERROR("Failed to wait for sync fence A\n"); 482926deccbSFrançois Tigeot goto out_cleanup; 483926deccbSFrançois Tigeot } 484926deccbSFrançois Tigeot r = radeon_fence_wait(fenceB, false); 485926deccbSFrançois Tigeot if (r) { 486926deccbSFrançois Tigeot DRM_ERROR("Failed to wait for sync fence B\n"); 487926deccbSFrançois Tigeot goto out_cleanup; 488926deccbSFrançois Tigeot } 489926deccbSFrançois Tigeot 490926deccbSFrançois Tigeot out_cleanup: 491926deccbSFrançois Tigeot radeon_semaphore_free(rdev, &semaphore, NULL); 492926deccbSFrançois Tigeot 493926deccbSFrançois Tigeot if (fenceA) 494926deccbSFrançois Tigeot radeon_fence_unref(&fenceA); 495926deccbSFrançois Tigeot 496926deccbSFrançois Tigeot if (fenceB) 497926deccbSFrançois Tigeot radeon_fence_unref(&fenceB); 498926deccbSFrançois Tigeot 499926deccbSFrançois Tigeot if (r) 500c4ef309bSzrj printk(KERN_WARNING "Error while testing ring sync (%d).\n", r); 501926deccbSFrançois Tigeot } 502926deccbSFrançois Tigeot 503c6f73aabSFrançois Tigeot static bool radeon_test_sync_possible(struct radeon_ring *ringA, 504c6f73aabSFrançois Tigeot struct radeon_ring *ringB) 505c6f73aabSFrançois Tigeot { 506c6f73aabSFrançois Tigeot if (ringA->idx == TN_RING_TYPE_VCE2_INDEX && 507c6f73aabSFrançois Tigeot ringB->idx == TN_RING_TYPE_VCE1_INDEX) 508c6f73aabSFrançois Tigeot return false; 509c6f73aabSFrançois Tigeot 510c6f73aabSFrançois Tigeot return true; 511c6f73aabSFrançois Tigeot } 512c6f73aabSFrançois Tigeot 513926deccbSFrançois Tigeot void radeon_test_syncing(struct radeon_device *rdev) 514926deccbSFrançois Tigeot { 515926deccbSFrançois Tigeot int i, j, k; 516926deccbSFrançois Tigeot 517926deccbSFrançois Tigeot for (i = 1; i < RADEON_NUM_RINGS; ++i) { 518926deccbSFrançois Tigeot struct radeon_ring *ringA = &rdev->ring[i]; 519926deccbSFrançois Tigeot if (!ringA->ready) 520926deccbSFrançois Tigeot continue; 521926deccbSFrançois Tigeot 522926deccbSFrançois Tigeot for (j = 0; j < i; ++j) { 523926deccbSFrançois Tigeot struct radeon_ring *ringB = &rdev->ring[j]; 524926deccbSFrançois Tigeot if (!ringB->ready) 525926deccbSFrançois Tigeot continue; 526926deccbSFrançois Tigeot 527c6f73aabSFrançois Tigeot if (!radeon_test_sync_possible(ringA, ringB)) 528c6f73aabSFrançois Tigeot continue; 529c6f73aabSFrançois Tigeot 530926deccbSFrançois Tigeot DRM_INFO("Testing syncing between rings %d and %d...\n", i, j); 531926deccbSFrançois Tigeot radeon_test_ring_sync(rdev, ringA, ringB); 532926deccbSFrançois Tigeot 533926deccbSFrançois Tigeot DRM_INFO("Testing syncing between rings %d and %d...\n", j, i); 534926deccbSFrançois Tigeot radeon_test_ring_sync(rdev, ringB, ringA); 535926deccbSFrançois Tigeot 536926deccbSFrançois Tigeot for (k = 0; k < j; ++k) { 537926deccbSFrançois Tigeot struct radeon_ring *ringC = &rdev->ring[k]; 538926deccbSFrançois Tigeot if (!ringC->ready) 539926deccbSFrançois Tigeot continue; 540926deccbSFrançois Tigeot 541c6f73aabSFrançois Tigeot if (!radeon_test_sync_possible(ringA, ringC)) 542c6f73aabSFrançois Tigeot continue; 543c6f73aabSFrançois Tigeot 544c6f73aabSFrançois Tigeot if (!radeon_test_sync_possible(ringB, ringC)) 545c6f73aabSFrançois Tigeot continue; 546c6f73aabSFrançois Tigeot 547926deccbSFrançois Tigeot DRM_INFO("Testing syncing between rings %d, %d and %d...\n", i, j, k); 548926deccbSFrançois Tigeot radeon_test_ring_sync2(rdev, ringA, ringB, ringC); 549926deccbSFrançois Tigeot 550926deccbSFrançois Tigeot DRM_INFO("Testing syncing between rings %d, %d and %d...\n", i, k, j); 551926deccbSFrançois Tigeot radeon_test_ring_sync2(rdev, ringA, ringC, ringB); 552926deccbSFrançois Tigeot 553926deccbSFrançois Tigeot DRM_INFO("Testing syncing between rings %d, %d and %d...\n", j, i, k); 554926deccbSFrançois Tigeot radeon_test_ring_sync2(rdev, ringB, ringA, ringC); 555926deccbSFrançois Tigeot 556926deccbSFrançois Tigeot DRM_INFO("Testing syncing between rings %d, %d and %d...\n", j, k, i); 557926deccbSFrançois Tigeot radeon_test_ring_sync2(rdev, ringB, ringC, ringA); 558926deccbSFrançois Tigeot 559926deccbSFrançois Tigeot DRM_INFO("Testing syncing between rings %d, %d and %d...\n", k, i, j); 560926deccbSFrançois Tigeot radeon_test_ring_sync2(rdev, ringC, ringA, ringB); 561926deccbSFrançois Tigeot 562926deccbSFrançois Tigeot DRM_INFO("Testing syncing between rings %d, %d and %d...\n", k, j, i); 563926deccbSFrançois Tigeot radeon_test_ring_sync2(rdev, ringC, ringB, ringA); 564926deccbSFrançois Tigeot } 565926deccbSFrançois Tigeot } 566926deccbSFrançois Tigeot } 567926deccbSFrançois Tigeot } 568