1926deccbSFrançois Tigeot /* 2926deccbSFrançois Tigeot * Copyright 2009 VMware, Inc. 3926deccbSFrançois Tigeot * 4926deccbSFrançois Tigeot * Permission is hereby granted, free of charge, to any person obtaining a 5926deccbSFrançois Tigeot * copy of this software and associated documentation files (the "Software"), 6926deccbSFrançois Tigeot * to deal in the Software without restriction, including without limitation 7926deccbSFrançois Tigeot * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8926deccbSFrançois Tigeot * and/or sell copies of the Software, and to permit persons to whom the 9926deccbSFrançois Tigeot * Software is furnished to do so, subject to the following conditions: 10926deccbSFrançois Tigeot * 11926deccbSFrançois Tigeot * The above copyright notice and this permission notice shall be included in 12926deccbSFrançois Tigeot * all copies or substantial portions of the Software. 13926deccbSFrançois Tigeot * 14926deccbSFrançois Tigeot * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15926deccbSFrançois Tigeot * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16926deccbSFrançois Tigeot * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17926deccbSFrançois Tigeot * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18926deccbSFrançois Tigeot * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19926deccbSFrançois Tigeot * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20926deccbSFrançois Tigeot * OTHER DEALINGS IN THE SOFTWARE. 21926deccbSFrançois Tigeot * 22926deccbSFrançois Tigeot * Authors: Michel Dänzer 23926deccbSFrançois Tigeot */ 24926deccbSFrançois Tigeot #include <drm/drmP.h> 2583b4b9b9SFrançois Tigeot #include <drm/radeon_drm.h> 26926deccbSFrançois Tigeot #include "radeon_reg.h" 27926deccbSFrançois Tigeot #include "radeon.h" 28926deccbSFrançois Tigeot 29926deccbSFrançois Tigeot #define RADEON_TEST_COPY_BLIT 1 30926deccbSFrançois Tigeot #define RADEON_TEST_COPY_DMA 0 31926deccbSFrançois Tigeot 32926deccbSFrançois Tigeot 33926deccbSFrançois Tigeot /* Test BO GTT->VRAM and VRAM->GTT GPU copies across the whole GTT aperture */ 34926deccbSFrançois Tigeot static void radeon_do_test_moves(struct radeon_device *rdev, int flag) 35926deccbSFrançois Tigeot { 36926deccbSFrançois Tigeot struct radeon_bo *vram_obj = NULL; 37926deccbSFrançois Tigeot struct radeon_bo **gtt_obj = NULL; 38926deccbSFrançois Tigeot struct radeon_fence *fence = NULL; 39f77dbd6cSFrançois Tigeot u64 gtt_addr, vram_addr; 404cd92098Szrj unsigned n, size; 414cd92098Szrj int i, r, ring; 42926deccbSFrançois Tigeot 43926deccbSFrançois Tigeot switch (flag) { 44926deccbSFrançois Tigeot case RADEON_TEST_COPY_DMA: 45926deccbSFrançois Tigeot ring = radeon_copy_dma_ring_index(rdev); 46926deccbSFrançois Tigeot break; 47926deccbSFrançois Tigeot case RADEON_TEST_COPY_BLIT: 48926deccbSFrançois Tigeot ring = radeon_copy_blit_ring_index(rdev); 49926deccbSFrançois Tigeot break; 50926deccbSFrançois Tigeot default: 51926deccbSFrançois Tigeot DRM_ERROR("Unknown copy method\n"); 52926deccbSFrançois Tigeot return; 53926deccbSFrançois Tigeot } 54926deccbSFrançois Tigeot 55926deccbSFrançois Tigeot size = 1024 * 1024; 56926deccbSFrançois Tigeot 57926deccbSFrançois Tigeot /* Number of tests = 58926deccbSFrançois Tigeot * (Total GTT - IB pool - writeback page - ring buffers) / test size 59926deccbSFrançois Tigeot */ 60c6f73aabSFrançois Tigeot n = rdev->mc.gtt_size - rdev->gart_pin_size; 61926deccbSFrançois Tigeot n /= size; 62926deccbSFrançois Tigeot 63c4ef309bSzrj gtt_obj = kzalloc(n * sizeof(*gtt_obj), GFP_KERNEL); 64926deccbSFrançois Tigeot if (!gtt_obj) { 65926deccbSFrançois Tigeot DRM_ERROR("Failed to allocate %d pointers\n", n); 66926deccbSFrançois Tigeot r = 1; 67926deccbSFrançois Tigeot goto out_cleanup; 68926deccbSFrançois Tigeot } 69926deccbSFrançois Tigeot 70926deccbSFrançois Tigeot r = radeon_bo_create(rdev, size, PAGE_SIZE, true, RADEON_GEM_DOMAIN_VRAM, 71c6f73aabSFrançois Tigeot 0, NULL, &vram_obj); 72926deccbSFrançois Tigeot if (r) { 73926deccbSFrançois Tigeot DRM_ERROR("Failed to create VRAM object\n"); 74926deccbSFrançois Tigeot goto out_cleanup; 75926deccbSFrançois Tigeot } 76926deccbSFrançois Tigeot r = radeon_bo_reserve(vram_obj, false); 77926deccbSFrançois Tigeot if (unlikely(r != 0)) 78a34b4168SMatthew Dillon goto out_unref; 79926deccbSFrançois Tigeot r = radeon_bo_pin(vram_obj, RADEON_GEM_DOMAIN_VRAM, &vram_addr); 80926deccbSFrançois Tigeot if (r) { 81926deccbSFrançois Tigeot DRM_ERROR("Failed to pin VRAM object\n"); 82a34b4168SMatthew Dillon goto out_unres; 83926deccbSFrançois Tigeot } 84926deccbSFrançois Tigeot for (i = 0; i < n; i++) { 85926deccbSFrançois Tigeot void *gtt_map, *vram_map; 86926deccbSFrançois Tigeot void **gtt_start, **gtt_end; 87926deccbSFrançois Tigeot void **vram_start, **vram_end; 88926deccbSFrançois Tigeot 89926deccbSFrançois Tigeot r = radeon_bo_create(rdev, size, PAGE_SIZE, true, 90c6f73aabSFrançois Tigeot RADEON_GEM_DOMAIN_GTT, 0, NULL, gtt_obj + i); 91926deccbSFrançois Tigeot if (r) { 92926deccbSFrançois Tigeot DRM_ERROR("Failed to create GTT object %d\n", i); 93a34b4168SMatthew Dillon goto out_lclean; 94926deccbSFrançois Tigeot } 95926deccbSFrançois Tigeot 96926deccbSFrançois Tigeot r = radeon_bo_reserve(gtt_obj[i], false); 97926deccbSFrançois Tigeot if (unlikely(r != 0)) 98a34b4168SMatthew Dillon goto out_lclean_unref; 99926deccbSFrançois Tigeot r = radeon_bo_pin(gtt_obj[i], RADEON_GEM_DOMAIN_GTT, >t_addr); 100926deccbSFrançois Tigeot if (r) { 101926deccbSFrançois Tigeot DRM_ERROR("Failed to pin GTT object %d\n", i); 102a34b4168SMatthew Dillon goto out_lclean_unres; 103926deccbSFrançois Tigeot } 104926deccbSFrançois Tigeot 105926deccbSFrançois Tigeot r = radeon_bo_kmap(gtt_obj[i], >t_map); 106926deccbSFrançois Tigeot if (r) { 107926deccbSFrançois Tigeot DRM_ERROR("Failed to map GTT object %d\n", i); 108a34b4168SMatthew Dillon goto out_lclean_unpin; 109926deccbSFrançois Tigeot } 110926deccbSFrançois Tigeot 111926deccbSFrançois Tigeot for (gtt_start = gtt_map, gtt_end = (void *)((uintptr_t)gtt_map + size); 112926deccbSFrançois Tigeot gtt_start < gtt_end; 113926deccbSFrançois Tigeot gtt_start++) 114926deccbSFrançois Tigeot *gtt_start = gtt_start; 115926deccbSFrançois Tigeot 116926deccbSFrançois Tigeot radeon_bo_kunmap(gtt_obj[i]); 117926deccbSFrançois Tigeot 118926deccbSFrançois Tigeot if (ring == R600_RING_TYPE_DMA_INDEX) 119*1cfef1a5SFrançois Tigeot fence = radeon_copy_dma(rdev, gtt_addr, vram_addr, 120*1cfef1a5SFrançois Tigeot size / RADEON_GPU_PAGE_SIZE, 121*1cfef1a5SFrançois Tigeot NULL); 122926deccbSFrançois Tigeot else 123*1cfef1a5SFrançois Tigeot fence = radeon_copy_blit(rdev, gtt_addr, vram_addr, 124*1cfef1a5SFrançois Tigeot size / RADEON_GPU_PAGE_SIZE, 125*1cfef1a5SFrançois Tigeot NULL); 126*1cfef1a5SFrançois Tigeot if (IS_ERR(fence)) { 127926deccbSFrançois Tigeot DRM_ERROR("Failed GTT->VRAM copy %d\n", i); 128*1cfef1a5SFrançois Tigeot r = PTR_ERR(fence); 129a34b4168SMatthew Dillon goto out_lclean_unpin; 130926deccbSFrançois Tigeot } 131926deccbSFrançois Tigeot 132926deccbSFrançois Tigeot r = radeon_fence_wait(fence, false); 133926deccbSFrançois Tigeot if (r) { 134926deccbSFrançois Tigeot DRM_ERROR("Failed to wait for GTT->VRAM fence %d\n", i); 135a34b4168SMatthew Dillon goto out_lclean_unpin; 136926deccbSFrançois Tigeot } 137926deccbSFrançois Tigeot 138926deccbSFrançois Tigeot radeon_fence_unref(&fence); 139926deccbSFrançois Tigeot 140926deccbSFrançois Tigeot r = radeon_bo_kmap(vram_obj, &vram_map); 141926deccbSFrançois Tigeot if (r) { 142926deccbSFrançois Tigeot DRM_ERROR("Failed to map VRAM object after copy %d\n", i); 143a34b4168SMatthew Dillon goto out_lclean_unpin; 144926deccbSFrançois Tigeot } 145926deccbSFrançois Tigeot 146926deccbSFrançois Tigeot for (gtt_start = gtt_map, gtt_end = (void *)((uintptr_t)gtt_map + size), 147926deccbSFrançois Tigeot vram_start = vram_map, vram_end = (void *)((uintptr_t)vram_map + size); 148926deccbSFrançois Tigeot vram_start < vram_end; 149926deccbSFrançois Tigeot gtt_start++, vram_start++) { 150926deccbSFrançois Tigeot if (*vram_start != gtt_start) { 151926deccbSFrançois Tigeot DRM_ERROR("Incorrect GTT->VRAM copy %d: Got 0x%p, " 152926deccbSFrançois Tigeot "expected 0x%p (GTT/VRAM offset " 153926deccbSFrançois Tigeot "0x%16llx/0x%16llx)\n", 154926deccbSFrançois Tigeot i, *vram_start, gtt_start, 155926deccbSFrançois Tigeot (unsigned long long) 156926deccbSFrançois Tigeot ((uintptr_t)gtt_addr - (uintptr_t)rdev->mc.gtt_start + 157926deccbSFrançois Tigeot (uintptr_t)gtt_start - (uintptr_t)gtt_map), 158926deccbSFrançois Tigeot (unsigned long long) 159926deccbSFrançois Tigeot ((uintptr_t)vram_addr - (uintptr_t)rdev->mc.vram_start + 160926deccbSFrançois Tigeot (uintptr_t)gtt_start - (uintptr_t)gtt_map)); 161926deccbSFrançois Tigeot radeon_bo_kunmap(vram_obj); 162a34b4168SMatthew Dillon goto out_lclean_unpin; 163926deccbSFrançois Tigeot } 164926deccbSFrançois Tigeot *vram_start = vram_start; 165926deccbSFrançois Tigeot } 166926deccbSFrançois Tigeot 167926deccbSFrançois Tigeot radeon_bo_kunmap(vram_obj); 168926deccbSFrançois Tigeot 169926deccbSFrançois Tigeot if (ring == R600_RING_TYPE_DMA_INDEX) 170*1cfef1a5SFrançois Tigeot fence = radeon_copy_dma(rdev, vram_addr, gtt_addr, 171*1cfef1a5SFrançois Tigeot size / RADEON_GPU_PAGE_SIZE, 172*1cfef1a5SFrançois Tigeot NULL); 173926deccbSFrançois Tigeot else 174*1cfef1a5SFrançois Tigeot fence = radeon_copy_blit(rdev, vram_addr, gtt_addr, 175*1cfef1a5SFrançois Tigeot size / RADEON_GPU_PAGE_SIZE, 176*1cfef1a5SFrançois Tigeot NULL); 177*1cfef1a5SFrançois Tigeot if (IS_ERR(fence)) { 178926deccbSFrançois Tigeot DRM_ERROR("Failed VRAM->GTT copy %d\n", i); 179*1cfef1a5SFrançois Tigeot r = PTR_ERR(fence); 180a34b4168SMatthew Dillon goto out_lclean_unpin; 181926deccbSFrançois Tigeot } 182926deccbSFrançois Tigeot 183926deccbSFrançois Tigeot r = radeon_fence_wait(fence, false); 184926deccbSFrançois Tigeot if (r) { 185926deccbSFrançois Tigeot DRM_ERROR("Failed to wait for VRAM->GTT fence %d\n", i); 186a34b4168SMatthew Dillon goto out_lclean_unpin; 187926deccbSFrançois Tigeot } 188926deccbSFrançois Tigeot 189926deccbSFrançois Tigeot radeon_fence_unref(&fence); 190926deccbSFrançois Tigeot 191926deccbSFrançois Tigeot r = radeon_bo_kmap(gtt_obj[i], >t_map); 192926deccbSFrançois Tigeot if (r) { 193926deccbSFrançois Tigeot DRM_ERROR("Failed to map GTT object after copy %d\n", i); 194a34b4168SMatthew Dillon goto out_lclean_unpin; 195926deccbSFrançois Tigeot } 196926deccbSFrançois Tigeot 197926deccbSFrançois Tigeot for (gtt_start = gtt_map, gtt_end = (void *)((uintptr_t)gtt_map + size), 198926deccbSFrançois Tigeot vram_start = vram_map, vram_end = (void *)((uintptr_t)vram_map + size); 199926deccbSFrançois Tigeot gtt_start < gtt_end; 200926deccbSFrançois Tigeot gtt_start++, vram_start++) { 201926deccbSFrançois Tigeot if (*gtt_start != vram_start) { 202926deccbSFrançois Tigeot DRM_ERROR("Incorrect VRAM->GTT copy %d: Got 0x%p, " 203926deccbSFrançois Tigeot "expected 0x%p (VRAM/GTT offset " 204926deccbSFrançois Tigeot "0x%16llx/0x%16llx)\n", 205926deccbSFrançois Tigeot i, *gtt_start, vram_start, 206926deccbSFrançois Tigeot (unsigned long long) 207926deccbSFrançois Tigeot ((uintptr_t)vram_addr - (uintptr_t)rdev->mc.vram_start + 208926deccbSFrançois Tigeot (uintptr_t)vram_start - (uintptr_t)vram_map), 209926deccbSFrançois Tigeot (unsigned long long) 210926deccbSFrançois Tigeot ((uintptr_t)gtt_addr - (uintptr_t)rdev->mc.gtt_start + 211926deccbSFrançois Tigeot (uintptr_t)vram_start - (uintptr_t)vram_map)); 212926deccbSFrançois Tigeot radeon_bo_kunmap(gtt_obj[i]); 213a34b4168SMatthew Dillon goto out_lclean_unpin; 214926deccbSFrançois Tigeot } 215926deccbSFrançois Tigeot } 216926deccbSFrançois Tigeot 217926deccbSFrançois Tigeot radeon_bo_kunmap(gtt_obj[i]); 218926deccbSFrançois Tigeot 219f77dbd6cSFrançois Tigeot DRM_INFO("Tested GTT->VRAM and VRAM->GTT copy for GTT offset 0x%llx\n", 220926deccbSFrançois Tigeot (uintmax_t)gtt_addr - rdev->mc.gtt_start); 221a34b4168SMatthew Dillon continue; 222926deccbSFrançois Tigeot 223a34b4168SMatthew Dillon out_lclean_unpin: 224a34b4168SMatthew Dillon radeon_bo_unpin(gtt_obj[i]); 225a34b4168SMatthew Dillon out_lclean_unres: 226a34b4168SMatthew Dillon radeon_bo_unreserve(gtt_obj[i]); 227a34b4168SMatthew Dillon out_lclean_unref: 228a34b4168SMatthew Dillon radeon_bo_unref(>t_obj[i]); 229a34b4168SMatthew Dillon out_lclean: 230a34b4168SMatthew Dillon for (--i; i >= 0; --i) { 231926deccbSFrançois Tigeot radeon_bo_unpin(gtt_obj[i]); 232926deccbSFrançois Tigeot radeon_bo_unreserve(gtt_obj[i]); 233926deccbSFrançois Tigeot radeon_bo_unref(>t_obj[i]); 234926deccbSFrançois Tigeot } 235a34b4168SMatthew Dillon if (fence && !IS_ERR(fence)) 236a34b4168SMatthew Dillon radeon_fence_unref(&fence); 237a34b4168SMatthew Dillon break; 238926deccbSFrançois Tigeot } 239a34b4168SMatthew Dillon 240a34b4168SMatthew Dillon radeon_bo_unpin(vram_obj); 241a34b4168SMatthew Dillon out_unres: 242a34b4168SMatthew Dillon radeon_bo_unreserve(vram_obj); 243a34b4168SMatthew Dillon out_unref: 244a34b4168SMatthew Dillon radeon_bo_unref(&vram_obj); 245a34b4168SMatthew Dillon out_cleanup: 246a34b4168SMatthew Dillon if (gtt_obj) 247c4ef309bSzrj kfree(gtt_obj); 248926deccbSFrançois Tigeot if (fence) { 249926deccbSFrançois Tigeot radeon_fence_unref(&fence); 250926deccbSFrançois Tigeot } 251926deccbSFrançois Tigeot if (r) { 252c4ef309bSzrj printk(KERN_WARNING "Error while testing BO move.\n"); 253926deccbSFrançois Tigeot } 254926deccbSFrançois Tigeot } 255926deccbSFrançois Tigeot 256926deccbSFrançois Tigeot void radeon_test_moves(struct radeon_device *rdev) 257926deccbSFrançois Tigeot { 258926deccbSFrançois Tigeot if (rdev->asic->copy.dma) 259926deccbSFrançois Tigeot radeon_do_test_moves(rdev, RADEON_TEST_COPY_DMA); 260926deccbSFrançois Tigeot if (rdev->asic->copy.blit) 261926deccbSFrançois Tigeot radeon_do_test_moves(rdev, RADEON_TEST_COPY_BLIT); 262926deccbSFrançois Tigeot } 263926deccbSFrançois Tigeot 264f43cf1b1SMichael Neumann static int radeon_test_create_and_emit_fence(struct radeon_device *rdev, 265f43cf1b1SMichael Neumann struct radeon_ring *ring, 266f43cf1b1SMichael Neumann struct radeon_fence **fence) 267f43cf1b1SMichael Neumann { 268c6f73aabSFrançois Tigeot uint32_t handle = ring->idx ^ 0xdeafbeef; 269f43cf1b1SMichael Neumann int r; 270f43cf1b1SMichael Neumann 271f43cf1b1SMichael Neumann if (ring->idx == R600_RING_TYPE_UVD_INDEX) { 272c6f73aabSFrançois Tigeot r = radeon_uvd_get_create_msg(rdev, ring->idx, handle, NULL); 273f43cf1b1SMichael Neumann if (r) { 274f43cf1b1SMichael Neumann DRM_ERROR("Failed to get dummy create msg\n"); 275f43cf1b1SMichael Neumann return r; 276f43cf1b1SMichael Neumann } 277f43cf1b1SMichael Neumann 278c6f73aabSFrançois Tigeot r = radeon_uvd_get_destroy_msg(rdev, ring->idx, handle, fence); 279f43cf1b1SMichael Neumann if (r) { 280f43cf1b1SMichael Neumann DRM_ERROR("Failed to get dummy destroy msg\n"); 281f43cf1b1SMichael Neumann return r; 282f43cf1b1SMichael Neumann } 283c6f73aabSFrançois Tigeot 284c6f73aabSFrançois Tigeot } else if (ring->idx == TN_RING_TYPE_VCE1_INDEX || 285c6f73aabSFrançois Tigeot ring->idx == TN_RING_TYPE_VCE2_INDEX) { 286c6f73aabSFrançois Tigeot r = radeon_vce_get_create_msg(rdev, ring->idx, handle, NULL); 287c6f73aabSFrançois Tigeot if (r) { 288c6f73aabSFrançois Tigeot DRM_ERROR("Failed to get dummy create msg\n"); 289c6f73aabSFrançois Tigeot return r; 290c6f73aabSFrançois Tigeot } 291c6f73aabSFrançois Tigeot 292c6f73aabSFrançois Tigeot r = radeon_vce_get_destroy_msg(rdev, ring->idx, handle, fence); 293c6f73aabSFrançois Tigeot if (r) { 294c6f73aabSFrançois Tigeot DRM_ERROR("Failed to get dummy destroy msg\n"); 295c6f73aabSFrançois Tigeot return r; 296c6f73aabSFrançois Tigeot } 297c6f73aabSFrançois Tigeot 298f43cf1b1SMichael Neumann } else { 299f43cf1b1SMichael Neumann r = radeon_ring_lock(rdev, ring, 64); 300f43cf1b1SMichael Neumann if (r) { 301f43cf1b1SMichael Neumann DRM_ERROR("Failed to lock ring A %d\n", ring->idx); 302f43cf1b1SMichael Neumann return r; 303f43cf1b1SMichael Neumann } 304f43cf1b1SMichael Neumann radeon_fence_emit(rdev, fence, ring->idx); 305c6f73aabSFrançois Tigeot radeon_ring_unlock_commit(rdev, ring, false); 306f43cf1b1SMichael Neumann } 307f43cf1b1SMichael Neumann return 0; 308f43cf1b1SMichael Neumann } 309f43cf1b1SMichael Neumann 310926deccbSFrançois Tigeot void radeon_test_ring_sync(struct radeon_device *rdev, 311926deccbSFrançois Tigeot struct radeon_ring *ringA, 312926deccbSFrançois Tigeot struct radeon_ring *ringB) 313926deccbSFrançois Tigeot { 314926deccbSFrançois Tigeot struct radeon_fence *fence1 = NULL, *fence2 = NULL; 315926deccbSFrançois Tigeot struct radeon_semaphore *semaphore = NULL; 316926deccbSFrançois Tigeot int r; 317926deccbSFrançois Tigeot 318926deccbSFrançois Tigeot r = radeon_semaphore_create(rdev, &semaphore); 319926deccbSFrançois Tigeot if (r) { 320926deccbSFrançois Tigeot DRM_ERROR("Failed to create semaphore\n"); 321926deccbSFrançois Tigeot goto out_cleanup; 322926deccbSFrançois Tigeot } 323926deccbSFrançois Tigeot 324926deccbSFrançois Tigeot r = radeon_ring_lock(rdev, ringA, 64); 325926deccbSFrançois Tigeot if (r) { 326926deccbSFrançois Tigeot DRM_ERROR("Failed to lock ring A %d\n", ringA->idx); 327926deccbSFrançois Tigeot goto out_cleanup; 328926deccbSFrançois Tigeot } 329926deccbSFrançois Tigeot radeon_semaphore_emit_wait(rdev, ringA->idx, semaphore); 330c6f73aabSFrançois Tigeot radeon_ring_unlock_commit(rdev, ringA, false); 331f43cf1b1SMichael Neumann 332f43cf1b1SMichael Neumann r = radeon_test_create_and_emit_fence(rdev, ringA, &fence1); 333f43cf1b1SMichael Neumann if (r) 334f43cf1b1SMichael Neumann goto out_cleanup; 335f43cf1b1SMichael Neumann 336f43cf1b1SMichael Neumann r = radeon_ring_lock(rdev, ringA, 64); 337926deccbSFrançois Tigeot if (r) { 338f43cf1b1SMichael Neumann DRM_ERROR("Failed to lock ring A %d\n", ringA->idx); 339926deccbSFrançois Tigeot goto out_cleanup; 340926deccbSFrançois Tigeot } 341926deccbSFrançois Tigeot radeon_semaphore_emit_wait(rdev, ringA->idx, semaphore); 342c6f73aabSFrançois Tigeot radeon_ring_unlock_commit(rdev, ringA, false); 343926deccbSFrançois Tigeot 344f43cf1b1SMichael Neumann r = radeon_test_create_and_emit_fence(rdev, ringA, &fence2); 345f43cf1b1SMichael Neumann if (r) 346f43cf1b1SMichael Neumann goto out_cleanup; 347f43cf1b1SMichael Neumann 348c4ef309bSzrj mdelay(1000); 349926deccbSFrançois Tigeot 350926deccbSFrançois Tigeot if (radeon_fence_signaled(fence1)) { 351926deccbSFrançois Tigeot DRM_ERROR("Fence 1 signaled without waiting for semaphore.\n"); 352926deccbSFrançois Tigeot goto out_cleanup; 353926deccbSFrançois Tigeot } 354926deccbSFrançois Tigeot 355926deccbSFrançois Tigeot r = radeon_ring_lock(rdev, ringB, 64); 356926deccbSFrançois Tigeot if (r) { 357926deccbSFrançois Tigeot DRM_ERROR("Failed to lock ring B %p\n", ringB); 358926deccbSFrançois Tigeot goto out_cleanup; 359926deccbSFrançois Tigeot } 360926deccbSFrançois Tigeot radeon_semaphore_emit_signal(rdev, ringB->idx, semaphore); 361c6f73aabSFrançois Tigeot radeon_ring_unlock_commit(rdev, ringB, false); 362926deccbSFrançois Tigeot 363926deccbSFrançois Tigeot r = radeon_fence_wait(fence1, false); 364926deccbSFrançois Tigeot if (r) { 365926deccbSFrançois Tigeot DRM_ERROR("Failed to wait for sync fence 1\n"); 366926deccbSFrançois Tigeot goto out_cleanup; 367926deccbSFrançois Tigeot } 368926deccbSFrançois Tigeot 369c4ef309bSzrj mdelay(1000); 370926deccbSFrançois Tigeot 371926deccbSFrançois Tigeot if (radeon_fence_signaled(fence2)) { 372926deccbSFrançois Tigeot DRM_ERROR("Fence 2 signaled without waiting for semaphore.\n"); 373926deccbSFrançois Tigeot goto out_cleanup; 374926deccbSFrançois Tigeot } 375926deccbSFrançois Tigeot 376926deccbSFrançois Tigeot r = radeon_ring_lock(rdev, ringB, 64); 377926deccbSFrançois Tigeot if (r) { 378926deccbSFrançois Tigeot DRM_ERROR("Failed to lock ring B %p\n", ringB); 379926deccbSFrançois Tigeot goto out_cleanup; 380926deccbSFrançois Tigeot } 381926deccbSFrançois Tigeot radeon_semaphore_emit_signal(rdev, ringB->idx, semaphore); 382c6f73aabSFrançois Tigeot radeon_ring_unlock_commit(rdev, ringB, false); 383926deccbSFrançois Tigeot 384926deccbSFrançois Tigeot r = radeon_fence_wait(fence2, false); 385926deccbSFrançois Tigeot if (r) { 386926deccbSFrançois Tigeot DRM_ERROR("Failed to wait for sync fence 1\n"); 387926deccbSFrançois Tigeot goto out_cleanup; 388926deccbSFrançois Tigeot } 389926deccbSFrançois Tigeot 390926deccbSFrançois Tigeot out_cleanup: 391926deccbSFrançois Tigeot radeon_semaphore_free(rdev, &semaphore, NULL); 392926deccbSFrançois Tigeot 393926deccbSFrançois Tigeot if (fence1) 394926deccbSFrançois Tigeot radeon_fence_unref(&fence1); 395926deccbSFrançois Tigeot 396926deccbSFrançois Tigeot if (fence2) 397926deccbSFrançois Tigeot radeon_fence_unref(&fence2); 398926deccbSFrançois Tigeot 399926deccbSFrançois Tigeot if (r) 400c4ef309bSzrj printk(KERN_WARNING "Error while testing ring sync (%d).\n", r); 401926deccbSFrançois Tigeot } 402926deccbSFrançois Tigeot 403926deccbSFrançois Tigeot static void radeon_test_ring_sync2(struct radeon_device *rdev, 404926deccbSFrançois Tigeot struct radeon_ring *ringA, 405926deccbSFrançois Tigeot struct radeon_ring *ringB, 406926deccbSFrançois Tigeot struct radeon_ring *ringC) 407926deccbSFrançois Tigeot { 408926deccbSFrançois Tigeot struct radeon_fence *fenceA = NULL, *fenceB = NULL; 409926deccbSFrançois Tigeot struct radeon_semaphore *semaphore = NULL; 410926deccbSFrançois Tigeot bool sigA, sigB; 411926deccbSFrançois Tigeot int i, r; 412926deccbSFrançois Tigeot 413926deccbSFrançois Tigeot r = radeon_semaphore_create(rdev, &semaphore); 414926deccbSFrançois Tigeot if (r) { 415926deccbSFrançois Tigeot DRM_ERROR("Failed to create semaphore\n"); 416926deccbSFrançois Tigeot goto out_cleanup; 417926deccbSFrançois Tigeot } 418926deccbSFrançois Tigeot 419926deccbSFrançois Tigeot r = radeon_ring_lock(rdev, ringA, 64); 420926deccbSFrançois Tigeot if (r) { 421926deccbSFrançois Tigeot DRM_ERROR("Failed to lock ring A %d\n", ringA->idx); 422926deccbSFrançois Tigeot goto out_cleanup; 423926deccbSFrançois Tigeot } 424926deccbSFrançois Tigeot radeon_semaphore_emit_wait(rdev, ringA->idx, semaphore); 425c6f73aabSFrançois Tigeot radeon_ring_unlock_commit(rdev, ringA, false); 426926deccbSFrançois Tigeot 427f43cf1b1SMichael Neumann r = radeon_test_create_and_emit_fence(rdev, ringA, &fenceA); 428f43cf1b1SMichael Neumann if (r) 429f43cf1b1SMichael Neumann goto out_cleanup; 430f43cf1b1SMichael Neumann 431926deccbSFrançois Tigeot r = radeon_ring_lock(rdev, ringB, 64); 432926deccbSFrançois Tigeot if (r) { 433926deccbSFrançois Tigeot DRM_ERROR("Failed to lock ring B %d\n", ringB->idx); 434926deccbSFrançois Tigeot goto out_cleanup; 435926deccbSFrançois Tigeot } 436926deccbSFrançois Tigeot radeon_semaphore_emit_wait(rdev, ringB->idx, semaphore); 437c6f73aabSFrançois Tigeot radeon_ring_unlock_commit(rdev, ringB, false); 438f43cf1b1SMichael Neumann r = radeon_test_create_and_emit_fence(rdev, ringB, &fenceB); 439f43cf1b1SMichael Neumann if (r) 440f43cf1b1SMichael Neumann goto out_cleanup; 441926deccbSFrançois Tigeot 442c4ef309bSzrj mdelay(1000); 443926deccbSFrançois Tigeot 444926deccbSFrançois Tigeot if (radeon_fence_signaled(fenceA)) { 445926deccbSFrançois Tigeot DRM_ERROR("Fence A signaled without waiting for semaphore.\n"); 446926deccbSFrançois Tigeot goto out_cleanup; 447926deccbSFrançois Tigeot } 448926deccbSFrançois Tigeot if (radeon_fence_signaled(fenceB)) { 449f43cf1b1SMichael Neumann DRM_ERROR("Fence B signaled without waiting for semaphore.\n"); 450926deccbSFrançois Tigeot goto out_cleanup; 451926deccbSFrançois Tigeot } 452926deccbSFrançois Tigeot 453926deccbSFrançois Tigeot r = radeon_ring_lock(rdev, ringC, 64); 454926deccbSFrançois Tigeot if (r) { 455926deccbSFrançois Tigeot DRM_ERROR("Failed to lock ring B %p\n", ringC); 456926deccbSFrançois Tigeot goto out_cleanup; 457926deccbSFrançois Tigeot } 458926deccbSFrançois Tigeot radeon_semaphore_emit_signal(rdev, ringC->idx, semaphore); 459c6f73aabSFrançois Tigeot radeon_ring_unlock_commit(rdev, ringC, false); 460926deccbSFrançois Tigeot 461926deccbSFrançois Tigeot for (i = 0; i < 30; ++i) { 462c4ef309bSzrj mdelay(100); 463926deccbSFrançois Tigeot sigA = radeon_fence_signaled(fenceA); 464926deccbSFrançois Tigeot sigB = radeon_fence_signaled(fenceB); 465926deccbSFrançois Tigeot if (sigA || sigB) 466926deccbSFrançois Tigeot break; 467926deccbSFrançois Tigeot } 468926deccbSFrançois Tigeot 469926deccbSFrançois Tigeot if (!sigA && !sigB) { 470926deccbSFrançois Tigeot DRM_ERROR("Neither fence A nor B has been signaled\n"); 471926deccbSFrançois Tigeot goto out_cleanup; 472926deccbSFrançois Tigeot } else if (sigA && sigB) { 473926deccbSFrançois Tigeot DRM_ERROR("Both fence A and B has been signaled\n"); 474926deccbSFrançois Tigeot goto out_cleanup; 475926deccbSFrançois Tigeot } 476926deccbSFrançois Tigeot 477926deccbSFrançois Tigeot DRM_INFO("Fence %c was first signaled\n", sigA ? 'A' : 'B'); 478926deccbSFrançois Tigeot 479926deccbSFrançois Tigeot r = radeon_ring_lock(rdev, ringC, 64); 480926deccbSFrançois Tigeot if (r) { 481926deccbSFrançois Tigeot DRM_ERROR("Failed to lock ring B %p\n", ringC); 482926deccbSFrançois Tigeot goto out_cleanup; 483926deccbSFrançois Tigeot } 484926deccbSFrançois Tigeot radeon_semaphore_emit_signal(rdev, ringC->idx, semaphore); 485c6f73aabSFrançois Tigeot radeon_ring_unlock_commit(rdev, ringC, false); 486926deccbSFrançois Tigeot 487c4ef309bSzrj mdelay(1000); 488926deccbSFrançois Tigeot 489926deccbSFrançois Tigeot r = radeon_fence_wait(fenceA, false); 490926deccbSFrançois Tigeot if (r) { 491926deccbSFrançois Tigeot DRM_ERROR("Failed to wait for sync fence A\n"); 492926deccbSFrançois Tigeot goto out_cleanup; 493926deccbSFrançois Tigeot } 494926deccbSFrançois Tigeot r = radeon_fence_wait(fenceB, false); 495926deccbSFrançois Tigeot if (r) { 496926deccbSFrançois Tigeot DRM_ERROR("Failed to wait for sync fence B\n"); 497926deccbSFrançois Tigeot goto out_cleanup; 498926deccbSFrançois Tigeot } 499926deccbSFrançois Tigeot 500926deccbSFrançois Tigeot out_cleanup: 501926deccbSFrançois Tigeot radeon_semaphore_free(rdev, &semaphore, NULL); 502926deccbSFrançois Tigeot 503926deccbSFrançois Tigeot if (fenceA) 504926deccbSFrançois Tigeot radeon_fence_unref(&fenceA); 505926deccbSFrançois Tigeot 506926deccbSFrançois Tigeot if (fenceB) 507926deccbSFrançois Tigeot radeon_fence_unref(&fenceB); 508926deccbSFrançois Tigeot 509926deccbSFrançois Tigeot if (r) 510c4ef309bSzrj printk(KERN_WARNING "Error while testing ring sync (%d).\n", r); 511926deccbSFrançois Tigeot } 512926deccbSFrançois Tigeot 513c6f73aabSFrançois Tigeot static bool radeon_test_sync_possible(struct radeon_ring *ringA, 514c6f73aabSFrançois Tigeot struct radeon_ring *ringB) 515c6f73aabSFrançois Tigeot { 516c6f73aabSFrançois Tigeot if (ringA->idx == TN_RING_TYPE_VCE2_INDEX && 517c6f73aabSFrançois Tigeot ringB->idx == TN_RING_TYPE_VCE1_INDEX) 518c6f73aabSFrançois Tigeot return false; 519c6f73aabSFrançois Tigeot 520c6f73aabSFrançois Tigeot return true; 521c6f73aabSFrançois Tigeot } 522c6f73aabSFrançois Tigeot 523926deccbSFrançois Tigeot void radeon_test_syncing(struct radeon_device *rdev) 524926deccbSFrançois Tigeot { 525926deccbSFrançois Tigeot int i, j, k; 526926deccbSFrançois Tigeot 527926deccbSFrançois Tigeot for (i = 1; i < RADEON_NUM_RINGS; ++i) { 528926deccbSFrançois Tigeot struct radeon_ring *ringA = &rdev->ring[i]; 529926deccbSFrançois Tigeot if (!ringA->ready) 530926deccbSFrançois Tigeot continue; 531926deccbSFrançois Tigeot 532926deccbSFrançois Tigeot for (j = 0; j < i; ++j) { 533926deccbSFrançois Tigeot struct radeon_ring *ringB = &rdev->ring[j]; 534926deccbSFrançois Tigeot if (!ringB->ready) 535926deccbSFrançois Tigeot continue; 536926deccbSFrançois Tigeot 537c6f73aabSFrançois Tigeot if (!radeon_test_sync_possible(ringA, ringB)) 538c6f73aabSFrançois Tigeot continue; 539c6f73aabSFrançois Tigeot 540926deccbSFrançois Tigeot DRM_INFO("Testing syncing between rings %d and %d...\n", i, j); 541926deccbSFrançois Tigeot radeon_test_ring_sync(rdev, ringA, ringB); 542926deccbSFrançois Tigeot 543926deccbSFrançois Tigeot DRM_INFO("Testing syncing between rings %d and %d...\n", j, i); 544926deccbSFrançois Tigeot radeon_test_ring_sync(rdev, ringB, ringA); 545926deccbSFrançois Tigeot 546926deccbSFrançois Tigeot for (k = 0; k < j; ++k) { 547926deccbSFrançois Tigeot struct radeon_ring *ringC = &rdev->ring[k]; 548926deccbSFrançois Tigeot if (!ringC->ready) 549926deccbSFrançois Tigeot continue; 550926deccbSFrançois Tigeot 551c6f73aabSFrançois Tigeot if (!radeon_test_sync_possible(ringA, ringC)) 552c6f73aabSFrançois Tigeot continue; 553c6f73aabSFrançois Tigeot 554c6f73aabSFrançois Tigeot if (!radeon_test_sync_possible(ringB, ringC)) 555c6f73aabSFrançois Tigeot continue; 556c6f73aabSFrançois Tigeot 557926deccbSFrançois Tigeot DRM_INFO("Testing syncing between rings %d, %d and %d...\n", i, j, k); 558926deccbSFrançois Tigeot radeon_test_ring_sync2(rdev, ringA, ringB, ringC); 559926deccbSFrançois Tigeot 560926deccbSFrançois Tigeot DRM_INFO("Testing syncing between rings %d, %d and %d...\n", i, k, j); 561926deccbSFrançois Tigeot radeon_test_ring_sync2(rdev, ringA, ringC, ringB); 562926deccbSFrançois Tigeot 563926deccbSFrançois Tigeot DRM_INFO("Testing syncing between rings %d, %d and %d...\n", j, i, k); 564926deccbSFrançois Tigeot radeon_test_ring_sync2(rdev, ringB, ringA, ringC); 565926deccbSFrançois Tigeot 566926deccbSFrançois Tigeot DRM_INFO("Testing syncing between rings %d, %d and %d...\n", j, k, i); 567926deccbSFrançois Tigeot radeon_test_ring_sync2(rdev, ringB, ringC, ringA); 568926deccbSFrançois Tigeot 569926deccbSFrançois Tigeot DRM_INFO("Testing syncing between rings %d, %d and %d...\n", k, i, j); 570926deccbSFrançois Tigeot radeon_test_ring_sync2(rdev, ringC, ringA, ringB); 571926deccbSFrançois Tigeot 572926deccbSFrançois Tigeot DRM_INFO("Testing syncing between rings %d, %d and %d...\n", k, j, i); 573926deccbSFrançois Tigeot radeon_test_ring_sync2(rdev, ringC, ringB, ringA); 574926deccbSFrançois Tigeot } 575926deccbSFrançois Tigeot } 576926deccbSFrançois Tigeot } 577926deccbSFrançois Tigeot } 578