xref: /dflybsd-src/sys/dev/drm/radeon/radeon_test.c (revision a85cb24f18e3804e75ab8bcda7692564d0563317)
1926deccbSFrançois Tigeot /*
2926deccbSFrançois Tigeot  * Copyright 2009 VMware, Inc.
3926deccbSFrançois Tigeot  *
4926deccbSFrançois Tigeot  * Permission is hereby granted, free of charge, to any person obtaining a
5926deccbSFrançois Tigeot  * copy of this software and associated documentation files (the "Software"),
6926deccbSFrançois Tigeot  * to deal in the Software without restriction, including without limitation
7926deccbSFrançois Tigeot  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8926deccbSFrançois Tigeot  * and/or sell copies of the Software, and to permit persons to whom the
9926deccbSFrançois Tigeot  * Software is furnished to do so, subject to the following conditions:
10926deccbSFrançois Tigeot  *
11926deccbSFrançois Tigeot  * The above copyright notice and this permission notice shall be included in
12926deccbSFrançois Tigeot  * all copies or substantial portions of the Software.
13926deccbSFrançois Tigeot  *
14926deccbSFrançois Tigeot  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15926deccbSFrançois Tigeot  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16926deccbSFrançois Tigeot  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17926deccbSFrançois Tigeot  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18926deccbSFrançois Tigeot  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19926deccbSFrançois Tigeot  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20926deccbSFrançois Tigeot  * OTHER DEALINGS IN THE SOFTWARE.
21926deccbSFrançois Tigeot  *
22926deccbSFrançois Tigeot  * Authors: Michel Dänzer
23926deccbSFrançois Tigeot  */
24926deccbSFrançois Tigeot #include <drm/drmP.h>
2583b4b9b9SFrançois Tigeot #include <drm/radeon_drm.h>
26926deccbSFrançois Tigeot #include "radeon_reg.h"
27926deccbSFrançois Tigeot #include "radeon.h"
28926deccbSFrançois Tigeot 
29926deccbSFrançois Tigeot #define RADEON_TEST_COPY_BLIT 1
30926deccbSFrançois Tigeot #define RADEON_TEST_COPY_DMA  0
31926deccbSFrançois Tigeot 
32926deccbSFrançois Tigeot 
33926deccbSFrançois Tigeot /* Test BO GTT->VRAM and VRAM->GTT GPU copies across the whole GTT aperture */
radeon_do_test_moves(struct radeon_device * rdev,int flag)34926deccbSFrançois Tigeot static void radeon_do_test_moves(struct radeon_device *rdev, int flag)
35926deccbSFrançois Tigeot {
36926deccbSFrançois Tigeot 	struct radeon_bo *vram_obj = NULL;
37926deccbSFrançois Tigeot 	struct radeon_bo **gtt_obj = NULL;
38926deccbSFrançois Tigeot 	struct radeon_fence *fence = NULL;
39f77dbd6cSFrançois Tigeot 	u64 gtt_addr, vram_addr;
404cd92098Szrj 	unsigned n, size;
414cd92098Szrj 	int i, r, ring;
42926deccbSFrançois Tigeot 
43926deccbSFrançois Tigeot 	switch (flag) {
44926deccbSFrançois Tigeot 	case RADEON_TEST_COPY_DMA:
45926deccbSFrançois Tigeot 		ring = radeon_copy_dma_ring_index(rdev);
46926deccbSFrançois Tigeot 		break;
47926deccbSFrançois Tigeot 	case RADEON_TEST_COPY_BLIT:
48926deccbSFrançois Tigeot 		ring = radeon_copy_blit_ring_index(rdev);
49926deccbSFrançois Tigeot 		break;
50926deccbSFrançois Tigeot 	default:
51926deccbSFrançois Tigeot 		DRM_ERROR("Unknown copy method\n");
52926deccbSFrançois Tigeot 		return;
53926deccbSFrançois Tigeot 	}
54926deccbSFrançois Tigeot 
55926deccbSFrançois Tigeot 	size = 1024 * 1024;
56926deccbSFrançois Tigeot 
57926deccbSFrançois Tigeot 	/* Number of tests =
58926deccbSFrançois Tigeot 	 * (Total GTT - IB pool - writeback page - ring buffers) / test size
59926deccbSFrançois Tigeot 	 */
60c6f73aabSFrançois Tigeot 	n = rdev->mc.gtt_size - rdev->gart_pin_size;
61926deccbSFrançois Tigeot 	n /= size;
62926deccbSFrançois Tigeot 
63c4ef309bSzrj 	gtt_obj = kzalloc(n * sizeof(*gtt_obj), GFP_KERNEL);
64926deccbSFrançois Tigeot 	if (!gtt_obj) {
65926deccbSFrançois Tigeot 		DRM_ERROR("Failed to allocate %d pointers\n", n);
66926deccbSFrançois Tigeot 		r = 1;
67926deccbSFrançois Tigeot 		goto out_cleanup;
68926deccbSFrançois Tigeot 	}
69926deccbSFrançois Tigeot 
70926deccbSFrançois Tigeot 	r = radeon_bo_create(rdev, size, PAGE_SIZE, true, RADEON_GEM_DOMAIN_VRAM,
717dcf36dcSFrançois Tigeot 			     0, NULL, NULL, &vram_obj);
72926deccbSFrançois Tigeot 	if (r) {
73926deccbSFrançois Tigeot 		DRM_ERROR("Failed to create VRAM object\n");
74926deccbSFrançois Tigeot 		goto out_cleanup;
75926deccbSFrançois Tigeot 	}
76926deccbSFrançois Tigeot 	r = radeon_bo_reserve(vram_obj, false);
77926deccbSFrançois Tigeot 	if (unlikely(r != 0))
78a34b4168SMatthew Dillon 		goto out_unref;
79926deccbSFrançois Tigeot 	r = radeon_bo_pin(vram_obj, RADEON_GEM_DOMAIN_VRAM, &vram_addr);
80926deccbSFrançois Tigeot 	if (r) {
81926deccbSFrançois Tigeot 		DRM_ERROR("Failed to pin VRAM object\n");
82a34b4168SMatthew Dillon 		goto out_unres;
83926deccbSFrançois Tigeot 	}
84926deccbSFrançois Tigeot 	for (i = 0; i < n; i++) {
85926deccbSFrançois Tigeot 		void *gtt_map, *vram_map;
86926deccbSFrançois Tigeot 		void **gtt_start, **gtt_end;
87926deccbSFrançois Tigeot 		void **vram_start, **vram_end;
88926deccbSFrançois Tigeot 
89926deccbSFrançois Tigeot 		r = radeon_bo_create(rdev, size, PAGE_SIZE, true,
907dcf36dcSFrançois Tigeot 				     RADEON_GEM_DOMAIN_GTT, 0, NULL, NULL,
917dcf36dcSFrançois Tigeot 				     gtt_obj + i);
92926deccbSFrançois Tigeot 		if (r) {
93926deccbSFrançois Tigeot 			DRM_ERROR("Failed to create GTT object %d\n", i);
94a34b4168SMatthew Dillon 			goto out_lclean;
95926deccbSFrançois Tigeot 		}
96926deccbSFrançois Tigeot 
97926deccbSFrançois Tigeot 		r = radeon_bo_reserve(gtt_obj[i], false);
98926deccbSFrançois Tigeot 		if (unlikely(r != 0))
99a34b4168SMatthew Dillon 			goto out_lclean_unref;
100926deccbSFrançois Tigeot 		r = radeon_bo_pin(gtt_obj[i], RADEON_GEM_DOMAIN_GTT, &gtt_addr);
101926deccbSFrançois Tigeot 		if (r) {
102926deccbSFrançois Tigeot 			DRM_ERROR("Failed to pin GTT object %d\n", i);
103a34b4168SMatthew Dillon 			goto out_lclean_unres;
104926deccbSFrançois Tigeot 		}
105926deccbSFrançois Tigeot 
106926deccbSFrançois Tigeot 		r = radeon_bo_kmap(gtt_obj[i], &gtt_map);
107926deccbSFrançois Tigeot 		if (r) {
108926deccbSFrançois Tigeot 			DRM_ERROR("Failed to map GTT object %d\n", i);
109a34b4168SMatthew Dillon 			goto out_lclean_unpin;
110926deccbSFrançois Tigeot 		}
111926deccbSFrançois Tigeot 
112926deccbSFrançois Tigeot 		for (gtt_start = gtt_map, gtt_end = (void *)((uintptr_t)gtt_map + size);
113926deccbSFrançois Tigeot 		     gtt_start < gtt_end;
114926deccbSFrançois Tigeot 		     gtt_start++)
115926deccbSFrançois Tigeot 			*gtt_start = gtt_start;
116926deccbSFrançois Tigeot 
117926deccbSFrançois Tigeot 		radeon_bo_kunmap(gtt_obj[i]);
118926deccbSFrançois Tigeot 
119926deccbSFrançois Tigeot 		if (ring == R600_RING_TYPE_DMA_INDEX)
1201cfef1a5SFrançois Tigeot 			fence = radeon_copy_dma(rdev, gtt_addr, vram_addr,
1211cfef1a5SFrançois Tigeot 						size / RADEON_GPU_PAGE_SIZE,
1227dcf36dcSFrançois Tigeot 						vram_obj->tbo.resv);
123926deccbSFrançois Tigeot 		else
1241cfef1a5SFrançois Tigeot 			fence = radeon_copy_blit(rdev, gtt_addr, vram_addr,
1251cfef1a5SFrançois Tigeot 						 size / RADEON_GPU_PAGE_SIZE,
1267dcf36dcSFrançois Tigeot 						 vram_obj->tbo.resv);
1271cfef1a5SFrançois Tigeot 		if (IS_ERR(fence)) {
128926deccbSFrançois Tigeot 			DRM_ERROR("Failed GTT->VRAM copy %d\n", i);
1291cfef1a5SFrançois Tigeot 			r = PTR_ERR(fence);
130a34b4168SMatthew Dillon 			goto out_lclean_unpin;
131926deccbSFrançois Tigeot 		}
132926deccbSFrançois Tigeot 
133926deccbSFrançois Tigeot 		r = radeon_fence_wait(fence, false);
134926deccbSFrançois Tigeot 		if (r) {
135926deccbSFrançois Tigeot 			DRM_ERROR("Failed to wait for GTT->VRAM fence %d\n", i);
136a34b4168SMatthew Dillon 			goto out_lclean_unpin;
137926deccbSFrançois Tigeot 		}
138926deccbSFrançois Tigeot 
139926deccbSFrançois Tigeot 		radeon_fence_unref(&fence);
140926deccbSFrançois Tigeot 
141926deccbSFrançois Tigeot 		r = radeon_bo_kmap(vram_obj, &vram_map);
142926deccbSFrançois Tigeot 		if (r) {
143926deccbSFrançois Tigeot 			DRM_ERROR("Failed to map VRAM object after copy %d\n", i);
144a34b4168SMatthew Dillon 			goto out_lclean_unpin;
145926deccbSFrançois Tigeot 		}
146926deccbSFrançois Tigeot 
147926deccbSFrançois Tigeot 		for (gtt_start = gtt_map, gtt_end = (void *)((uintptr_t)gtt_map + size),
148926deccbSFrançois Tigeot 		     vram_start = vram_map, vram_end = (void *)((uintptr_t)vram_map + size);
149926deccbSFrançois Tigeot 		     vram_start < vram_end;
150926deccbSFrançois Tigeot 		     gtt_start++, vram_start++) {
151926deccbSFrançois Tigeot 			if (*vram_start != gtt_start) {
152926deccbSFrançois Tigeot 				DRM_ERROR("Incorrect GTT->VRAM copy %d: Got 0x%p, "
153926deccbSFrançois Tigeot 					  "expected 0x%p (GTT/VRAM offset "
154926deccbSFrançois Tigeot 					  "0x%16llx/0x%16llx)\n",
155926deccbSFrançois Tigeot 					  i, *vram_start, gtt_start,
156926deccbSFrançois Tigeot 					  (unsigned long long)
157926deccbSFrançois Tigeot 					  ((uintptr_t)gtt_addr - (uintptr_t)rdev->mc.gtt_start +
158926deccbSFrançois Tigeot 					   (uintptr_t)gtt_start - (uintptr_t)gtt_map),
159926deccbSFrançois Tigeot 					  (unsigned long long)
160926deccbSFrançois Tigeot 					  ((uintptr_t)vram_addr - (uintptr_t)rdev->mc.vram_start +
161926deccbSFrançois Tigeot 					   (uintptr_t)gtt_start - (uintptr_t)gtt_map));
162926deccbSFrançois Tigeot 				radeon_bo_kunmap(vram_obj);
163a34b4168SMatthew Dillon 				goto out_lclean_unpin;
164926deccbSFrançois Tigeot 			}
165926deccbSFrançois Tigeot 			*vram_start = vram_start;
166926deccbSFrançois Tigeot 		}
167926deccbSFrançois Tigeot 
168926deccbSFrançois Tigeot 		radeon_bo_kunmap(vram_obj);
169926deccbSFrançois Tigeot 
170926deccbSFrançois Tigeot 		if (ring == R600_RING_TYPE_DMA_INDEX)
1711cfef1a5SFrançois Tigeot 			fence = radeon_copy_dma(rdev, vram_addr, gtt_addr,
1721cfef1a5SFrançois Tigeot 						size / RADEON_GPU_PAGE_SIZE,
1737dcf36dcSFrançois Tigeot 						vram_obj->tbo.resv);
174926deccbSFrançois Tigeot 		else
1751cfef1a5SFrançois Tigeot 			fence = radeon_copy_blit(rdev, vram_addr, gtt_addr,
1761cfef1a5SFrançois Tigeot 						 size / RADEON_GPU_PAGE_SIZE,
1777dcf36dcSFrançois Tigeot 						 vram_obj->tbo.resv);
1781cfef1a5SFrançois Tigeot 		if (IS_ERR(fence)) {
179926deccbSFrançois Tigeot 			DRM_ERROR("Failed VRAM->GTT copy %d\n", i);
1801cfef1a5SFrançois Tigeot 			r = PTR_ERR(fence);
181a34b4168SMatthew Dillon 			goto out_lclean_unpin;
182926deccbSFrançois Tigeot 		}
183926deccbSFrançois Tigeot 
184926deccbSFrançois Tigeot 		r = radeon_fence_wait(fence, false);
185926deccbSFrançois Tigeot 		if (r) {
186926deccbSFrançois Tigeot 			DRM_ERROR("Failed to wait for VRAM->GTT fence %d\n", i);
187a34b4168SMatthew Dillon 			goto out_lclean_unpin;
188926deccbSFrançois Tigeot 		}
189926deccbSFrançois Tigeot 
190926deccbSFrançois Tigeot 		radeon_fence_unref(&fence);
191926deccbSFrançois Tigeot 
192926deccbSFrançois Tigeot 		r = radeon_bo_kmap(gtt_obj[i], &gtt_map);
193926deccbSFrançois Tigeot 		if (r) {
194926deccbSFrançois Tigeot 			DRM_ERROR("Failed to map GTT object after copy %d\n", i);
195a34b4168SMatthew Dillon 			goto out_lclean_unpin;
196926deccbSFrançois Tigeot 		}
197926deccbSFrançois Tigeot 
198926deccbSFrançois Tigeot 		for (gtt_start = gtt_map, gtt_end = (void *)((uintptr_t)gtt_map + size),
199926deccbSFrançois Tigeot 		     vram_start = vram_map, vram_end = (void *)((uintptr_t)vram_map + size);
200926deccbSFrançois Tigeot 		     gtt_start < gtt_end;
201926deccbSFrançois Tigeot 		     gtt_start++, vram_start++) {
202926deccbSFrançois Tigeot 			if (*gtt_start != vram_start) {
203926deccbSFrançois Tigeot 				DRM_ERROR("Incorrect VRAM->GTT copy %d: Got 0x%p, "
204926deccbSFrançois Tigeot 					  "expected 0x%p (VRAM/GTT offset "
205926deccbSFrançois Tigeot 					  "0x%16llx/0x%16llx)\n",
206926deccbSFrançois Tigeot 					  i, *gtt_start, vram_start,
207926deccbSFrançois Tigeot 					  (unsigned long long)
208926deccbSFrançois Tigeot 					  ((uintptr_t)vram_addr - (uintptr_t)rdev->mc.vram_start +
209926deccbSFrançois Tigeot 					   (uintptr_t)vram_start - (uintptr_t)vram_map),
210926deccbSFrançois Tigeot 					  (unsigned long long)
211926deccbSFrançois Tigeot 					  ((uintptr_t)gtt_addr - (uintptr_t)rdev->mc.gtt_start +
212926deccbSFrançois Tigeot 					   (uintptr_t)vram_start - (uintptr_t)vram_map));
213926deccbSFrançois Tigeot 				radeon_bo_kunmap(gtt_obj[i]);
214a34b4168SMatthew Dillon 				goto out_lclean_unpin;
215926deccbSFrançois Tigeot 			}
216926deccbSFrançois Tigeot 		}
217926deccbSFrançois Tigeot 
218926deccbSFrançois Tigeot 		radeon_bo_kunmap(gtt_obj[i]);
219926deccbSFrançois Tigeot 
220f77dbd6cSFrançois Tigeot 		DRM_INFO("Tested GTT->VRAM and VRAM->GTT copy for GTT offset 0x%llx\n",
221926deccbSFrançois Tigeot 			 (uintmax_t)gtt_addr - rdev->mc.gtt_start);
222a34b4168SMatthew Dillon 		continue;
223926deccbSFrançois Tigeot 
224a34b4168SMatthew Dillon out_lclean_unpin:
225a34b4168SMatthew Dillon 		radeon_bo_unpin(gtt_obj[i]);
226a34b4168SMatthew Dillon out_lclean_unres:
227a34b4168SMatthew Dillon 		radeon_bo_unreserve(gtt_obj[i]);
228a34b4168SMatthew Dillon out_lclean_unref:
229a34b4168SMatthew Dillon 		radeon_bo_unref(&gtt_obj[i]);
230a34b4168SMatthew Dillon out_lclean:
231a34b4168SMatthew Dillon 		for (--i; i >= 0; --i) {
232926deccbSFrançois Tigeot 			radeon_bo_unpin(gtt_obj[i]);
233926deccbSFrançois Tigeot 			radeon_bo_unreserve(gtt_obj[i]);
234926deccbSFrançois Tigeot 			radeon_bo_unref(&gtt_obj[i]);
235926deccbSFrançois Tigeot 		}
236a34b4168SMatthew Dillon 		if (fence && !IS_ERR(fence))
237a34b4168SMatthew Dillon 			radeon_fence_unref(&fence);
238a34b4168SMatthew Dillon 		break;
239926deccbSFrançois Tigeot 	}
240a34b4168SMatthew Dillon 
241a34b4168SMatthew Dillon 	radeon_bo_unpin(vram_obj);
242a34b4168SMatthew Dillon out_unres:
243a34b4168SMatthew Dillon 	radeon_bo_unreserve(vram_obj);
244a34b4168SMatthew Dillon out_unref:
245a34b4168SMatthew Dillon 	radeon_bo_unref(&vram_obj);
246a34b4168SMatthew Dillon out_cleanup:
247c4ef309bSzrj 	kfree(gtt_obj);
248926deccbSFrançois Tigeot 	if (r) {
249*a85cb24fSFrançois Tigeot 		pr_warn("Error while testing BO move\n");
250926deccbSFrançois Tigeot 	}
251926deccbSFrançois Tigeot }
252926deccbSFrançois Tigeot 
radeon_test_moves(struct radeon_device * rdev)253926deccbSFrançois Tigeot void radeon_test_moves(struct radeon_device *rdev)
254926deccbSFrançois Tigeot {
255926deccbSFrançois Tigeot 	if (rdev->asic->copy.dma)
256926deccbSFrançois Tigeot 		radeon_do_test_moves(rdev, RADEON_TEST_COPY_DMA);
257926deccbSFrançois Tigeot 	if (rdev->asic->copy.blit)
258926deccbSFrançois Tigeot 		radeon_do_test_moves(rdev, RADEON_TEST_COPY_BLIT);
259926deccbSFrançois Tigeot }
260926deccbSFrançois Tigeot 
radeon_test_create_and_emit_fence(struct radeon_device * rdev,struct radeon_ring * ring,struct radeon_fence ** fence)261f43cf1b1SMichael Neumann static int radeon_test_create_and_emit_fence(struct radeon_device *rdev,
262f43cf1b1SMichael Neumann 					     struct radeon_ring *ring,
263f43cf1b1SMichael Neumann 					     struct radeon_fence **fence)
264f43cf1b1SMichael Neumann {
265c6f73aabSFrançois Tigeot 	uint32_t handle = ring->idx ^ 0xdeafbeef;
266f43cf1b1SMichael Neumann 	int r;
267f43cf1b1SMichael Neumann 
268f43cf1b1SMichael Neumann 	if (ring->idx == R600_RING_TYPE_UVD_INDEX) {
269c6f73aabSFrançois Tigeot 		r = radeon_uvd_get_create_msg(rdev, ring->idx, handle, NULL);
270f43cf1b1SMichael Neumann 		if (r) {
271f43cf1b1SMichael Neumann 			DRM_ERROR("Failed to get dummy create msg\n");
272f43cf1b1SMichael Neumann 			return r;
273f43cf1b1SMichael Neumann 		}
274f43cf1b1SMichael Neumann 
275c6f73aabSFrançois Tigeot 		r = radeon_uvd_get_destroy_msg(rdev, ring->idx, handle, fence);
276f43cf1b1SMichael Neumann 		if (r) {
277f43cf1b1SMichael Neumann 			DRM_ERROR("Failed to get dummy destroy msg\n");
278f43cf1b1SMichael Neumann 			return r;
279f43cf1b1SMichael Neumann 		}
280c6f73aabSFrançois Tigeot 
281c6f73aabSFrançois Tigeot 	} else if (ring->idx == TN_RING_TYPE_VCE1_INDEX ||
282c6f73aabSFrançois Tigeot 		   ring->idx == TN_RING_TYPE_VCE2_INDEX) {
283c6f73aabSFrançois Tigeot 		r = radeon_vce_get_create_msg(rdev, ring->idx, handle, NULL);
284c6f73aabSFrançois Tigeot 		if (r) {
285c6f73aabSFrançois Tigeot 			DRM_ERROR("Failed to get dummy create msg\n");
286c6f73aabSFrançois Tigeot 			return r;
287c6f73aabSFrançois Tigeot 		}
288c6f73aabSFrançois Tigeot 
289c6f73aabSFrançois Tigeot 		r = radeon_vce_get_destroy_msg(rdev, ring->idx, handle, fence);
290c6f73aabSFrançois Tigeot 		if (r) {
291c6f73aabSFrançois Tigeot 			DRM_ERROR("Failed to get dummy destroy msg\n");
292c6f73aabSFrançois Tigeot 			return r;
293c6f73aabSFrançois Tigeot 		}
294c6f73aabSFrançois Tigeot 
295f43cf1b1SMichael Neumann 	} else {
296f43cf1b1SMichael Neumann 		r = radeon_ring_lock(rdev, ring, 64);
297f43cf1b1SMichael Neumann 		if (r) {
298f43cf1b1SMichael Neumann 			DRM_ERROR("Failed to lock ring A %d\n", ring->idx);
299f43cf1b1SMichael Neumann 			return r;
300f43cf1b1SMichael Neumann 		}
301*a85cb24fSFrançois Tigeot 		r = radeon_fence_emit(rdev, fence, ring->idx);
302*a85cb24fSFrançois Tigeot 		if (r) {
303*a85cb24fSFrançois Tigeot 			DRM_ERROR("Failed to emit fence\n");
304*a85cb24fSFrançois Tigeot 			radeon_ring_unlock_undo(rdev, ring);
305*a85cb24fSFrançois Tigeot 			return r;
306*a85cb24fSFrançois Tigeot 		}
307c6f73aabSFrançois Tigeot 		radeon_ring_unlock_commit(rdev, ring, false);
308f43cf1b1SMichael Neumann 	}
309f43cf1b1SMichael Neumann 	return 0;
310f43cf1b1SMichael Neumann }
311f43cf1b1SMichael Neumann 
radeon_test_ring_sync(struct radeon_device * rdev,struct radeon_ring * ringA,struct radeon_ring * ringB)312926deccbSFrançois Tigeot void radeon_test_ring_sync(struct radeon_device *rdev,
313926deccbSFrançois Tigeot 			   struct radeon_ring *ringA,
314926deccbSFrançois Tigeot 			   struct radeon_ring *ringB)
315926deccbSFrançois Tigeot {
316926deccbSFrançois Tigeot 	struct radeon_fence *fence1 = NULL, *fence2 = NULL;
317926deccbSFrançois Tigeot 	struct radeon_semaphore *semaphore = NULL;
318926deccbSFrançois Tigeot 	int r;
319926deccbSFrançois Tigeot 
320926deccbSFrançois Tigeot 	r = radeon_semaphore_create(rdev, &semaphore);
321926deccbSFrançois Tigeot 	if (r) {
322926deccbSFrançois Tigeot 		DRM_ERROR("Failed to create semaphore\n");
323926deccbSFrançois Tigeot 		goto out_cleanup;
324926deccbSFrançois Tigeot 	}
325926deccbSFrançois Tigeot 
326926deccbSFrançois Tigeot 	r = radeon_ring_lock(rdev, ringA, 64);
327926deccbSFrançois Tigeot 	if (r) {
328926deccbSFrançois Tigeot 		DRM_ERROR("Failed to lock ring A %d\n", ringA->idx);
329926deccbSFrançois Tigeot 		goto out_cleanup;
330926deccbSFrançois Tigeot 	}
331926deccbSFrançois Tigeot 	radeon_semaphore_emit_wait(rdev, ringA->idx, semaphore);
332c6f73aabSFrançois Tigeot 	radeon_ring_unlock_commit(rdev, ringA, false);
333f43cf1b1SMichael Neumann 
334f43cf1b1SMichael Neumann 	r = radeon_test_create_and_emit_fence(rdev, ringA, &fence1);
335f43cf1b1SMichael Neumann 	if (r)
336f43cf1b1SMichael Neumann 		goto out_cleanup;
337f43cf1b1SMichael Neumann 
338f43cf1b1SMichael Neumann 	r = radeon_ring_lock(rdev, ringA, 64);
339926deccbSFrançois Tigeot 	if (r) {
340f43cf1b1SMichael Neumann 		DRM_ERROR("Failed to lock ring A %d\n", ringA->idx);
341926deccbSFrançois Tigeot 		goto out_cleanup;
342926deccbSFrançois Tigeot 	}
343926deccbSFrançois Tigeot 	radeon_semaphore_emit_wait(rdev, ringA->idx, semaphore);
344c6f73aabSFrançois Tigeot 	radeon_ring_unlock_commit(rdev, ringA, false);
345926deccbSFrançois Tigeot 
346f43cf1b1SMichael Neumann 	r = radeon_test_create_and_emit_fence(rdev, ringA, &fence2);
347f43cf1b1SMichael Neumann 	if (r)
348f43cf1b1SMichael Neumann 		goto out_cleanup;
349f43cf1b1SMichael Neumann 
350c4ef309bSzrj 	mdelay(1000);
351926deccbSFrançois Tigeot 
352926deccbSFrançois Tigeot 	if (radeon_fence_signaled(fence1)) {
353926deccbSFrançois Tigeot 		DRM_ERROR("Fence 1 signaled without waiting for semaphore.\n");
354926deccbSFrançois Tigeot 		goto out_cleanup;
355926deccbSFrançois Tigeot 	}
356926deccbSFrançois Tigeot 
357926deccbSFrançois Tigeot 	r = radeon_ring_lock(rdev, ringB, 64);
358926deccbSFrançois Tigeot 	if (r) {
359926deccbSFrançois Tigeot 		DRM_ERROR("Failed to lock ring B %p\n", ringB);
360926deccbSFrançois Tigeot 		goto out_cleanup;
361926deccbSFrançois Tigeot 	}
362926deccbSFrançois Tigeot 	radeon_semaphore_emit_signal(rdev, ringB->idx, semaphore);
363c6f73aabSFrançois Tigeot 	radeon_ring_unlock_commit(rdev, ringB, false);
364926deccbSFrançois Tigeot 
365926deccbSFrançois Tigeot 	r = radeon_fence_wait(fence1, false);
366926deccbSFrançois Tigeot 	if (r) {
367926deccbSFrançois Tigeot 		DRM_ERROR("Failed to wait for sync fence 1\n");
368926deccbSFrançois Tigeot 		goto out_cleanup;
369926deccbSFrançois Tigeot 	}
370926deccbSFrançois Tigeot 
371c4ef309bSzrj 	mdelay(1000);
372926deccbSFrançois Tigeot 
373926deccbSFrançois Tigeot 	if (radeon_fence_signaled(fence2)) {
374926deccbSFrançois Tigeot 		DRM_ERROR("Fence 2 signaled without waiting for semaphore.\n");
375926deccbSFrançois Tigeot 		goto out_cleanup;
376926deccbSFrançois Tigeot 	}
377926deccbSFrançois Tigeot 
378926deccbSFrançois Tigeot 	r = radeon_ring_lock(rdev, ringB, 64);
379926deccbSFrançois Tigeot 	if (r) {
380926deccbSFrançois Tigeot 		DRM_ERROR("Failed to lock ring B %p\n", ringB);
381926deccbSFrançois Tigeot 		goto out_cleanup;
382926deccbSFrançois Tigeot 	}
383926deccbSFrançois Tigeot 	radeon_semaphore_emit_signal(rdev, ringB->idx, semaphore);
384c6f73aabSFrançois Tigeot 	radeon_ring_unlock_commit(rdev, ringB, false);
385926deccbSFrançois Tigeot 
386926deccbSFrançois Tigeot 	r = radeon_fence_wait(fence2, false);
387926deccbSFrançois Tigeot 	if (r) {
388926deccbSFrançois Tigeot 		DRM_ERROR("Failed to wait for sync fence 1\n");
389926deccbSFrançois Tigeot 		goto out_cleanup;
390926deccbSFrançois Tigeot 	}
391926deccbSFrançois Tigeot 
392926deccbSFrançois Tigeot out_cleanup:
393926deccbSFrançois Tigeot 	radeon_semaphore_free(rdev, &semaphore, NULL);
394926deccbSFrançois Tigeot 
395926deccbSFrançois Tigeot 	if (fence1)
396926deccbSFrançois Tigeot 		radeon_fence_unref(&fence1);
397926deccbSFrançois Tigeot 
398926deccbSFrançois Tigeot 	if (fence2)
399926deccbSFrançois Tigeot 		radeon_fence_unref(&fence2);
400926deccbSFrançois Tigeot 
401926deccbSFrançois Tigeot 	if (r)
402*a85cb24fSFrançois Tigeot 		pr_warn("Error while testing ring sync (%d)\n", r);
403926deccbSFrançois Tigeot }
404926deccbSFrançois Tigeot 
radeon_test_ring_sync2(struct radeon_device * rdev,struct radeon_ring * ringA,struct radeon_ring * ringB,struct radeon_ring * ringC)405926deccbSFrançois Tigeot static void radeon_test_ring_sync2(struct radeon_device *rdev,
406926deccbSFrançois Tigeot 			    struct radeon_ring *ringA,
407926deccbSFrançois Tigeot 			    struct radeon_ring *ringB,
408926deccbSFrançois Tigeot 			    struct radeon_ring *ringC)
409926deccbSFrançois Tigeot {
410926deccbSFrançois Tigeot 	struct radeon_fence *fenceA = NULL, *fenceB = NULL;
411926deccbSFrançois Tigeot 	struct radeon_semaphore *semaphore = NULL;
412926deccbSFrançois Tigeot 	bool sigA, sigB;
413926deccbSFrançois Tigeot 	int i, r;
414926deccbSFrançois Tigeot 
415926deccbSFrançois Tigeot 	r = radeon_semaphore_create(rdev, &semaphore);
416926deccbSFrançois Tigeot 	if (r) {
417926deccbSFrançois Tigeot 		DRM_ERROR("Failed to create semaphore\n");
418926deccbSFrançois Tigeot 		goto out_cleanup;
419926deccbSFrançois Tigeot 	}
420926deccbSFrançois Tigeot 
421926deccbSFrançois Tigeot 	r = radeon_ring_lock(rdev, ringA, 64);
422926deccbSFrançois Tigeot 	if (r) {
423926deccbSFrançois Tigeot 		DRM_ERROR("Failed to lock ring A %d\n", ringA->idx);
424926deccbSFrançois Tigeot 		goto out_cleanup;
425926deccbSFrançois Tigeot 	}
426926deccbSFrançois Tigeot 	radeon_semaphore_emit_wait(rdev, ringA->idx, semaphore);
427c6f73aabSFrançois Tigeot 	radeon_ring_unlock_commit(rdev, ringA, false);
428926deccbSFrançois Tigeot 
429f43cf1b1SMichael Neumann 	r = radeon_test_create_and_emit_fence(rdev, ringA, &fenceA);
430f43cf1b1SMichael Neumann 	if (r)
431f43cf1b1SMichael Neumann 		goto out_cleanup;
432f43cf1b1SMichael Neumann 
433926deccbSFrançois Tigeot 	r = radeon_ring_lock(rdev, ringB, 64);
434926deccbSFrançois Tigeot 	if (r) {
435926deccbSFrançois Tigeot 		DRM_ERROR("Failed to lock ring B %d\n", ringB->idx);
436926deccbSFrançois Tigeot 		goto out_cleanup;
437926deccbSFrançois Tigeot 	}
438926deccbSFrançois Tigeot 	radeon_semaphore_emit_wait(rdev, ringB->idx, semaphore);
439c6f73aabSFrançois Tigeot 	radeon_ring_unlock_commit(rdev, ringB, false);
440f43cf1b1SMichael Neumann 	r = radeon_test_create_and_emit_fence(rdev, ringB, &fenceB);
441f43cf1b1SMichael Neumann 	if (r)
442f43cf1b1SMichael Neumann 		goto out_cleanup;
443926deccbSFrançois Tigeot 
444c4ef309bSzrj 	mdelay(1000);
445926deccbSFrançois Tigeot 
446926deccbSFrançois Tigeot 	if (radeon_fence_signaled(fenceA)) {
447926deccbSFrançois Tigeot 		DRM_ERROR("Fence A signaled without waiting for semaphore.\n");
448926deccbSFrançois Tigeot 		goto out_cleanup;
449926deccbSFrançois Tigeot 	}
450926deccbSFrançois Tigeot 	if (radeon_fence_signaled(fenceB)) {
451f43cf1b1SMichael Neumann 		DRM_ERROR("Fence B signaled without waiting for semaphore.\n");
452926deccbSFrançois Tigeot 		goto out_cleanup;
453926deccbSFrançois Tigeot 	}
454926deccbSFrançois Tigeot 
455926deccbSFrançois Tigeot 	r = radeon_ring_lock(rdev, ringC, 64);
456926deccbSFrançois Tigeot 	if (r) {
457926deccbSFrançois Tigeot 		DRM_ERROR("Failed to lock ring B %p\n", ringC);
458926deccbSFrançois Tigeot 		goto out_cleanup;
459926deccbSFrançois Tigeot 	}
460926deccbSFrançois Tigeot 	radeon_semaphore_emit_signal(rdev, ringC->idx, semaphore);
461c6f73aabSFrançois Tigeot 	radeon_ring_unlock_commit(rdev, ringC, false);
462926deccbSFrançois Tigeot 
463926deccbSFrançois Tigeot 	for (i = 0; i < 30; ++i) {
464c4ef309bSzrj 		mdelay(100);
465926deccbSFrançois Tigeot 		sigA = radeon_fence_signaled(fenceA);
466926deccbSFrançois Tigeot 		sigB = radeon_fence_signaled(fenceB);
467926deccbSFrançois Tigeot 		if (sigA || sigB)
468926deccbSFrançois Tigeot 			break;
469926deccbSFrançois Tigeot 	}
470926deccbSFrançois Tigeot 
471926deccbSFrançois Tigeot 	if (!sigA && !sigB) {
472926deccbSFrançois Tigeot 		DRM_ERROR("Neither fence A nor B has been signaled\n");
473926deccbSFrançois Tigeot 		goto out_cleanup;
474926deccbSFrançois Tigeot 	} else if (sigA && sigB) {
475926deccbSFrançois Tigeot 		DRM_ERROR("Both fence A and B has been signaled\n");
476926deccbSFrançois Tigeot 		goto out_cleanup;
477926deccbSFrançois Tigeot 	}
478926deccbSFrançois Tigeot 
479926deccbSFrançois Tigeot 	DRM_INFO("Fence %c was first signaled\n", sigA ? 'A' : 'B');
480926deccbSFrançois Tigeot 
481926deccbSFrançois Tigeot 	r = radeon_ring_lock(rdev, ringC, 64);
482926deccbSFrançois Tigeot 	if (r) {
483926deccbSFrançois Tigeot 		DRM_ERROR("Failed to lock ring B %p\n", ringC);
484926deccbSFrançois Tigeot 		goto out_cleanup;
485926deccbSFrançois Tigeot 	}
486926deccbSFrançois Tigeot 	radeon_semaphore_emit_signal(rdev, ringC->idx, semaphore);
487c6f73aabSFrançois Tigeot 	radeon_ring_unlock_commit(rdev, ringC, false);
488926deccbSFrançois Tigeot 
489c4ef309bSzrj 	mdelay(1000);
490926deccbSFrançois Tigeot 
491926deccbSFrançois Tigeot 	r = radeon_fence_wait(fenceA, false);
492926deccbSFrançois Tigeot 	if (r) {
493926deccbSFrançois Tigeot 		DRM_ERROR("Failed to wait for sync fence A\n");
494926deccbSFrançois Tigeot 		goto out_cleanup;
495926deccbSFrançois Tigeot 	}
496926deccbSFrançois Tigeot 	r = radeon_fence_wait(fenceB, false);
497926deccbSFrançois Tigeot 	if (r) {
498926deccbSFrançois Tigeot 		DRM_ERROR("Failed to wait for sync fence B\n");
499926deccbSFrançois Tigeot 		goto out_cleanup;
500926deccbSFrançois Tigeot 	}
501926deccbSFrançois Tigeot 
502926deccbSFrançois Tigeot out_cleanup:
503926deccbSFrançois Tigeot 	radeon_semaphore_free(rdev, &semaphore, NULL);
504926deccbSFrançois Tigeot 
505926deccbSFrançois Tigeot 	if (fenceA)
506926deccbSFrançois Tigeot 		radeon_fence_unref(&fenceA);
507926deccbSFrançois Tigeot 
508926deccbSFrançois Tigeot 	if (fenceB)
509926deccbSFrançois Tigeot 		radeon_fence_unref(&fenceB);
510926deccbSFrançois Tigeot 
511926deccbSFrançois Tigeot 	if (r)
512*a85cb24fSFrançois Tigeot 		pr_warn("Error while testing ring sync (%d)\n", r);
513926deccbSFrançois Tigeot }
514926deccbSFrançois Tigeot 
radeon_test_sync_possible(struct radeon_ring * ringA,struct radeon_ring * ringB)515c6f73aabSFrançois Tigeot static bool radeon_test_sync_possible(struct radeon_ring *ringA,
516c6f73aabSFrançois Tigeot 				      struct radeon_ring *ringB)
517c6f73aabSFrançois Tigeot {
518c6f73aabSFrançois Tigeot 	if (ringA->idx == TN_RING_TYPE_VCE2_INDEX &&
519c6f73aabSFrançois Tigeot 	    ringB->idx == TN_RING_TYPE_VCE1_INDEX)
520c6f73aabSFrançois Tigeot 		return false;
521c6f73aabSFrançois Tigeot 
522c6f73aabSFrançois Tigeot 	return true;
523c6f73aabSFrançois Tigeot }
524c6f73aabSFrançois Tigeot 
radeon_test_syncing(struct radeon_device * rdev)525926deccbSFrançois Tigeot void radeon_test_syncing(struct radeon_device *rdev)
526926deccbSFrançois Tigeot {
527926deccbSFrançois Tigeot 	int i, j, k;
528926deccbSFrançois Tigeot 
529926deccbSFrançois Tigeot 	for (i = 1; i < RADEON_NUM_RINGS; ++i) {
530926deccbSFrançois Tigeot 		struct radeon_ring *ringA = &rdev->ring[i];
531926deccbSFrançois Tigeot 		if (!ringA->ready)
532926deccbSFrançois Tigeot 			continue;
533926deccbSFrançois Tigeot 
534926deccbSFrançois Tigeot 		for (j = 0; j < i; ++j) {
535926deccbSFrançois Tigeot 			struct radeon_ring *ringB = &rdev->ring[j];
536926deccbSFrançois Tigeot 			if (!ringB->ready)
537926deccbSFrançois Tigeot 				continue;
538926deccbSFrançois Tigeot 
539c6f73aabSFrançois Tigeot 			if (!radeon_test_sync_possible(ringA, ringB))
540c6f73aabSFrançois Tigeot 				continue;
541c6f73aabSFrançois Tigeot 
542926deccbSFrançois Tigeot 			DRM_INFO("Testing syncing between rings %d and %d...\n", i, j);
543926deccbSFrançois Tigeot 			radeon_test_ring_sync(rdev, ringA, ringB);
544926deccbSFrançois Tigeot 
545926deccbSFrançois Tigeot 			DRM_INFO("Testing syncing between rings %d and %d...\n", j, i);
546926deccbSFrançois Tigeot 			radeon_test_ring_sync(rdev, ringB, ringA);
547926deccbSFrançois Tigeot 
548926deccbSFrançois Tigeot 			for (k = 0; k < j; ++k) {
549926deccbSFrançois Tigeot 				struct radeon_ring *ringC = &rdev->ring[k];
550926deccbSFrançois Tigeot 				if (!ringC->ready)
551926deccbSFrançois Tigeot 					continue;
552926deccbSFrançois Tigeot 
553c6f73aabSFrançois Tigeot 				if (!radeon_test_sync_possible(ringA, ringC))
554c6f73aabSFrançois Tigeot 					continue;
555c6f73aabSFrançois Tigeot 
556c6f73aabSFrançois Tigeot 				if (!radeon_test_sync_possible(ringB, ringC))
557c6f73aabSFrançois Tigeot 					continue;
558c6f73aabSFrançois Tigeot 
559926deccbSFrançois Tigeot 				DRM_INFO("Testing syncing between rings %d, %d and %d...\n", i, j, k);
560926deccbSFrançois Tigeot 				radeon_test_ring_sync2(rdev, ringA, ringB, ringC);
561926deccbSFrançois Tigeot 
562926deccbSFrançois Tigeot 				DRM_INFO("Testing syncing between rings %d, %d and %d...\n", i, k, j);
563926deccbSFrançois Tigeot 				radeon_test_ring_sync2(rdev, ringA, ringC, ringB);
564926deccbSFrançois Tigeot 
565926deccbSFrançois Tigeot 				DRM_INFO("Testing syncing between rings %d, %d and %d...\n", j, i, k);
566926deccbSFrançois Tigeot 				radeon_test_ring_sync2(rdev, ringB, ringA, ringC);
567926deccbSFrançois Tigeot 
568926deccbSFrançois Tigeot 				DRM_INFO("Testing syncing between rings %d, %d and %d...\n", j, k, i);
569926deccbSFrançois Tigeot 				radeon_test_ring_sync2(rdev, ringB, ringC, ringA);
570926deccbSFrançois Tigeot 
571926deccbSFrançois Tigeot 				DRM_INFO("Testing syncing between rings %d, %d and %d...\n", k, i, j);
572926deccbSFrançois Tigeot 				radeon_test_ring_sync2(rdev, ringC, ringA, ringB);
573926deccbSFrançois Tigeot 
574926deccbSFrançois Tigeot 				DRM_INFO("Testing syncing between rings %d, %d and %d...\n", k, j, i);
575926deccbSFrançois Tigeot 				radeon_test_ring_sync2(rdev, ringC, ringB, ringA);
576926deccbSFrançois Tigeot 			}
577926deccbSFrançois Tigeot 		}
578926deccbSFrançois Tigeot 	}
579926deccbSFrançois Tigeot }
580