1 /* 2 * Copyright 2008 Advanced Micro Devices, Inc. 3 * Copyright 2008 Red Hat Inc. 4 * Copyright 2009 Jerome Glisse. 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a 7 * copy of this software and associated documentation files (the "Software"), 8 * to deal in the Software without restriction, including without limitation 9 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 10 * and/or sell copies of the Software, and to permit persons to whom the 11 * Software is furnished to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice shall be included in 14 * all copies or substantial portions of the Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 22 * OTHER DEALINGS IN THE SOFTWARE. 23 * 24 * Authors: Dave Airlie 25 * Alex Deucher 26 * Jerome Glisse 27 */ 28 #include <drm/drmP.h> 29 #include <drm/drm_crtc_helper.h> 30 #include <uapi_drm/radeon_drm.h> 31 #include "radeon_reg.h" 32 #include "radeon_irq_kms.h" 33 #include "radeon.h" 34 #include "atom.h" 35 36 #define RADEON_WAIT_IDLE_TIMEOUT 200 37 38 /** 39 * radeon_driver_irq_handler_kms - irq handler for KMS 40 * 41 * @DRM_IRQ_ARGS: args 42 * 43 * This is the irq handler for the radeon KMS driver (all asics). 44 * radeon_irq_process is a macro that points to the per-asic 45 * irq handler callback. 46 */ 47 irqreturn_t radeon_driver_irq_handler_kms(DRM_IRQ_ARGS) 48 { 49 struct drm_device *dev = (struct drm_device *) arg; 50 struct radeon_device *rdev = dev->dev_private; 51 52 return radeon_irq_process(rdev); 53 } 54 55 /* 56 * Handle hotplug events outside the interrupt handler proper. 57 */ 58 /** 59 * radeon_hotplug_work_func - display hotplug work handler 60 * 61 * @work: work struct 62 * 63 * This is the hot plug event work handler (all asics). 64 * The work gets scheduled from the irq handler if there 65 * was a hot plug interrupt. It walks the connector table 66 * and calls the hotplug handler for each one, then sends 67 * a drm hotplug event to alert userspace. 68 */ 69 static void radeon_hotplug_work_func(void *arg, int pending) 70 { 71 struct radeon_device *rdev = arg; 72 struct drm_device *dev = rdev->ddev; 73 struct drm_mode_config *mode_config = &dev->mode_config; 74 struct drm_connector *connector; 75 76 if (mode_config->num_connector) { 77 list_for_each_entry(connector, &mode_config->connector_list, head) 78 radeon_connector_hotplug(connector); 79 } 80 /* Just fire off a uevent and let userspace tell us what to do */ 81 drm_helper_hpd_irq_event(dev); 82 } 83 84 /** 85 * radeon_irq_reset_work_func - execute gpu reset 86 * 87 * @work: work struct 88 * 89 * Execute scheduled gpu reset (cayman+). 90 * This function is called when the irq handler 91 * thinks we need a gpu reset. 92 */ 93 static void radeon_irq_reset_work_func(void *arg, int pending) 94 { 95 struct radeon_device *rdev = arg; 96 97 radeon_gpu_reset(rdev); 98 } 99 100 /** 101 * radeon_driver_irq_preinstall_kms - drm irq preinstall callback 102 * 103 * @dev: drm dev pointer 104 * 105 * Gets the hw ready to enable irqs (all asics). 106 * This function disables all interrupt sources on the GPU. 107 */ 108 void radeon_driver_irq_preinstall_kms(struct drm_device *dev) 109 { 110 struct radeon_device *rdev = dev->dev_private; 111 unsigned i; 112 113 lockmgr(&rdev->irq.lock, LK_EXCLUSIVE); 114 /* Disable *all* interrupts */ 115 for (i = 0; i < RADEON_NUM_RINGS; i++) 116 atomic_set(&rdev->irq.ring_int[i], 0); 117 rdev->irq.dpm_thermal = false; 118 for (i = 0; i < RADEON_MAX_HPD_PINS; i++) 119 rdev->irq.hpd[i] = false; 120 for (i = 0; i < RADEON_MAX_CRTCS; i++) { 121 rdev->irq.crtc_vblank_int[i] = false; 122 atomic_set(&rdev->irq.pflip[i], 0); 123 rdev->irq.afmt[i] = false; 124 } 125 radeon_irq_set(rdev); 126 lockmgr(&rdev->irq.lock, LK_RELEASE); 127 /* Clear bits */ 128 radeon_irq_process(rdev); 129 } 130 131 /** 132 * radeon_driver_irq_postinstall_kms - drm irq preinstall callback 133 * 134 * @dev: drm dev pointer 135 * 136 * Handles stuff to be done after enabling irqs (all asics). 137 * Returns 0 on success. 138 */ 139 int radeon_driver_irq_postinstall_kms(struct drm_device *dev) 140 { 141 dev->max_vblank_count = 0x001fffff; 142 return 0; 143 } 144 145 /** 146 * radeon_driver_irq_uninstall_kms - drm irq uninstall callback 147 * 148 * @dev: drm dev pointer 149 * 150 * This function disables all interrupt sources on the GPU (all asics). 151 */ 152 void radeon_driver_irq_uninstall_kms(struct drm_device *dev) 153 { 154 struct radeon_device *rdev = dev->dev_private; 155 unsigned i; 156 157 if (rdev == NULL) { 158 return; 159 } 160 lockmgr(&rdev->irq.lock, LK_EXCLUSIVE); 161 /* Disable *all* interrupts */ 162 for (i = 0; i < RADEON_NUM_RINGS; i++) 163 atomic_set(&rdev->irq.ring_int[i], 0); 164 rdev->irq.dpm_thermal = false; 165 for (i = 0; i < RADEON_MAX_HPD_PINS; i++) 166 rdev->irq.hpd[i] = false; 167 for (i = 0; i < RADEON_MAX_CRTCS; i++) { 168 rdev->irq.crtc_vblank_int[i] = false; 169 atomic_set(&rdev->irq.pflip[i], 0); 170 rdev->irq.afmt[i] = false; 171 } 172 radeon_irq_set(rdev); 173 lockmgr(&rdev->irq.lock, LK_RELEASE); 174 } 175 176 /** 177 * radeon_msi_ok - asic specific msi checks 178 * 179 * @rdev: radeon device pointer 180 * 181 * Handles asic specific MSI checks to determine if 182 * MSIs should be enabled on a particular chip (all asics). 183 * Returns true if MSIs should be enabled, false if MSIs 184 * should not be enabled. 185 */ 186 int radeon_msi_ok(struct drm_device *dev, unsigned long flags) 187 { 188 int family; 189 190 family = flags & RADEON_FAMILY_MASK; 191 192 /* RV370/RV380 was first asic with MSI support */ 193 if (family < CHIP_RV380) 194 return false; 195 196 /* MSIs don't work on AGP */ 197 if (drm_device_is_agp(dev)) 198 return false; 199 200 /* force MSI on */ 201 if (radeon_msi == 1) 202 return true; 203 else if (radeon_msi == 0) 204 return false; 205 206 /* Quirks */ 207 /* HP RS690 only seems to work with MSIs. */ 208 if ((dev->pci_device == 0x791f) && 209 (dev->pci_subvendor == 0x103c) && 210 (dev->pci_subdevice == 0x30c2)) 211 return true; 212 213 /* Dell RS690 only seems to work with MSIs. */ 214 if ((dev->pci_device == 0x791f) && 215 (dev->pci_subvendor == 0x1028) && 216 (dev->pci_subdevice == 0x01fc)) 217 return true; 218 219 /* Dell RS690 only seems to work with MSIs. */ 220 if ((dev->pci_device == 0x791f) && 221 (dev->pci_subvendor == 0x1028) && 222 (dev->pci_subdevice == 0x01fd)) 223 return true; 224 225 /* Gateway RS690 only seems to work with MSIs. */ 226 if ((dev->pci_device == 0x791f) && 227 (dev->pci_subvendor == 0x107b) && 228 (dev->pci_subdevice == 0x0185)) 229 return true; 230 231 /* try and enable MSIs by default on all RS690s */ 232 if (family == CHIP_RS690) 233 return true; 234 235 /* RV515 seems to have MSI issues where it loses 236 * MSI rearms occasionally. This leads to lockups and freezes. 237 * disable it by default. 238 */ 239 if (family == CHIP_RV515) 240 return false; 241 if (flags & RADEON_IS_IGP) { 242 /* APUs work fine with MSIs */ 243 if (family >= CHIP_PALM) 244 return true; 245 /* lots of IGPs have problems with MSIs */ 246 return false; 247 } 248 249 return true; 250 } 251 252 /** 253 * radeon_irq_kms_init - init driver interrupt info 254 * 255 * @rdev: radeon device pointer 256 * 257 * Sets up the work irq handlers, vblank init, MSIs, etc. (all asics). 258 * Returns 0 for success, error for failure. 259 */ 260 int radeon_irq_kms_init(struct radeon_device *rdev) 261 { 262 int r = 0; 263 264 lockinit(&rdev->irq.lock, "drm__radeon_device__irq__lock", 0, LK_CANRECURSE); 265 r = drm_vblank_init(rdev->ddev, rdev->num_crtc); 266 if (r) { 267 return r; 268 } 269 /* enable msi */ 270 rdev->msi_enabled = (rdev->ddev->irq_type == PCI_INTR_TYPE_MSI); 271 272 TASK_INIT(&rdev->hotplug_work, 0, radeon_hotplug_work_func, rdev); 273 TASK_INIT(&rdev->audio_work, 0, r600_audio_update_hdmi, rdev); 274 TASK_INIT(&rdev->reset_work, 0, radeon_irq_reset_work_func, rdev); 275 276 rdev->irq.installed = true; 277 DRM_UNLOCK(rdev->ddev); 278 r = drm_irq_install(rdev->ddev, rdev->ddev->irq); 279 DRM_LOCK(rdev->ddev); 280 if (r) { 281 rdev->irq.installed = false; 282 taskqueue_drain(rdev->tq, &rdev->hotplug_work); 283 return r; 284 } 285 286 DRM_INFO("radeon: irq initialized.\n"); 287 return 0; 288 } 289 290 /** 291 * radeon_irq_kms_fini - tear down driver interrupt info 292 * 293 * @rdev: radeon device pointer 294 * 295 * Tears down the work irq handlers, vblank handlers, MSIs, etc. (all asics). 296 */ 297 void radeon_irq_kms_fini(struct radeon_device *rdev) 298 { 299 drm_vblank_cleanup(rdev->ddev); 300 if (rdev->irq.installed) { 301 drm_irq_uninstall(rdev->ddev); 302 rdev->irq.installed = false; 303 taskqueue_drain(rdev->tq, &rdev->hotplug_work); 304 } 305 } 306 307 /** 308 * radeon_irq_kms_sw_irq_get - enable software interrupt 309 * 310 * @rdev: radeon device pointer 311 * @ring: ring whose interrupt you want to enable 312 * 313 * Enables the software interrupt for a specific ring (all asics). 314 * The software interrupt is generally used to signal a fence on 315 * a particular ring. 316 */ 317 void radeon_irq_kms_sw_irq_get(struct radeon_device *rdev, int ring) 318 { 319 if (!rdev->ddev->irq_enabled) 320 return; 321 322 if (atomic_inc_return(&rdev->irq.ring_int[ring]) == 1) { 323 lockmgr(&rdev->irq.lock, LK_EXCLUSIVE); 324 radeon_irq_set(rdev); 325 lockmgr(&rdev->irq.lock, LK_RELEASE); 326 } 327 } 328 329 /** 330 * radeon_irq_kms_sw_irq_put - disable software interrupt 331 * 332 * @rdev: radeon device pointer 333 * @ring: ring whose interrupt you want to disable 334 * 335 * Disables the software interrupt for a specific ring (all asics). 336 * The software interrupt is generally used to signal a fence on 337 * a particular ring. 338 */ 339 void radeon_irq_kms_sw_irq_put(struct radeon_device *rdev, int ring) 340 { 341 if (!rdev->ddev->irq_enabled) 342 return; 343 344 if (atomic_dec_and_test(&rdev->irq.ring_int[ring])) { 345 lockmgr(&rdev->irq.lock, LK_EXCLUSIVE); 346 radeon_irq_set(rdev); 347 lockmgr(&rdev->irq.lock, LK_RELEASE); 348 } 349 } 350 351 /** 352 * radeon_irq_kms_pflip_irq_get - enable pageflip interrupt 353 * 354 * @rdev: radeon device pointer 355 * @crtc: crtc whose interrupt you want to enable 356 * 357 * Enables the pageflip interrupt for a specific crtc (all asics). 358 * For pageflips we use the vblank interrupt source. 359 */ 360 void radeon_irq_kms_pflip_irq_get(struct radeon_device *rdev, int crtc) 361 { 362 if (crtc < 0 || crtc >= rdev->num_crtc) 363 return; 364 365 if (!rdev->ddev->irq_enabled) 366 return; 367 368 if (atomic_inc_return(&rdev->irq.pflip[crtc]) == 1) { 369 lockmgr(&rdev->irq.lock, LK_EXCLUSIVE); 370 radeon_irq_set(rdev); 371 lockmgr(&rdev->irq.lock, LK_RELEASE); 372 } 373 } 374 375 /** 376 * radeon_irq_kms_pflip_irq_put - disable pageflip interrupt 377 * 378 * @rdev: radeon device pointer 379 * @crtc: crtc whose interrupt you want to disable 380 * 381 * Disables the pageflip interrupt for a specific crtc (all asics). 382 * For pageflips we use the vblank interrupt source. 383 */ 384 void radeon_irq_kms_pflip_irq_put(struct radeon_device *rdev, int crtc) 385 { 386 if (crtc < 0 || crtc >= rdev->num_crtc) 387 return; 388 389 if (!rdev->ddev->irq_enabled) 390 return; 391 392 if (atomic_dec_and_test(&rdev->irq.pflip[crtc])) { 393 lockmgr(&rdev->irq.lock, LK_EXCLUSIVE); 394 radeon_irq_set(rdev); 395 lockmgr(&rdev->irq.lock, LK_RELEASE); 396 } 397 } 398 399 /** 400 * radeon_irq_kms_enable_afmt - enable audio format change interrupt 401 * 402 * @rdev: radeon device pointer 403 * @block: afmt block whose interrupt you want to enable 404 * 405 * Enables the afmt change interrupt for a specific afmt block (all asics). 406 */ 407 void radeon_irq_kms_enable_afmt(struct radeon_device *rdev, int block) 408 { 409 if (!rdev->ddev->irq_enabled) 410 return; 411 412 lockmgr(&rdev->irq.lock, LK_EXCLUSIVE); 413 rdev->irq.afmt[block] = true; 414 radeon_irq_set(rdev); 415 lockmgr(&rdev->irq.lock, LK_RELEASE); 416 } 417 418 /** 419 * radeon_irq_kms_disable_afmt - disable audio format change interrupt 420 * 421 * @rdev: radeon device pointer 422 * @block: afmt block whose interrupt you want to disable 423 * 424 * Disables the afmt change interrupt for a specific afmt block (all asics). 425 */ 426 void radeon_irq_kms_disable_afmt(struct radeon_device *rdev, int block) 427 { 428 if (!rdev->ddev->irq_enabled) 429 return; 430 431 lockmgr(&rdev->irq.lock, LK_EXCLUSIVE); 432 rdev->irq.afmt[block] = false; 433 radeon_irq_set(rdev); 434 lockmgr(&rdev->irq.lock, LK_RELEASE); 435 } 436 437 /** 438 * radeon_irq_kms_enable_hpd - enable hotplug detect interrupt 439 * 440 * @rdev: radeon device pointer 441 * @hpd_mask: mask of hpd pins you want to enable. 442 * 443 * Enables the hotplug detect interrupt for a specific hpd pin (all asics). 444 */ 445 void radeon_irq_kms_enable_hpd(struct radeon_device *rdev, unsigned hpd_mask) 446 { 447 int i; 448 449 if (!rdev->ddev->irq_enabled) 450 return; 451 452 lockmgr(&rdev->irq.lock, LK_EXCLUSIVE); 453 for (i = 0; i < RADEON_MAX_HPD_PINS; ++i) 454 rdev->irq.hpd[i] |= !!(hpd_mask & (1 << i)); 455 radeon_irq_set(rdev); 456 lockmgr(&rdev->irq.lock, LK_RELEASE); 457 } 458 459 /** 460 * radeon_irq_kms_disable_hpd - disable hotplug detect interrupt 461 * 462 * @rdev: radeon device pointer 463 * @hpd_mask: mask of hpd pins you want to disable. 464 * 465 * Disables the hotplug detect interrupt for a specific hpd pin (all asics). 466 */ 467 void radeon_irq_kms_disable_hpd(struct radeon_device *rdev, unsigned hpd_mask) 468 { 469 int i; 470 471 if (!rdev->ddev->irq_enabled) 472 return; 473 474 lockmgr(&rdev->irq.lock, LK_EXCLUSIVE); 475 for (i = 0; i < RADEON_MAX_HPD_PINS; ++i) 476 rdev->irq.hpd[i] &= !(hpd_mask & (1 << i)); 477 radeon_irq_set(rdev); 478 lockmgr(&rdev->irq.lock, LK_RELEASE); 479 } 480 481