xref: /dflybsd-src/sys/dev/drm/radeon/radeon_gem.c (revision e586f31ca9899b49a4fc156613d9ecd853defcec)
1 /*
2  * Copyright 2008 Advanced Micro Devices, Inc.
3  * Copyright 2008 Red Hat Inc.
4  * Copyright 2009 Jerome Glisse.
5  *
6  * Permission is hereby granted, free of charge, to any person obtaining a
7  * copy of this software and associated documentation files (the "Software"),
8  * to deal in the Software without restriction, including without limitation
9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10  * and/or sell copies of the Software, and to permit persons to whom the
11  * Software is furnished to do so, subject to the following conditions:
12  *
13  * The above copyright notice and this permission notice shall be included in
14  * all copies or substantial portions of the Software.
15  *
16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
19  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
20  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
22  * OTHER DEALINGS IN THE SOFTWARE.
23  *
24  * Authors: Dave Airlie
25  *          Alex Deucher
26  *          Jerome Glisse
27  *
28  * $FreeBSD: head/sys/dev/drm2/radeon/radeon_gem.c 254885 2013-08-25 19:37:15Z dumbbell $
29  */
30 
31 #include <drm/drmP.h>
32 #include <uapi_drm/radeon_drm.h>
33 #include "radeon.h"
34 #include "radeon_gem.h"
35 
36 void radeon_gem_object_free(struct drm_gem_object *gobj)
37 {
38 	struct radeon_bo *robj = gem_to_radeon_bo(gobj);
39 
40 	if (robj) {
41 #ifdef DUMBBELL_WIP
42 		if (robj->gem_base.import_attach)
43 			drm_prime_gem_destroy(&robj->gem_base, robj->tbo.sg);
44 #endif /* DUMBBELL_WIP */
45 		radeon_bo_unref(&robj);
46 	}
47 }
48 
49 int radeon_gem_object_create(struct radeon_device *rdev, unsigned long size,
50 				int alignment, int initial_domain,
51 				u32 flags, bool kernel,
52 				struct drm_gem_object **obj)
53 {
54 	struct radeon_bo *robj;
55 	unsigned long max_size;
56 	int r;
57 
58 	*obj = NULL;
59 	/* At least align on page size */
60 	if (alignment < PAGE_SIZE) {
61 		alignment = PAGE_SIZE;
62 	}
63 
64 	/* Maximum bo size is the unpinned gtt size since we use the gtt to
65 	 * handle vram to system pool migrations.
66 	 */
67 	max_size = rdev->mc.gtt_size - rdev->gart_pin_size;
68 	if (size > max_size) {
69 		DRM_DEBUG("Allocation size %ldMb bigger than %ldMb limit\n",
70 			  size >> 20, max_size >> 20);
71 		return -ENOMEM;
72 	}
73 
74 retry:
75 	r = radeon_bo_create(rdev, size, alignment, kernel, initial_domain,
76 			     flags, NULL, &robj);
77 	if (r) {
78 		if (r != -ERESTARTSYS) {
79 			if (initial_domain == RADEON_GEM_DOMAIN_VRAM) {
80 				initial_domain |= RADEON_GEM_DOMAIN_GTT;
81 				goto retry;
82 			}
83 			DRM_ERROR("Failed to allocate GEM object (%ld, %d, %u, %d)\n",
84 				  size, initial_domain, alignment, r);
85 		}
86 		return r;
87 	}
88 	*obj = &robj->gem_base;
89 	robj->pid = curproc ? curproc->p_pid : 0;
90 
91 	mutex_lock(&rdev->gem.mutex);
92 	list_add_tail(&robj->list, &rdev->gem.objects);
93 	mutex_unlock(&rdev->gem.mutex);
94 
95 	return 0;
96 }
97 
98 static int radeon_gem_set_domain(struct drm_gem_object *gobj,
99 			  uint32_t rdomain, uint32_t wdomain)
100 {
101 	struct radeon_bo *robj;
102 	uint32_t domain;
103 	int r;
104 
105 	/* FIXME: reeimplement */
106 	robj = gem_to_radeon_bo(gobj);
107 	/* work out where to validate the buffer to */
108 	domain = wdomain;
109 	if (!domain) {
110 		domain = rdomain;
111 	}
112 	if (!domain) {
113 		/* Do nothings */
114 		printk(KERN_WARNING "Set domain without domain !\n");
115 		return 0;
116 	}
117 	if (domain == RADEON_GEM_DOMAIN_CPU) {
118 		/* Asking for cpu access wait for object idle */
119 		r = radeon_bo_wait(robj, NULL, false);
120 		if (r) {
121 			printk(KERN_ERR "Failed to wait for object !\n");
122 			return r;
123 		}
124 	}
125 	return 0;
126 }
127 
128 int radeon_gem_init(struct radeon_device *rdev)
129 {
130 	INIT_LIST_HEAD(&rdev->gem.objects);
131 	return 0;
132 }
133 
134 void radeon_gem_fini(struct radeon_device *rdev)
135 {
136 	radeon_bo_force_delete(rdev);
137 }
138 
139 /*
140  * Call from drm_gem_handle_create which appear in both new and open ioctl
141  * case.
142  */
143 int radeon_gem_object_open(struct drm_gem_object *obj, struct drm_file *file_priv)
144 {
145 	struct radeon_bo *rbo = gem_to_radeon_bo(obj);
146 	struct radeon_device *rdev = rbo->rdev;
147 	struct radeon_fpriv *fpriv = file_priv->driver_priv;
148 	struct radeon_vm *vm = &fpriv->vm;
149 	struct radeon_bo_va *bo_va;
150 	int r;
151 
152 	if ((rdev->family < CHIP_CAYMAN) ||
153 	    (!rdev->accel_working)) {
154 		return 0;
155 	}
156 
157 	r = radeon_bo_reserve(rbo, false);
158 	if (r) {
159 		return r;
160 	}
161 
162 	bo_va = radeon_vm_bo_find(vm, rbo);
163 	if (!bo_va) {
164 		bo_va = radeon_vm_bo_add(rdev, vm, rbo);
165 	} else {
166 		++bo_va->ref_count;
167 	}
168 	radeon_bo_unreserve(rbo);
169 
170 	return 0;
171 }
172 
173 void radeon_gem_object_close(struct drm_gem_object *obj,
174 			     struct drm_file *file_priv)
175 {
176 	struct radeon_bo *rbo = gem_to_radeon_bo(obj);
177 	struct radeon_device *rdev = rbo->rdev;
178 	struct radeon_fpriv *fpriv = file_priv->driver_priv;
179 	struct radeon_vm *vm = &fpriv->vm;
180 	struct radeon_bo_va *bo_va;
181 	int r;
182 
183 	if ((rdev->family < CHIP_CAYMAN) ||
184 	    (!rdev->accel_working)) {
185 		return;
186 	}
187 
188 	r = radeon_bo_reserve(rbo, true);
189 	if (r) {
190 		dev_err(rdev->dev, "leaking bo va because "
191 			"we fail to reserve bo (%d)\n", r);
192 		return;
193 	}
194 	bo_va = radeon_vm_bo_find(vm, rbo);
195 	if (bo_va) {
196 		if (--bo_va->ref_count == 0) {
197 			radeon_vm_bo_rmv(rdev, bo_va);
198 		}
199 	}
200 	radeon_bo_unreserve(rbo);
201 }
202 
203 static int radeon_gem_handle_lockup(struct radeon_device *rdev, int r)
204 {
205 	if (r == -EDEADLK) {
206 		r = radeon_gpu_reset(rdev);
207 		if (!r)
208 			r = -EAGAIN;
209 	}
210 	return r;
211 }
212 
213 /*
214  * GEM ioctls.
215  */
216 int radeon_gem_info_ioctl(struct drm_device *dev, void *data,
217 			  struct drm_file *filp)
218 {
219 	struct radeon_device *rdev = dev->dev_private;
220 	struct drm_radeon_gem_info *args = data;
221 	struct ttm_mem_type_manager *man;
222 
223 	man = &rdev->mman.bdev.man[TTM_PL_VRAM];
224 
225 	args->vram_size = rdev->mc.real_vram_size;
226 	args->vram_visible = (u64)man->size << PAGE_SHIFT;
227 	args->vram_visible -= rdev->vram_pin_size;
228 	args->gart_size = rdev->mc.gtt_size;
229 	args->gart_size -= rdev->gart_pin_size;
230 
231 	return 0;
232 }
233 
234 int radeon_gem_pread_ioctl(struct drm_device *dev, void *data,
235 			   struct drm_file *filp)
236 {
237 	/* TODO: implement */
238 	DRM_ERROR("unimplemented %s\n", __func__);
239 	return -ENOSYS;
240 }
241 
242 int radeon_gem_pwrite_ioctl(struct drm_device *dev, void *data,
243 			    struct drm_file *filp)
244 {
245 	/* TODO: implement */
246 	DRM_ERROR("unimplemented %s\n", __func__);
247 	return -ENOSYS;
248 }
249 
250 int radeon_gem_create_ioctl(struct drm_device *dev, void *data,
251 			    struct drm_file *filp)
252 {
253 	struct radeon_device *rdev = dev->dev_private;
254 	struct drm_radeon_gem_create *args = data;
255 	struct drm_gem_object *gobj;
256 	uint32_t handle;
257 	int r;
258 
259 	lockmgr(&rdev->exclusive_lock, LK_SHARED);
260 	/* create a gem object to contain this object in */
261 	args->size = roundup(args->size, PAGE_SIZE);
262 	r = radeon_gem_object_create(rdev, args->size, args->alignment,
263 				     args->initial_domain, args->flags,
264 				     false, &gobj);
265 	if (r) {
266 		if (r == -ERESTARTSYS)
267 			r = -EINTR;
268 		lockmgr(&rdev->exclusive_lock, LK_RELEASE);
269 		r = radeon_gem_handle_lockup(rdev, r);
270 		return r;
271 	}
272 	handle = 0;
273 	r = drm_gem_handle_create(filp, gobj, &handle);
274 	/* drop reference from allocate - handle holds it now */
275 	drm_gem_object_unreference_unlocked(gobj);
276 	if (r) {
277 		lockmgr(&rdev->exclusive_lock, LK_RELEASE);
278 		r = radeon_gem_handle_lockup(rdev, r);
279 		return r;
280 	}
281 	args->handle = handle;
282 	lockmgr(&rdev->exclusive_lock, LK_RELEASE);
283 	return 0;
284 }
285 
286 int radeon_gem_set_domain_ioctl(struct drm_device *dev, void *data,
287 				struct drm_file *filp)
288 {
289 	/* transition the BO to a domain -
290 	 * just validate the BO into a certain domain */
291 	struct radeon_device *rdev = dev->dev_private;
292 	struct drm_radeon_gem_set_domain *args = data;
293 	struct drm_gem_object *gobj;
294 	struct radeon_bo *robj;
295 	int r;
296 
297 	/* for now if someone requests domain CPU -
298 	 * just make sure the buffer is finished with */
299 	lockmgr(&rdev->exclusive_lock, LK_SHARED);
300 
301 	/* just do a BO wait for now */
302 	gobj = drm_gem_object_lookup(filp, args->handle);
303 	if (gobj == NULL) {
304 		lockmgr(&rdev->exclusive_lock, LK_RELEASE);
305 		return -ENOENT;
306 	}
307 	robj = gem_to_radeon_bo(gobj);
308 
309 	r = radeon_gem_set_domain(gobj, args->read_domains, args->write_domain);
310 
311 	drm_gem_object_unreference_unlocked(gobj);
312 	lockmgr(&rdev->exclusive_lock, LK_RELEASE);
313 	r = radeon_gem_handle_lockup(robj->rdev, r);
314 	return r;
315 }
316 
317 int radeon_mode_dumb_mmap(struct drm_file *filp,
318 			  struct drm_device *dev,
319 			  uint32_t handle, uint64_t *offset_p)
320 {
321 	struct drm_gem_object *gobj;
322 	struct radeon_bo *robj;
323 
324 	gobj = drm_gem_object_lookup(filp, handle);
325 	if (gobj == NULL) {
326 		return -ENOENT;
327 	}
328 	robj = gem_to_radeon_bo(gobj);
329 	*offset_p = radeon_bo_mmap_offset(robj);
330 	drm_gem_object_unreference_unlocked(gobj);
331 	return 0;
332 }
333 
334 int radeon_gem_mmap_ioctl(struct drm_device *dev, void *data,
335 			  struct drm_file *filp)
336 {
337 	struct drm_radeon_gem_mmap *args = data;
338 
339 	return radeon_mode_dumb_mmap(filp, dev, args->handle, (uint64_t *)&args->addr_ptr);
340 }
341 
342 int radeon_gem_busy_ioctl(struct drm_device *dev, void *data,
343 			  struct drm_file *filp)
344 {
345 	struct radeon_device *rdev = dev->dev_private;
346 	struct drm_radeon_gem_busy *args = data;
347 	struct drm_gem_object *gobj;
348 	struct radeon_bo *robj;
349 	int r;
350 	uint32_t cur_placement = 0;
351 
352 	gobj = drm_gem_object_lookup(filp, args->handle);
353 	if (gobj == NULL) {
354 		return -ENOENT;
355 	}
356 	robj = gem_to_radeon_bo(gobj);
357 	r = radeon_bo_wait(robj, &cur_placement, true);
358 	args->domain = radeon_mem_type_to_domain(cur_placement);
359 	drm_gem_object_unreference_unlocked(gobj);
360 	r = radeon_gem_handle_lockup(rdev, r);
361 	return r;
362 }
363 
364 int radeon_gem_wait_idle_ioctl(struct drm_device *dev, void *data,
365 			      struct drm_file *filp)
366 {
367 	struct radeon_device *rdev = dev->dev_private;
368 	struct drm_radeon_gem_wait_idle *args = data;
369 	struct drm_gem_object *gobj;
370 	struct radeon_bo *robj;
371 	int r;
372 	uint32_t cur_placement = 0;
373 
374 	gobj = drm_gem_object_lookup(filp, args->handle);
375 	if (gobj == NULL) {
376 		return -ENOENT;
377 	}
378 	robj = gem_to_radeon_bo(gobj);
379 	r = radeon_bo_wait(robj, &cur_placement, false);
380 	/* Flush HDP cache via MMIO if necessary */
381 	if (rdev->asic->mmio_hdp_flush &&
382 	    radeon_mem_type_to_domain(cur_placement) == RADEON_GEM_DOMAIN_VRAM)
383 		robj->rdev->asic->mmio_hdp_flush(rdev);
384 	drm_gem_object_unreference_unlocked(gobj);
385 	if (r == -ERESTARTSYS)
386 		r = -EINTR;
387 	r = radeon_gem_handle_lockup(rdev, r);
388 	return r;
389 }
390 
391 int radeon_gem_set_tiling_ioctl(struct drm_device *dev, void *data,
392 				struct drm_file *filp)
393 {
394 	struct drm_radeon_gem_set_tiling *args = data;
395 	struct drm_gem_object *gobj;
396 	struct radeon_bo *robj;
397 	int r = 0;
398 
399 	DRM_DEBUG("%d \n", args->handle);
400 	gobj = drm_gem_object_lookup(filp, args->handle);
401 	if (gobj == NULL)
402 		return -ENOENT;
403 	robj = gem_to_radeon_bo(gobj);
404 	r = radeon_bo_set_tiling_flags(robj, args->tiling_flags, args->pitch);
405 	drm_gem_object_unreference_unlocked(gobj);
406 	return r;
407 }
408 
409 int radeon_gem_get_tiling_ioctl(struct drm_device *dev, void *data,
410 				struct drm_file *filp)
411 {
412 	struct drm_radeon_gem_get_tiling *args = data;
413 	struct drm_gem_object *gobj;
414 	struct radeon_bo *rbo;
415 	int r = 0;
416 
417 	DRM_DEBUG("\n");
418 	gobj = drm_gem_object_lookup(filp, args->handle);
419 	if (gobj == NULL)
420 		return -ENOENT;
421 	rbo = gem_to_radeon_bo(gobj);
422 	r = radeon_bo_reserve(rbo, false);
423 	if (unlikely(r != 0))
424 		goto out;
425 	radeon_bo_get_tiling_flags(rbo, &args->tiling_flags, &args->pitch);
426 	radeon_bo_unreserve(rbo);
427 out:
428 	drm_gem_object_unreference_unlocked(gobj);
429 	return r;
430 }
431 
432 int radeon_gem_va_ioctl(struct drm_device *dev, void *data,
433 			  struct drm_file *filp)
434 {
435 	struct drm_radeon_gem_va *args = data;
436 	struct drm_gem_object *gobj;
437 	struct radeon_device *rdev = dev->dev_private;
438 	struct radeon_fpriv *fpriv = filp->driver_priv;
439 	struct radeon_bo *rbo;
440 	struct radeon_bo_va *bo_va;
441 	u32 invalid_flags;
442 	int r = 0;
443 
444 	if (!rdev->vm_manager.enabled) {
445 		args->operation = RADEON_VA_RESULT_ERROR;
446 		return -ENOTTY;
447 	}
448 
449 	/* !! DONT REMOVE !!
450 	 * We don't support vm_id yet, to be sure we don't have have broken
451 	 * userspace, reject anyone trying to use non 0 value thus moving
452 	 * forward we can use those fields without breaking existant userspace
453 	 */
454 	if (args->vm_id) {
455 		args->operation = RADEON_VA_RESULT_ERROR;
456 		return -EINVAL;
457 	}
458 
459 	if (args->offset < RADEON_VA_RESERVED_SIZE) {
460 		dev_err(&dev->pdev->dev,
461 			"offset 0x%lX is in reserved area 0x%X\n",
462 			(unsigned long)args->offset,
463 			RADEON_VA_RESERVED_SIZE);
464 		args->operation = RADEON_VA_RESULT_ERROR;
465 		return -EINVAL;
466 	}
467 
468 	/* don't remove, we need to enforce userspace to set the snooped flag
469 	 * otherwise we will endup with broken userspace and we won't be able
470 	 * to enable this feature without adding new interface
471 	 */
472 	invalid_flags = RADEON_VM_PAGE_VALID | RADEON_VM_PAGE_SYSTEM;
473 	if ((args->flags & invalid_flags)) {
474 		dev_err(&dev->pdev->dev, "invalid flags 0x%08X vs 0x%08X\n",
475 			args->flags, invalid_flags);
476 		args->operation = RADEON_VA_RESULT_ERROR;
477 		return -EINVAL;
478 	}
479 
480 	switch (args->operation) {
481 	case RADEON_VA_MAP:
482 	case RADEON_VA_UNMAP:
483 		break;
484 	default:
485 		dev_err(&dev->pdev->dev, "unsupported operation %d\n",
486 			args->operation);
487 		args->operation = RADEON_VA_RESULT_ERROR;
488 		return -EINVAL;
489 	}
490 
491 	gobj = drm_gem_object_lookup(filp, args->handle);
492 	if (gobj == NULL) {
493 		args->operation = RADEON_VA_RESULT_ERROR;
494 		return -ENOENT;
495 	}
496 	rbo = gem_to_radeon_bo(gobj);
497 	r = radeon_bo_reserve(rbo, false);
498 	if (r) {
499 		args->operation = RADEON_VA_RESULT_ERROR;
500 		drm_gem_object_unreference_unlocked(gobj);
501 		return r;
502 	}
503 	bo_va = radeon_vm_bo_find(&fpriv->vm, rbo);
504 	if (!bo_va) {
505 		args->operation = RADEON_VA_RESULT_ERROR;
506 		radeon_bo_unreserve(rbo);
507 		drm_gem_object_unreference_unlocked(gobj);
508 		return -ENOENT;
509 	}
510 
511 	switch (args->operation) {
512 	case RADEON_VA_MAP:
513 		if (bo_va->soffset) {
514 			args->operation = RADEON_VA_RESULT_VA_EXIST;
515 			args->offset = bo_va->soffset;
516 			radeon_bo_unreserve(rbo);
517 			goto out;
518 		}
519 		r = radeon_vm_bo_set_addr(rdev, bo_va, args->offset, args->flags);
520 		break;
521 	case RADEON_VA_UNMAP:
522 		r = radeon_vm_bo_set_addr(rdev, bo_va, 0, 0);
523 		break;
524 	default:
525 		break;
526 	}
527 	args->operation = RADEON_VA_RESULT_OK;
528 	if (r) {
529 		args->operation = RADEON_VA_RESULT_ERROR;
530 	}
531 out:
532 	drm_gem_object_unreference_unlocked(gobj);
533 	return r;
534 }
535 
536 int radeon_gem_op_ioctl(struct drm_device *dev, void *data,
537 			struct drm_file *filp)
538 {
539 	struct drm_radeon_gem_op *args = data;
540 	struct drm_gem_object *gobj;
541 	struct radeon_bo *robj;
542 	int r;
543 
544 	gobj = drm_gem_object_lookup(filp, args->handle);
545 	if (gobj == NULL) {
546 		return -ENOENT;
547 	}
548 	robj = gem_to_radeon_bo(gobj);
549 	r = radeon_bo_reserve(robj, false);
550 	if (unlikely(r))
551 		goto out;
552 
553 	switch (args->op) {
554 	case RADEON_GEM_OP_GET_INITIAL_DOMAIN:
555 		args->value = robj->initial_domain;
556 		break;
557 	case RADEON_GEM_OP_SET_INITIAL_DOMAIN:
558 		robj->initial_domain = args->value & (RADEON_GEM_DOMAIN_VRAM |
559 						      RADEON_GEM_DOMAIN_GTT |
560 						      RADEON_GEM_DOMAIN_CPU);
561 		break;
562 	default:
563 		r = -EINVAL;
564 	}
565 
566 	radeon_bo_unreserve(robj);
567 out:
568 	drm_gem_object_unreference_unlocked(gobj);
569 	return r;
570 }
571 
572 int radeon_mode_dumb_create(struct drm_file *file_priv,
573 			    struct drm_device *dev,
574 			    struct drm_mode_create_dumb *args)
575 {
576 	struct radeon_device *rdev = dev->dev_private;
577 	struct drm_gem_object *gobj;
578 	uint32_t handle;
579 	int r;
580 
581 	args->pitch = radeon_align_pitch(rdev, args->width, args->bpp, 0) * ((args->bpp + 1) / 8);
582 	args->size = args->pitch * args->height;
583 	args->size = ALIGN(args->size, PAGE_SIZE);
584 
585 	r = radeon_gem_object_create(rdev, args->size, 0,
586 				     RADEON_GEM_DOMAIN_VRAM, 0,
587 				     false, &gobj);
588 	if (r)
589 		return -ENOMEM;
590 
591 	r = drm_gem_handle_create(file_priv, gobj, &handle);
592 	/* drop reference from allocate - handle holds it now */
593 	drm_gem_object_unreference_unlocked(gobj);
594 	if (r) {
595 		return r;
596 	}
597 	args->handle = handle;
598 	return 0;
599 }
600 
601 #if defined(CONFIG_DEBUG_FS)
602 static int radeon_debugfs_gem_info(struct seq_file *m, void *data)
603 {
604 	struct drm_info_node *node = (struct drm_info_node *)m->private;
605 	struct drm_device *dev = node->minor->dev;
606 	struct radeon_device *rdev = dev->dev_private;
607 	struct radeon_bo *rbo;
608 	unsigned i = 0;
609 
610 	mutex_lock(&rdev->gem.mutex);
611 	list_for_each_entry(rbo, &rdev->gem.objects, list) {
612 		unsigned domain;
613 		const char *placement;
614 
615 		domain = radeon_mem_type_to_domain(rbo->tbo.mem.mem_type);
616 		switch (domain) {
617 		case RADEON_GEM_DOMAIN_VRAM:
618 			placement = "VRAM";
619 			break;
620 		case RADEON_GEM_DOMAIN_GTT:
621 			placement = " GTT";
622 			break;
623 		case RADEON_GEM_DOMAIN_CPU:
624 		default:
625 			placement = " CPU";
626 			break;
627 		}
628 		seq_printf(m, "bo[0x%08x] %8ldkB %8ldMB %s pid %8ld\n",
629 			   i, radeon_bo_size(rbo) >> 10, radeon_bo_size(rbo) >> 20,
630 			   placement, (unsigned long)rbo->pid);
631 		i++;
632 	}
633 	mutex_unlock(&rdev->gem.mutex);
634 	return 0;
635 }
636 
637 static struct drm_info_list radeon_debugfs_gem_list[] = {
638 	{"radeon_gem_info", &radeon_debugfs_gem_info, 0, NULL},
639 };
640 #endif
641 
642 int radeon_gem_debugfs_init(struct radeon_device *rdev)
643 {
644 #if defined(CONFIG_DEBUG_FS)
645 	return radeon_debugfs_add_files(rdev, radeon_debugfs_gem_list, 1);
646 #endif
647 	return 0;
648 }
649