1 /* 2 * Copyright 2008 Advanced Micro Devices, Inc. 3 * Copyright 2008 Red Hat Inc. 4 * Copyright 2009 Jerome Glisse. 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a 7 * copy of this software and associated documentation files (the "Software"), 8 * to deal in the Software without restriction, including without limitation 9 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 10 * and/or sell copies of the Software, and to permit persons to whom the 11 * Software is furnished to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice shall be included in 14 * all copies or substantial portions of the Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 22 * OTHER DEALINGS IN THE SOFTWARE. 23 * 24 * Authors: Dave Airlie 25 * Alex Deucher 26 * Jerome Glisse 27 * 28 * $FreeBSD: head/sys/dev/drm2/radeon/radeon_gem.c 254885 2013-08-25 19:37:15Z dumbbell $ 29 */ 30 31 #include <drm/drmP.h> 32 #include <uapi_drm/radeon_drm.h> 33 #include "radeon.h" 34 #include "radeon_gem.h" 35 36 void radeon_gem_object_free(struct drm_gem_object *gobj) 37 { 38 struct radeon_bo *robj = gem_to_radeon_bo(gobj); 39 40 if (robj) { 41 #ifdef DUMBBELL_WIP 42 if (robj->gem_base.import_attach) 43 drm_prime_gem_destroy(&robj->gem_base, robj->tbo.sg); 44 #endif /* DUMBBELL_WIP */ 45 radeon_bo_unref(&robj); 46 } 47 } 48 49 int radeon_gem_object_create(struct radeon_device *rdev, int size, 50 int alignment, int initial_domain, 51 bool discardable, bool kernel, 52 struct drm_gem_object **obj) 53 { 54 struct radeon_bo *robj; 55 unsigned long max_size; 56 int r; 57 58 *obj = NULL; 59 /* At least align on page size */ 60 if (alignment < PAGE_SIZE) { 61 alignment = PAGE_SIZE; 62 } 63 64 /* maximun bo size is the minimun btw visible vram and gtt size */ 65 max_size = min(rdev->mc.visible_vram_size, rdev->mc.gtt_size); 66 if (size > max_size) { 67 printk(KERN_WARNING "%s:%d alloc size %dMb bigger than %ldMb limit\n", 68 __func__, __LINE__, size >> 20, max_size >> 20); 69 return -ENOMEM; 70 } 71 72 retry: 73 r = radeon_bo_create(rdev, size, alignment, kernel, initial_domain, NULL, &robj); 74 if (r) { 75 if (r != -ERESTARTSYS) { 76 if (initial_domain == RADEON_GEM_DOMAIN_VRAM) { 77 initial_domain |= RADEON_GEM_DOMAIN_GTT; 78 goto retry; 79 } 80 DRM_ERROR("Failed to allocate GEM object (%d, %d, %u, %d)\n", 81 size, initial_domain, alignment, r); 82 } 83 return r; 84 } 85 *obj = &robj->gem_base; 86 robj->pid = curproc ? curproc->p_pid : 0; 87 88 spin_lock(&rdev->gem.mutex); 89 list_add_tail(&robj->list, &rdev->gem.objects); 90 spin_unlock(&rdev->gem.mutex); 91 92 return 0; 93 } 94 95 static int radeon_gem_set_domain(struct drm_gem_object *gobj, 96 uint32_t rdomain, uint32_t wdomain) 97 { 98 struct radeon_bo *robj; 99 uint32_t domain; 100 int r; 101 102 /* FIXME: reeimplement */ 103 robj = gem_to_radeon_bo(gobj); 104 /* work out where to validate the buffer to */ 105 domain = wdomain; 106 if (!domain) { 107 domain = rdomain; 108 } 109 if (!domain) { 110 /* Do nothings */ 111 printk(KERN_WARNING "Set domain without domain !\n"); 112 return 0; 113 } 114 if (domain == RADEON_GEM_DOMAIN_CPU) { 115 /* Asking for cpu access wait for object idle */ 116 r = radeon_bo_wait(robj, NULL, false); 117 if (r) { 118 printk(KERN_ERR "Failed to wait for object !\n"); 119 return r; 120 } 121 } 122 return 0; 123 } 124 125 int radeon_gem_init(struct radeon_device *rdev) 126 { 127 INIT_LIST_HEAD(&rdev->gem.objects); 128 return 0; 129 } 130 131 void radeon_gem_fini(struct radeon_device *rdev) 132 { 133 radeon_bo_force_delete(rdev); 134 } 135 136 /* 137 * Call from drm_gem_handle_create which appear in both new and open ioctl 138 * case. 139 */ 140 int radeon_gem_object_open(struct drm_gem_object *obj, struct drm_file *file_priv) 141 { 142 struct radeon_bo *rbo = gem_to_radeon_bo(obj); 143 struct radeon_device *rdev = rbo->rdev; 144 struct radeon_fpriv *fpriv = file_priv->driver_priv; 145 struct radeon_vm *vm = &fpriv->vm; 146 struct radeon_bo_va *bo_va; 147 int r; 148 149 if (rdev->family < CHIP_CAYMAN) { 150 return 0; 151 } 152 153 r = radeon_bo_reserve(rbo, false); 154 if (r) { 155 return r; 156 } 157 158 bo_va = radeon_vm_bo_find(vm, rbo); 159 if (!bo_va) { 160 bo_va = radeon_vm_bo_add(rdev, vm, rbo); 161 } else { 162 ++bo_va->ref_count; 163 } 164 radeon_bo_unreserve(rbo); 165 166 return 0; 167 } 168 169 void radeon_gem_object_close(struct drm_gem_object *obj, 170 struct drm_file *file_priv) 171 { 172 struct radeon_bo *rbo = gem_to_radeon_bo(obj); 173 struct radeon_device *rdev = rbo->rdev; 174 struct radeon_fpriv *fpriv = file_priv->driver_priv; 175 struct radeon_vm *vm = &fpriv->vm; 176 struct radeon_bo_va *bo_va; 177 int r; 178 179 if (rdev->family < CHIP_CAYMAN) { 180 return; 181 } 182 183 r = radeon_bo_reserve(rbo, true); 184 if (r) { 185 dev_err(rdev->dev, "leaking bo va because " 186 "we fail to reserve bo (%d)\n", r); 187 return; 188 } 189 bo_va = radeon_vm_bo_find(vm, rbo); 190 if (bo_va) { 191 if (--bo_va->ref_count == 0) { 192 radeon_vm_bo_rmv(rdev, bo_va); 193 } 194 } 195 radeon_bo_unreserve(rbo); 196 } 197 198 static int radeon_gem_handle_lockup(struct radeon_device *rdev, int r) 199 { 200 if (r == -EDEADLK) { 201 r = radeon_gpu_reset(rdev); 202 if (!r) 203 r = -EAGAIN; 204 } 205 return r; 206 } 207 208 /* 209 * GEM ioctls. 210 */ 211 int radeon_gem_info_ioctl(struct drm_device *dev, void *data, 212 struct drm_file *filp) 213 { 214 struct radeon_device *rdev = dev->dev_private; 215 struct drm_radeon_gem_info *args = data; 216 struct ttm_mem_type_manager *man; 217 unsigned i; 218 219 man = &rdev->mman.bdev.man[TTM_PL_VRAM]; 220 221 args->vram_size = rdev->mc.real_vram_size; 222 args->vram_visible = (u64)man->size << PAGE_SHIFT; 223 if (rdev->stollen_vga_memory) 224 args->vram_visible -= radeon_bo_size(rdev->stollen_vga_memory); 225 args->vram_visible -= radeon_fbdev_total_size(rdev); 226 args->gart_size = rdev->mc.gtt_size - 4096 - RADEON_IB_POOL_SIZE*64*1024; 227 for(i = 0; i < RADEON_NUM_RINGS; ++i) 228 args->gart_size -= rdev->ring[i].ring_size; 229 return 0; 230 } 231 232 int radeon_gem_pread_ioctl(struct drm_device *dev, void *data, 233 struct drm_file *filp) 234 { 235 /* TODO: implement */ 236 DRM_ERROR("unimplemented %s\n", __func__); 237 return -ENOSYS; 238 } 239 240 int radeon_gem_pwrite_ioctl(struct drm_device *dev, void *data, 241 struct drm_file *filp) 242 { 243 /* TODO: implement */ 244 DRM_ERROR("unimplemented %s\n", __func__); 245 return -ENOSYS; 246 } 247 248 int radeon_gem_create_ioctl(struct drm_device *dev, void *data, 249 struct drm_file *filp) 250 { 251 struct radeon_device *rdev = dev->dev_private; 252 struct drm_radeon_gem_create *args = data; 253 struct drm_gem_object *gobj; 254 uint32_t handle; 255 int r; 256 257 lockmgr(&rdev->exclusive_lock, LK_SHARED); 258 /* create a gem object to contain this object in */ 259 args->size = roundup(args->size, PAGE_SIZE); 260 r = radeon_gem_object_create(rdev, args->size, args->alignment, 261 args->initial_domain, false, 262 false, &gobj); 263 if (r) { 264 if (r == -ERESTARTSYS) 265 r = -EINTR; 266 lockmgr(&rdev->exclusive_lock, LK_RELEASE); 267 r = radeon_gem_handle_lockup(rdev, r); 268 return r; 269 } 270 handle = 0; 271 r = drm_gem_handle_create(filp, gobj, &handle); 272 /* drop reference from allocate - handle holds it now */ 273 drm_gem_object_unreference_unlocked(gobj); 274 if (r) { 275 lockmgr(&rdev->exclusive_lock, LK_RELEASE); 276 r = radeon_gem_handle_lockup(rdev, r); 277 return r; 278 } 279 args->handle = handle; 280 lockmgr(&rdev->exclusive_lock, LK_RELEASE); 281 return 0; 282 } 283 284 int radeon_gem_set_domain_ioctl(struct drm_device *dev, void *data, 285 struct drm_file *filp) 286 { 287 /* transition the BO to a domain - 288 * just validate the BO into a certain domain */ 289 struct radeon_device *rdev = dev->dev_private; 290 struct drm_radeon_gem_set_domain *args = data; 291 struct drm_gem_object *gobj; 292 struct radeon_bo *robj; 293 int r; 294 295 /* for now if someone requests domain CPU - 296 * just make sure the buffer is finished with */ 297 lockmgr(&rdev->exclusive_lock, LK_SHARED); 298 299 /* just do a BO wait for now */ 300 gobj = drm_gem_object_lookup(dev, filp, args->handle); 301 if (gobj == NULL) { 302 lockmgr(&rdev->exclusive_lock, LK_RELEASE); 303 return -ENOENT; 304 } 305 robj = gem_to_radeon_bo(gobj); 306 307 r = radeon_gem_set_domain(gobj, args->read_domains, args->write_domain); 308 309 drm_gem_object_unreference_unlocked(gobj); 310 lockmgr(&rdev->exclusive_lock, LK_RELEASE); 311 r = radeon_gem_handle_lockup(robj->rdev, r); 312 return r; 313 } 314 315 int radeon_mode_dumb_mmap(struct drm_file *filp, 316 struct drm_device *dev, 317 uint32_t handle, uint64_t *offset_p) 318 { 319 struct drm_gem_object *gobj; 320 struct radeon_bo *robj; 321 322 gobj = drm_gem_object_lookup(dev, filp, handle); 323 if (gobj == NULL) { 324 return -ENOENT; 325 } 326 robj = gem_to_radeon_bo(gobj); 327 *offset_p = radeon_bo_mmap_offset(robj); 328 drm_gem_object_unreference_unlocked(gobj); 329 return 0; 330 } 331 332 int radeon_gem_mmap_ioctl(struct drm_device *dev, void *data, 333 struct drm_file *filp) 334 { 335 struct drm_radeon_gem_mmap *args = data; 336 337 return radeon_mode_dumb_mmap(filp, dev, args->handle, &args->addr_ptr); 338 } 339 340 int radeon_gem_busy_ioctl(struct drm_device *dev, void *data, 341 struct drm_file *filp) 342 { 343 struct radeon_device *rdev = dev->dev_private; 344 struct drm_radeon_gem_busy *args = data; 345 struct drm_gem_object *gobj; 346 struct radeon_bo *robj; 347 int r; 348 uint32_t cur_placement = 0; 349 350 gobj = drm_gem_object_lookup(dev, filp, args->handle); 351 if (gobj == NULL) { 352 return -ENOENT; 353 } 354 robj = gem_to_radeon_bo(gobj); 355 r = radeon_bo_wait(robj, &cur_placement, true); 356 switch (cur_placement) { 357 case TTM_PL_VRAM: 358 args->domain = RADEON_GEM_DOMAIN_VRAM; 359 break; 360 case TTM_PL_TT: 361 args->domain = RADEON_GEM_DOMAIN_GTT; 362 break; 363 case TTM_PL_SYSTEM: 364 args->domain = RADEON_GEM_DOMAIN_CPU; 365 default: 366 break; 367 } 368 drm_gem_object_unreference_unlocked(gobj); 369 r = radeon_gem_handle_lockup(rdev, r); 370 return r; 371 } 372 373 int radeon_gem_wait_idle_ioctl(struct drm_device *dev, void *data, 374 struct drm_file *filp) 375 { 376 struct radeon_device *rdev = dev->dev_private; 377 struct drm_radeon_gem_wait_idle *args = data; 378 struct drm_gem_object *gobj; 379 struct radeon_bo *robj; 380 int r; 381 382 gobj = drm_gem_object_lookup(dev, filp, args->handle); 383 if (gobj == NULL) { 384 return -ENOENT; 385 } 386 robj = gem_to_radeon_bo(gobj); 387 r = radeon_bo_wait(robj, NULL, false); 388 /* callback hw specific functions if any */ 389 if (rdev->asic->ioctl_wait_idle) 390 robj->rdev->asic->ioctl_wait_idle(rdev, robj); 391 drm_gem_object_unreference_unlocked(gobj); 392 if (r == -ERESTARTSYS) 393 r = -EINTR; 394 r = radeon_gem_handle_lockup(rdev, r); 395 return r; 396 } 397 398 int radeon_gem_set_tiling_ioctl(struct drm_device *dev, void *data, 399 struct drm_file *filp) 400 { 401 struct drm_radeon_gem_set_tiling *args = data; 402 struct drm_gem_object *gobj; 403 struct radeon_bo *robj; 404 int r = 0; 405 406 DRM_DEBUG("%d \n", args->handle); 407 gobj = drm_gem_object_lookup(dev, filp, args->handle); 408 if (gobj == NULL) 409 return -ENOENT; 410 robj = gem_to_radeon_bo(gobj); 411 r = radeon_bo_set_tiling_flags(robj, args->tiling_flags, args->pitch); 412 drm_gem_object_unreference_unlocked(gobj); 413 return r; 414 } 415 416 int radeon_gem_get_tiling_ioctl(struct drm_device *dev, void *data, 417 struct drm_file *filp) 418 { 419 struct drm_radeon_gem_get_tiling *args = data; 420 struct drm_gem_object *gobj; 421 struct radeon_bo *rbo; 422 int r = 0; 423 424 DRM_DEBUG("\n"); 425 gobj = drm_gem_object_lookup(dev, filp, args->handle); 426 if (gobj == NULL) 427 return -ENOENT; 428 rbo = gem_to_radeon_bo(gobj); 429 r = radeon_bo_reserve(rbo, false); 430 if (unlikely(r != 0)) 431 goto out; 432 radeon_bo_get_tiling_flags(rbo, &args->tiling_flags, &args->pitch); 433 radeon_bo_unreserve(rbo); 434 out: 435 drm_gem_object_unreference_unlocked(gobj); 436 return r; 437 } 438 439 int radeon_gem_va_ioctl(struct drm_device *dev, void *data, 440 struct drm_file *filp) 441 { 442 struct drm_radeon_gem_va *args = data; 443 struct drm_gem_object *gobj; 444 struct radeon_device *rdev = dev->dev_private; 445 struct radeon_fpriv *fpriv = filp->driver_priv; 446 struct radeon_bo *rbo; 447 struct radeon_bo_va *bo_va; 448 u32 invalid_flags; 449 int r = 0; 450 451 if (!rdev->vm_manager.enabled) { 452 args->operation = RADEON_VA_RESULT_ERROR; 453 return -ENOTTY; 454 } 455 456 /* !! DONT REMOVE !! 457 * We don't support vm_id yet, to be sure we don't have have broken 458 * userspace, reject anyone trying to use non 0 value thus moving 459 * forward we can use those fields without breaking existant userspace 460 */ 461 if (args->vm_id) { 462 args->operation = RADEON_VA_RESULT_ERROR; 463 return -EINVAL; 464 } 465 466 if (args->offset < RADEON_VA_RESERVED_SIZE) { 467 dev_err(dev->dev, 468 "offset 0x%lX is in reserved area 0x%X\n", 469 (unsigned long)args->offset, 470 RADEON_VA_RESERVED_SIZE); 471 args->operation = RADEON_VA_RESULT_ERROR; 472 return -EINVAL; 473 } 474 475 /* don't remove, we need to enforce userspace to set the snooped flag 476 * otherwise we will endup with broken userspace and we won't be able 477 * to enable this feature without adding new interface 478 */ 479 invalid_flags = RADEON_VM_PAGE_VALID | RADEON_VM_PAGE_SYSTEM; 480 if ((args->flags & invalid_flags)) { 481 dev_err(dev->dev, "invalid flags 0x%08X vs 0x%08X\n", 482 args->flags, invalid_flags); 483 args->operation = RADEON_VA_RESULT_ERROR; 484 return -EINVAL; 485 } 486 if (!(args->flags & RADEON_VM_PAGE_SNOOPED)) { 487 dev_err(dev->dev, "only supported snooped mapping for now\n"); 488 args->operation = RADEON_VA_RESULT_ERROR; 489 return -EINVAL; 490 } 491 492 switch (args->operation) { 493 case RADEON_VA_MAP: 494 case RADEON_VA_UNMAP: 495 break; 496 default: 497 dev_err(dev->dev, "unsupported operation %d\n", 498 args->operation); 499 args->operation = RADEON_VA_RESULT_ERROR; 500 return -EINVAL; 501 } 502 503 gobj = drm_gem_object_lookup(dev, filp, args->handle); 504 if (gobj == NULL) { 505 args->operation = RADEON_VA_RESULT_ERROR; 506 return -ENOENT; 507 } 508 rbo = gem_to_radeon_bo(gobj); 509 r = radeon_bo_reserve(rbo, false); 510 if (r) { 511 args->operation = RADEON_VA_RESULT_ERROR; 512 drm_gem_object_unreference_unlocked(gobj); 513 return r; 514 } 515 bo_va = radeon_vm_bo_find(&fpriv->vm, rbo); 516 if (!bo_va) { 517 args->operation = RADEON_VA_RESULT_ERROR; 518 drm_gem_object_unreference_unlocked(gobj); 519 return -ENOENT; 520 } 521 522 switch (args->operation) { 523 case RADEON_VA_MAP: 524 if (bo_va->soffset) { 525 args->operation = RADEON_VA_RESULT_VA_EXIST; 526 args->offset = bo_va->soffset; 527 goto out; 528 } 529 r = radeon_vm_bo_set_addr(rdev, bo_va, args->offset, args->flags); 530 break; 531 case RADEON_VA_UNMAP: 532 r = radeon_vm_bo_set_addr(rdev, bo_va, 0, 0); 533 break; 534 default: 535 break; 536 } 537 args->operation = RADEON_VA_RESULT_OK; 538 if (r) { 539 args->operation = RADEON_VA_RESULT_ERROR; 540 } 541 out: 542 radeon_bo_unreserve(rbo); 543 drm_gem_object_unreference_unlocked(gobj); 544 return r; 545 } 546 547 int radeon_mode_dumb_create(struct drm_file *file_priv, 548 struct drm_device *dev, 549 struct drm_mode_create_dumb *args) 550 { 551 struct radeon_device *rdev = dev->dev_private; 552 struct drm_gem_object *gobj; 553 uint32_t handle; 554 int r; 555 556 args->pitch = radeon_align_pitch(rdev, args->width, args->bpp, 0) * ((args->bpp + 1) / 8); 557 args->size = args->pitch * args->height; 558 args->size = ALIGN(args->size, PAGE_SIZE); 559 560 r = radeon_gem_object_create(rdev, args->size, 0, 561 RADEON_GEM_DOMAIN_VRAM, 562 false, ttm_bo_type_device, 563 &gobj); 564 if (r) 565 return -ENOMEM; 566 567 r = drm_gem_handle_create(file_priv, gobj, &handle); 568 /* drop reference from allocate - handle holds it now */ 569 drm_gem_object_unreference_unlocked(gobj); 570 if (r) { 571 return r; 572 } 573 args->handle = handle; 574 return 0; 575 } 576 577 int radeon_mode_dumb_destroy(struct drm_file *file_priv, 578 struct drm_device *dev, 579 uint32_t handle) 580 { 581 return drm_gem_handle_delete(file_priv, handle); 582 } 583 584 #if defined(CONFIG_DEBUG_FS) 585 static int radeon_debugfs_gem_info(struct seq_file *m, void *data) 586 { 587 struct drm_info_node *node = (struct drm_info_node *)m->private; 588 struct drm_device *dev = node->minor->dev; 589 struct radeon_device *rdev = dev->dev_private; 590 struct radeon_bo *rbo; 591 unsigned i = 0; 592 593 mutex_lock(&rdev->gem.mutex); 594 list_for_each_entry(rbo, &rdev->gem.objects, list) { 595 unsigned domain; 596 const char *placement; 597 598 domain = radeon_mem_type_to_domain(rbo->tbo.mem.mem_type); 599 switch (domain) { 600 case RADEON_GEM_DOMAIN_VRAM: 601 placement = "VRAM"; 602 break; 603 case RADEON_GEM_DOMAIN_GTT: 604 placement = " GTT"; 605 break; 606 case RADEON_GEM_DOMAIN_CPU: 607 default: 608 placement = " CPU"; 609 break; 610 } 611 seq_printf(m, "bo[0x%08x] %8ldkB %8ldMB %s pid %8ld\n", 612 i, radeon_bo_size(rbo) >> 10, radeon_bo_size(rbo) >> 20, 613 placement, (unsigned long)rbo->pid); 614 i++; 615 } 616 mutex_unlock(&rdev->gem.mutex); 617 return 0; 618 } 619 620 static struct drm_info_list radeon_debugfs_gem_list[] = { 621 {"radeon_gem_info", &radeon_debugfs_gem_info, 0, NULL}, 622 }; 623 #endif 624 625 int radeon_gem_debugfs_init(struct radeon_device *rdev) 626 { 627 #if defined(CONFIG_DEBUG_FS) 628 return radeon_debugfs_add_files(rdev, radeon_debugfs_gem_list, 1); 629 #endif 630 return 0; 631 } 632