xref: /dflybsd-src/sys/dev/drm/include/asm/io.h (revision 3f2dd94a569761201b5b0a18b2f697f97fe1b9dc)
14cdd475aSFrançois Tigeot /*
2046cdebcSFrançois Tigeot  * Copyright (c) 2014-2020 François Tigeot <ftigeot@wolfpond.org>
34cdd475aSFrançois Tigeot  * All rights reserved.
44cdd475aSFrançois Tigeot  *
54cdd475aSFrançois Tigeot  * Redistribution and use in source and binary forms, with or without
64cdd475aSFrançois Tigeot  * modification, are permitted provided that the following conditions
74cdd475aSFrançois Tigeot  * are met:
84cdd475aSFrançois Tigeot  * 1. Redistributions of source code must retain the above copyright
94cdd475aSFrançois Tigeot  *    notice unmodified, this list of conditions, and the following
104cdd475aSFrançois Tigeot  *    disclaimer.
114cdd475aSFrançois Tigeot  * 2. Redistributions in binary form must reproduce the above copyright
124cdd475aSFrançois Tigeot  *    notice, this list of conditions and the following disclaimer in the
134cdd475aSFrançois Tigeot  *    documentation and/or other materials provided with the distribution.
144cdd475aSFrançois Tigeot  *
154cdd475aSFrançois Tigeot  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
164cdd475aSFrançois Tigeot  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
174cdd475aSFrançois Tigeot  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
184cdd475aSFrançois Tigeot  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
194cdd475aSFrançois Tigeot  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
204cdd475aSFrançois Tigeot  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
214cdd475aSFrançois Tigeot  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
224cdd475aSFrançois Tigeot  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
234cdd475aSFrançois Tigeot  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
244cdd475aSFrançois Tigeot  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
254cdd475aSFrançois Tigeot  */
264cdd475aSFrançois Tigeot 
274cdd475aSFrançois Tigeot #ifndef _ASM_IO_H_
284cdd475aSFrançois Tigeot #define _ASM_IO_H_
294cdd475aSFrançois Tigeot 
304cdd475aSFrançois Tigeot #include <machine/pmap.h>
3124409b39SFrançois Tigeot #include <vm/pmap.h>
3247ad44e8SFrançois Tigeot #include <vm/vm.h>
334cdd475aSFrançois Tigeot 
348b1a6a38SFrançois Tigeot #include <asm/page.h>
356325d95aSFrançois Tigeot #include <linux/string.h>
366325d95aSFrançois Tigeot #include <linux/types.h>
376325d95aSFrançois Tigeot 
386325d95aSFrançois Tigeot #undef readb
396325d95aSFrançois Tigeot static inline u8
readb(const volatile void __iomem * addr)406325d95aSFrançois Tigeot readb(const volatile void __iomem *addr)
416325d95aSFrançois Tigeot {
426325d95aSFrançois Tigeot 	return *(const volatile u8*)addr;
436325d95aSFrançois Tigeot }
446325d95aSFrançois Tigeot 
456325d95aSFrançois Tigeot #undef readw
466325d95aSFrançois Tigeot static inline u16
readw(const volatile void __iomem * addr)476325d95aSFrançois Tigeot readw(const volatile void __iomem *addr)
486325d95aSFrançois Tigeot {
496325d95aSFrançois Tigeot 	return *(const volatile u16*)addr;
506325d95aSFrançois Tigeot }
516325d95aSFrançois Tigeot 
526325d95aSFrançois Tigeot #undef readl
536325d95aSFrançois Tigeot static inline u32
readl(const volatile void __iomem * addr)546325d95aSFrançois Tigeot readl(const volatile void __iomem *addr)
556325d95aSFrançois Tigeot {
566325d95aSFrançois Tigeot 	return *(const volatile u32*)addr;
576325d95aSFrançois Tigeot }
588b1a6a38SFrançois Tigeot 
59cdc70ef7SFrançois Tigeot #undef writeb
60cdc70ef7SFrançois Tigeot static inline void
writeb(u8 value,volatile void __iomem * addr)61cdc70ef7SFrançois Tigeot writeb(u8 value, volatile void __iomem *addr)
62cdc70ef7SFrançois Tigeot {
63cdc70ef7SFrançois Tigeot 	*(volatile uint8_t *)addr = value;
64cdc70ef7SFrançois Tigeot }
65cdc70ef7SFrançois Tigeot 
66cdc70ef7SFrançois Tigeot #undef writew
67cdc70ef7SFrançois Tigeot static inline void
writew(u16 value,volatile void __iomem * addr)68cdc70ef7SFrançois Tigeot writew(u16 value, volatile void __iomem *addr)
69cdc70ef7SFrançois Tigeot {
70cdc70ef7SFrançois Tigeot 	*(volatile uint16_t *)addr = value;
71cdc70ef7SFrançois Tigeot }
72cdc70ef7SFrançois Tigeot 
73cdc70ef7SFrançois Tigeot #undef writel
74cdc70ef7SFrançois Tigeot static inline void
writel(u32 value,volatile void __iomem * addr)75cdc70ef7SFrançois Tigeot writel(u32 value, volatile void __iomem *addr)
76cdc70ef7SFrançois Tigeot {
77cdc70ef7SFrançois Tigeot 	*(volatile uint32_t *)addr = value;
78cdc70ef7SFrançois Tigeot }
79cdc70ef7SFrançois Tigeot 
80a85cb24fSFrançois Tigeot #define writel_relaxed(v, a)	writel(v, a)
81a85cb24fSFrançois Tigeot 
82cdc70ef7SFrançois Tigeot #undef writeq
83cdc70ef7SFrançois Tigeot static inline void
writeq(u64 value,volatile void __iomem * addr)84cdc70ef7SFrançois Tigeot writeq(u64 value, volatile void __iomem *addr)
85cdc70ef7SFrançois Tigeot {
86cdc70ef7SFrançois Tigeot 	*(volatile uint64_t *)addr = value;
87cdc70ef7SFrançois Tigeot }
88cdc70ef7SFrançois Tigeot 
894cdd475aSFrançois Tigeot #define ioread8(addr)		*(volatile uint8_t *)((char *)addr)
904cdd475aSFrançois Tigeot #define ioread16(addr)		*(volatile uint16_t *)((char *)addr)
914cdd475aSFrançois Tigeot #define ioread32(addr)		*(volatile uint32_t *)((char *)addr)
924cdd475aSFrançois Tigeot 
93076b4d58SSascha Wildner #define iowrite8(data, addr)					\
94076b4d58SSascha Wildner 	do {							\
95076b4d58SSascha Wildner 		*(volatile uint8_t *)((char *)addr) = data;	\
96076b4d58SSascha Wildner 	} while (0)
97076b4d58SSascha Wildner 
98076b4d58SSascha Wildner #define iowrite16(data, addr)					\
99076b4d58SSascha Wildner 	do {							\
100076b4d58SSascha Wildner 		*(volatile uint16_t *)((char *)addr) = data;	\
101076b4d58SSascha Wildner 	} while (0)
102076b4d58SSascha Wildner 
103076b4d58SSascha Wildner #define iowrite32(data, addr)					\
104076b4d58SSascha Wildner 	do {							\
105076b4d58SSascha Wildner 		*(volatile uint32_t *)((char *)addr) = data;	\
106076b4d58SSascha Wildner 	} while (0)
1074cdd475aSFrançois Tigeot 
1083779d0eaSFrançois Tigeot #include <linux/vmalloc.h>
1093779d0eaSFrançois Tigeot 
110c6750c23SFrançois Tigeot /* ioremap function family: map bus addresses into CPU space */
11124409b39SFrançois Tigeot 
11224409b39SFrançois Tigeot struct iomap {
11324409b39SFrançois Tigeot 	vm_paddr_t paddr;
11424409b39SFrançois Tigeot 	int npages;
11524409b39SFrançois Tigeot 	void *pmap_addr;
11624409b39SFrançois Tigeot 	SLIST_ENTRY(iomap) im_iomaps;
11724409b39SFrançois Tigeot };
11824409b39SFrançois Tigeot 
1197c3d2bf2SFrançois Tigeot void __iomem *
1207c3d2bf2SFrançois Tigeot __ioremap_common(unsigned long phys_addr, unsigned long size, int cache_mode);
12124409b39SFrançois Tigeot 
1227c3d2bf2SFrançois Tigeot static inline void __iomem *
ioremap_nocache(resource_size_t phys_addr,unsigned long size)1237c3d2bf2SFrançois Tigeot ioremap_nocache(resource_size_t phys_addr, unsigned long size)
1244cdd475aSFrançois Tigeot {
1257c3d2bf2SFrançois Tigeot 	return __ioremap_common(phys_addr, size, PAT_UNCACHEABLE);
1264cdd475aSFrançois Tigeot }
1274cdd475aSFrançois Tigeot 
1287c3d2bf2SFrançois Tigeot static inline void __iomem *
ioremap(resource_size_t offset,unsigned long size)1297c3d2bf2SFrançois Tigeot ioremap(resource_size_t offset, unsigned long size)
130c6750c23SFrançois Tigeot {
131c6750c23SFrançois Tigeot 	return ioremap_nocache(offset, size);
132c6750c23SFrançois Tigeot }
133c6750c23SFrançois Tigeot 
1347c3d2bf2SFrançois Tigeot static inline void __iomem *
ioremap_wc(resource_size_t phys_addr,unsigned long size)1357c3d2bf2SFrançois Tigeot ioremap_wc(resource_size_t phys_addr, unsigned long size)
1367c3d2bf2SFrançois Tigeot {
1377c3d2bf2SFrançois Tigeot 	return __ioremap_common(phys_addr, size, PAT_WRITE_COMBINING);
1387c3d2bf2SFrançois Tigeot }
1397c3d2bf2SFrançois Tigeot 
140af25f163SFrançois Tigeot static inline void __iomem *
ioremap_wt(resource_size_t phys_addr,unsigned long size)141af25f163SFrançois Tigeot ioremap_wt(resource_size_t phys_addr, unsigned long size)
142af25f163SFrançois Tigeot {
143af25f163SFrançois Tigeot 	return __ioremap_common(phys_addr, size, PAT_WRITE_THROUGH);
144af25f163SFrançois Tigeot }
145af25f163SFrançois Tigeot 
14624409b39SFrançois Tigeot void iounmap(void __iomem *ptr);
14757e252bfSMichael Neumann 
148e3b9abb4Szrj /* XXX these should have volatile */
149e3b9abb4Szrj #define	memset_io(a, b, c)	memset((a), (b), (c))
150e3b9abb4Szrj #define	memcpy_fromio(a, b, c)	memcpy((a), (b), (c))
151e3b9abb4Szrj #define	memcpy_toio(a, b, c)	memcpy((a), (b), (c))
152e3b9abb4Szrj 
1535c3c99f3SFrançois Tigeot #define mmiowb cpu_sfence
1545c3c99f3SFrançois Tigeot 
155*3f2dd94aSFrançois Tigeot int arch_io_reserve_memtype_wc(resource_size_t start, resource_size_t size);
1563776dcfeSFrançois Tigeot 
1573776dcfeSFrançois Tigeot static inline void
arch_io_free_memtype_wc(resource_size_t start,resource_size_t size)1583776dcfeSFrançois Tigeot arch_io_free_memtype_wc(resource_size_t start, resource_size_t size)
1593776dcfeSFrançois Tigeot {
1603776dcfeSFrançois Tigeot }
1611dedbd3bSFrançois Tigeot 
162046cdebcSFrançois Tigeot #undef outb
163046cdebcSFrançois Tigeot static inline void
outb(u8 value,u_int port)164046cdebcSFrançois Tigeot outb(u8 value, u_int port)
165046cdebcSFrançois Tigeot {
166046cdebcSFrançois Tigeot 	outbv(port, value);
167046cdebcSFrançois Tigeot }
168046cdebcSFrançois Tigeot 
1694cdd475aSFrançois Tigeot #endif	/* _ASM_IO_H_ */
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