1 /* 2 * Copyright 2006 Dave Airlie <airlied@linux.ie> 3 * Copyright © 2006-2007 Intel Corporation 4 * Jesse Barnes <jesse.barnes@intel.com> 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a 7 * copy of this software and associated documentation files (the "Software"), 8 * to deal in the Software without restriction, including without limitation 9 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 10 * and/or sell copies of the Software, and to permit persons to whom the 11 * Software is furnished to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice (including the next 14 * paragraph) shall be included in all copies or substantial portions of the 15 * Software. 16 * 17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 22 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 23 * DEALINGS IN THE SOFTWARE. 24 * 25 * Authors: 26 * Eric Anholt <eric@anholt.net> 27 */ 28 #include <linux/i2c.h> 29 #include <linux/delay.h> 30 #include <linux/export.h> 31 #include <drm/drmP.h> 32 #include <drm/drm_crtc.h> 33 #include <drm/drm_edid.h> 34 #include "intel_drv.h" 35 #include <drm/i915_drm.h> 36 #include "i915_drv.h" 37 #include "intel_sdvo_regs.h" 38 39 #include <bus/iicbus/iic.h> 40 #include <bus/iicbus/iiconf.h> 41 #include "iicbus_if.h" 42 43 #define SDVO_TMDS_MASK (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1) 44 #define SDVO_RGB_MASK (SDVO_OUTPUT_RGB0 | SDVO_OUTPUT_RGB1) 45 #define SDVO_LVDS_MASK (SDVO_OUTPUT_LVDS0 | SDVO_OUTPUT_LVDS1) 46 #define SDVO_TV_MASK (SDVO_OUTPUT_CVBS0 | SDVO_OUTPUT_SVID0 | SDVO_OUTPUT_YPRPB0) 47 48 #define SDVO_OUTPUT_MASK (SDVO_TMDS_MASK | SDVO_RGB_MASK | SDVO_LVDS_MASK |\ 49 SDVO_TV_MASK) 50 51 #define IS_TV(c) (c->output_flag & SDVO_TV_MASK) 52 #define IS_TMDS(c) (c->output_flag & SDVO_TMDS_MASK) 53 #define IS_LVDS(c) (c->output_flag & SDVO_LVDS_MASK) 54 #define IS_TV_OR_LVDS(c) (c->output_flag & (SDVO_TV_MASK | SDVO_LVDS_MASK)) 55 #define IS_DIGITAL(c) (c->output_flag & (SDVO_TMDS_MASK | SDVO_LVDS_MASK)) 56 57 58 static const char *tv_format_names[] = { 59 "NTSC_M" , "NTSC_J" , "NTSC_443", 60 "PAL_B" , "PAL_D" , "PAL_G" , 61 "PAL_H" , "PAL_I" , "PAL_M" , 62 "PAL_N" , "PAL_NC" , "PAL_60" , 63 "SECAM_B" , "SECAM_D" , "SECAM_G" , 64 "SECAM_K" , "SECAM_K1", "SECAM_L" , 65 "SECAM_60" 66 }; 67 68 #define TV_FORMAT_NUM (sizeof(tv_format_names) / sizeof(*tv_format_names)) 69 70 struct intel_sdvo { 71 struct intel_encoder base; 72 73 struct device *i2c; 74 u8 slave_addr; 75 76 device_t ddc_iic_bus, ddc; 77 78 /* Register for the SDVO device: SDVOB or SDVOC */ 79 uint32_t sdvo_reg; 80 81 /* Active outputs controlled by this SDVO output */ 82 uint16_t controlled_output; 83 84 /* 85 * Capabilities of the SDVO device returned by 86 * intel_sdvo_get_capabilities() 87 */ 88 struct intel_sdvo_caps caps; 89 90 /* Pixel clock limitations reported by the SDVO device, in kHz */ 91 int pixel_clock_min, pixel_clock_max; 92 93 /* 94 * For multiple function SDVO device, 95 * this is for current attached outputs. 96 */ 97 uint16_t attached_output; 98 99 /* 100 * Hotplug activation bits for this device 101 */ 102 uint16_t hotplug_active; 103 104 /** 105 * This is used to select the color range of RBG outputs in HDMI mode. 106 * It is only valid when using TMDS encoding and 8 bit per color mode. 107 */ 108 uint32_t color_range; 109 bool color_range_auto; 110 111 /** 112 * This is set if we're going to treat the device as TV-out. 113 * 114 * While we have these nice friendly flags for output types that ought 115 * to decide this for us, the S-Video output on our HDMI+S-Video card 116 * shows up as RGB1 (VGA). 117 */ 118 bool is_tv; 119 120 /* On different gens SDVOB is at different places. */ 121 bool is_sdvob; 122 123 /* This is for current tv format name */ 124 int tv_format_index; 125 126 /** 127 * This is set if we treat the device as HDMI, instead of DVI. 128 */ 129 bool is_hdmi; 130 bool has_hdmi_monitor; 131 bool has_hdmi_audio; 132 bool rgb_quant_range_selectable; 133 134 /** 135 * This is set if we detect output of sdvo device as LVDS and 136 * have a valid fixed mode to use with the panel. 137 */ 138 bool is_lvds; 139 140 /** 141 * This is sdvo fixed pannel mode pointer 142 */ 143 struct drm_display_mode *sdvo_lvds_fixed_mode; 144 145 /* DDC bus used by this SDVO encoder */ 146 uint8_t ddc_bus; 147 148 /* 149 * the sdvo flag gets lost in round trip: dtd->adjusted_mode->dtd 150 */ 151 uint8_t dtd_sdvo_flags; 152 }; 153 154 struct intel_sdvo_connector { 155 struct intel_connector base; 156 157 /* Mark the type of connector */ 158 uint16_t output_flag; 159 160 enum hdmi_force_audio force_audio; 161 162 /* This contains all current supported TV format */ 163 u8 tv_format_supported[TV_FORMAT_NUM]; 164 int format_supported_num; 165 struct drm_property *tv_format; 166 167 /* add the property for the SDVO-TV */ 168 struct drm_property *left; 169 struct drm_property *right; 170 struct drm_property *top; 171 struct drm_property *bottom; 172 struct drm_property *hpos; 173 struct drm_property *vpos; 174 struct drm_property *contrast; 175 struct drm_property *saturation; 176 struct drm_property *hue; 177 struct drm_property *sharpness; 178 struct drm_property *flicker_filter; 179 struct drm_property *flicker_filter_adaptive; 180 struct drm_property *flicker_filter_2d; 181 struct drm_property *tv_chroma_filter; 182 struct drm_property *tv_luma_filter; 183 struct drm_property *dot_crawl; 184 185 /* add the property for the SDVO-TV/LVDS */ 186 struct drm_property *brightness; 187 188 /* Add variable to record current setting for the above property */ 189 u32 left_margin, right_margin, top_margin, bottom_margin; 190 191 /* this is to get the range of margin.*/ 192 u32 max_hscan, max_vscan; 193 u32 max_hpos, cur_hpos; 194 u32 max_vpos, cur_vpos; 195 u32 cur_brightness, max_brightness; 196 u32 cur_contrast, max_contrast; 197 u32 cur_saturation, max_saturation; 198 u32 cur_hue, max_hue; 199 u32 cur_sharpness, max_sharpness; 200 u32 cur_flicker_filter, max_flicker_filter; 201 u32 cur_flicker_filter_adaptive, max_flicker_filter_adaptive; 202 u32 cur_flicker_filter_2d, max_flicker_filter_2d; 203 u32 cur_tv_chroma_filter, max_tv_chroma_filter; 204 u32 cur_tv_luma_filter, max_tv_luma_filter; 205 u32 cur_dot_crawl, max_dot_crawl; 206 }; 207 208 static struct intel_sdvo *to_sdvo(struct intel_encoder *encoder) 209 { 210 return container_of(encoder, struct intel_sdvo, base); 211 } 212 213 static struct intel_sdvo *intel_attached_sdvo(struct drm_connector *connector) 214 { 215 return to_sdvo(intel_attached_encoder(connector)); 216 } 217 218 static struct intel_sdvo_connector *to_intel_sdvo_connector(struct drm_connector *connector) 219 { 220 return container_of(to_intel_connector(connector), struct intel_sdvo_connector, base); 221 } 222 223 static bool 224 intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags); 225 static bool 226 intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo, 227 struct intel_sdvo_connector *intel_sdvo_connector, 228 int type); 229 static bool 230 intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo, 231 struct intel_sdvo_connector *intel_sdvo_connector); 232 233 /** 234 * Writes the SDVOB or SDVOC with the given value, but always writes both 235 * SDVOB and SDVOC to work around apparent hardware issues (according to 236 * comments in the BIOS). 237 */ 238 static void intel_sdvo_write_sdvox(struct intel_sdvo *intel_sdvo, u32 val) 239 { 240 struct drm_device *dev = intel_sdvo->base.base.dev; 241 struct drm_i915_private *dev_priv = dev->dev_private; 242 u32 bval = val, cval = val; 243 int i; 244 245 if (intel_sdvo->sdvo_reg == PCH_SDVOB) { 246 I915_WRITE(intel_sdvo->sdvo_reg, val); 247 I915_READ(intel_sdvo->sdvo_reg); 248 return; 249 } 250 251 if (intel_sdvo->sdvo_reg == GEN3_SDVOB) 252 cval = I915_READ(GEN3_SDVOC); 253 else 254 bval = I915_READ(GEN3_SDVOB); 255 256 /* 257 * Write the registers twice for luck. Sometimes, 258 * writing them only once doesn't appear to 'stick'. 259 * The BIOS does this too. Yay, magic 260 */ 261 for (i = 0; i < 2; i++) 262 { 263 I915_WRITE(GEN3_SDVOB, bval); 264 I915_READ(GEN3_SDVOB); 265 I915_WRITE(GEN3_SDVOC, cval); 266 I915_READ(GEN3_SDVOC); 267 } 268 } 269 270 static bool intel_sdvo_read_byte(struct intel_sdvo *intel_sdvo, u8 addr, u8 *ch) 271 { 272 struct i2c_msg msgs[] = { 273 { 274 .slave = intel_sdvo->slave_addr << 1, 275 .flags = 0, 276 .len = 1, 277 .buf = &addr, 278 }, 279 { 280 .slave = intel_sdvo->slave_addr << 1, 281 .flags = I2C_M_RD, 282 .len = 1, 283 .buf = ch, 284 } 285 }; 286 int ret; 287 288 if ((ret = iicbus_transfer(intel_sdvo->i2c, msgs, 2)) == 0) 289 return true; 290 291 DRM_DEBUG_KMS("i2c transfer returned %d\n", ret); 292 return false; 293 } 294 295 #define SDVO_CMD_NAME_ENTRY(cmd) {cmd, #cmd} 296 /** Mapping of command numbers to names, for debug output */ 297 static const struct _sdvo_cmd_name { 298 u8 cmd; 299 const char *name; 300 } sdvo_cmd_names[] = { 301 SDVO_CMD_NAME_ENTRY(SDVO_CMD_RESET), 302 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DEVICE_CAPS), 303 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FIRMWARE_REV), 304 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TRAINED_INPUTS), 305 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_OUTPUTS), 306 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_OUTPUTS), 307 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_IN_OUT_MAP), 308 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_IN_OUT_MAP), 309 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ATTACHED_DISPLAYS), 310 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HOT_PLUG_SUPPORT), 311 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_HOT_PLUG), 312 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_HOT_PLUG), 313 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INTERRUPT_EVENT_SOURCE), 314 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_INPUT), 315 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_OUTPUT), 316 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART1), 317 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART2), 318 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1), 319 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART2), 320 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1), 321 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART1), 322 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART2), 323 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART1), 324 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART2), 325 SDVO_CMD_NAME_ENTRY(SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING), 326 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1), 327 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2), 328 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE), 329 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_PIXEL_CLOCK_RANGE), 330 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_CLOCK_RATE_MULTS), 331 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CLOCK_RATE_MULT), 332 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CLOCK_RATE_MULT), 333 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_TV_FORMATS), 334 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_FORMAT), 335 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_FORMAT), 336 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_POWER_STATES), 337 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_POWER_STATE), 338 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODER_POWER_STATE), 339 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DISPLAY_POWER_STATE), 340 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTROL_BUS_SWITCH), 341 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT), 342 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SCALED_HDTV_RESOLUTION_SUPPORT), 343 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS), 344 345 /* Add the op code for SDVO enhancements */ 346 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HPOS), 347 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HPOS), 348 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HPOS), 349 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_VPOS), 350 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_VPOS), 351 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_VPOS), 352 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SATURATION), 353 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SATURATION), 354 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SATURATION), 355 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HUE), 356 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HUE), 357 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HUE), 358 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_CONTRAST), 359 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CONTRAST), 360 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTRAST), 361 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_BRIGHTNESS), 362 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_BRIGHTNESS), 363 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_BRIGHTNESS), 364 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_H), 365 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_H), 366 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_H), 367 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_V), 368 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_V), 369 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_V), 370 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER), 371 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER), 372 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER), 373 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_ADAPTIVE), 374 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_ADAPTIVE), 375 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_ADAPTIVE), 376 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_2D), 377 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_2D), 378 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_2D), 379 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SHARPNESS), 380 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SHARPNESS), 381 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SHARPNESS), 382 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DOT_CRAWL), 383 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DOT_CRAWL), 384 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_CHROMA_FILTER), 385 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_CHROMA_FILTER), 386 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_CHROMA_FILTER), 387 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_LUMA_FILTER), 388 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_LUMA_FILTER), 389 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_LUMA_FILTER), 390 391 /* HDMI op code */ 392 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPP_ENCODE), 393 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ENCODE), 394 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODE), 395 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_PIXEL_REPLI), 396 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PIXEL_REPLI), 397 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY_CAP), 398 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_COLORIMETRY), 399 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY), 400 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_ENCRYPT_PREFER), 401 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_AUDIO_STAT), 402 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_STAT), 403 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INDEX), 404 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_INDEX), 405 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INFO), 406 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_AV_SPLIT), 407 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_AV_SPLIT), 408 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_TXRATE), 409 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_TXRATE), 410 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_DATA), 411 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_DATA), 412 }; 413 414 #define SDVO_NAME(svdo) ((svdo)->is_sdvob ? "SDVOB" : "SDVOC") 415 416 static void intel_sdvo_debug_write(struct intel_sdvo *intel_sdvo, u8 cmd, 417 const void *args, int args_len) 418 { 419 int i, pos = 0; 420 #define BUF_LEN 256 421 char buffer[BUF_LEN]; 422 423 #define BUF_PRINT(args...) \ 424 pos += ksnprintf(buffer + pos, max_t(int, BUF_LEN - pos, 0), args) 425 426 427 for (i = 0; i < args_len; i++) { 428 BUF_PRINT("%02X ", ((const u8 *)args)[i]); 429 } 430 for (; i < 8; i++) { 431 BUF_PRINT(" "); 432 } 433 for (i = 0; i < ARRAY_SIZE(sdvo_cmd_names); i++) { 434 if (cmd == sdvo_cmd_names[i].cmd) { 435 BUF_PRINT("(%s)", sdvo_cmd_names[i].name); 436 break; 437 } 438 } 439 if (i == ARRAY_SIZE(sdvo_cmd_names)) { 440 BUF_PRINT("(%02X)", cmd); 441 } 442 BUG_ON(pos >= BUF_LEN - 1); 443 #undef BUF_PRINT 444 #undef BUF_LEN 445 446 DRM_DEBUG_KMS("%s: W: %02X %s\n", SDVO_NAME(intel_sdvo), cmd, buffer); 447 } 448 449 static const char *cmd_status_names[] = { 450 "Power on", 451 "Success", 452 "Not supported", 453 "Invalid arg", 454 "Pending", 455 "Target not specified", 456 "Scaling not supported" 457 }; 458 459 static bool intel_sdvo_write_cmd(struct intel_sdvo *intel_sdvo, u8 cmd, 460 const void *args, int args_len) 461 { 462 u8 *buf, status; 463 struct iic_msg msgs[args_len + 3]; 464 int i, ret = true; 465 466 /* Would be simpler to allocate both in one go ? */ 467 buf = kzalloc(args_len * 2 + 2, GFP_KERNEL); 468 if (!buf) 469 return false; 470 471 intel_sdvo_debug_write(intel_sdvo, cmd, args, args_len); 472 473 for (i = 0; i < args_len; i++) { 474 msgs[i].slave = intel_sdvo->slave_addr << 1; 475 msgs[i].flags = 0; 476 msgs[i].len = 2; 477 msgs[i].buf = buf + 2 *i; 478 buf[2*i + 0] = SDVO_I2C_ARG_0 - i; 479 buf[2*i + 1] = ((const u8*)args)[i]; 480 } 481 msgs[i].slave = intel_sdvo->slave_addr << 1; 482 msgs[i].flags = 0; 483 msgs[i].len = 2; 484 msgs[i].buf = buf + 2*i; 485 buf[2*i + 0] = SDVO_I2C_OPCODE; 486 buf[2*i + 1] = cmd; 487 488 /* the following two are to read the response */ 489 status = SDVO_I2C_CMD_STATUS; 490 msgs[i+1].slave = intel_sdvo->slave_addr << 1; 491 msgs[i+1].flags = 0; 492 msgs[i+1].len = 1; 493 msgs[i+1].buf = &status; 494 495 msgs[i+2].slave = intel_sdvo->slave_addr << 1; 496 msgs[i+2].flags = I2C_M_RD; 497 msgs[i+2].len = 1; 498 msgs[i+2].buf = &status; 499 500 ret = iicbus_transfer(intel_sdvo->i2c, msgs, i+3); 501 if (ret != 0) { 502 DRM_DEBUG_KMS("I2c transfer returned %d\n", ret); 503 ret = false; 504 goto out; 505 } 506 #if 0 507 if (ret != i+3) { 508 /* failure in I2C transfer */ 509 DRM_DEBUG_KMS("I2c transfer returned %d/%d\n", ret, i+3); 510 ret = false; 511 } 512 #endif 513 514 out: 515 kfree(buf); 516 return ret; 517 } 518 519 static bool intel_sdvo_read_response(struct intel_sdvo *intel_sdvo, 520 void *response, int response_len) 521 { 522 u8 retry = 15; /* 5 quick checks, followed by 10 long checks */ 523 u8 status; 524 int i, pos = 0; 525 #define BUF_LEN 256 526 char buffer[BUF_LEN]; 527 528 529 /* 530 * The documentation states that all commands will be 531 * processed within 15µs, and that we need only poll 532 * the status byte a maximum of 3 times in order for the 533 * command to be complete. 534 * 535 * Check 5 times in case the hardware failed to read the docs. 536 * 537 * Also beware that the first response by many devices is to 538 * reply PENDING and stall for time. TVs are notorious for 539 * requiring longer than specified to complete their replies. 540 * Originally (in the DDX long ago), the delay was only ever 15ms 541 * with an additional delay of 30ms applied for TVs added later after 542 * many experiments. To accommodate both sets of delays, we do a 543 * sequence of slow checks if the device is falling behind and fails 544 * to reply within 5*15µs. 545 */ 546 if (!intel_sdvo_read_byte(intel_sdvo, 547 SDVO_I2C_CMD_STATUS, 548 &status)) 549 goto log_fail; 550 551 while ((status == SDVO_CMD_STATUS_PENDING || 552 status == SDVO_CMD_STATUS_TARGET_NOT_SPECIFIED) && --retry) { 553 if (retry < 10) 554 msleep(15); 555 else 556 udelay(15); 557 558 if (!intel_sdvo_read_byte(intel_sdvo, 559 SDVO_I2C_CMD_STATUS, 560 &status)) 561 goto log_fail; 562 } 563 564 #define BUF_PRINT(args...) \ 565 pos += ksnprintf(buffer + pos, max_t(int, BUF_LEN - pos, 0), args) 566 567 if (status <= SDVO_CMD_STATUS_SCALING_NOT_SUPP) 568 BUF_PRINT("(%s)", cmd_status_names[status]); 569 else 570 BUF_PRINT("(??? %d)", status); 571 572 if (status != SDVO_CMD_STATUS_SUCCESS) 573 goto log_fail; 574 575 /* Read the command response */ 576 for (i = 0; i < response_len; i++) { 577 if (!intel_sdvo_read_byte(intel_sdvo, 578 SDVO_I2C_RETURN_0 + i, 579 &((u8 *)response)[i])) 580 goto log_fail; 581 BUF_PRINT(" %02X", ((u8 *)response)[i]); 582 } 583 BUG_ON(pos >= BUF_LEN - 1); 584 #undef BUF_PRINT 585 #undef BUF_LEN 586 587 DRM_DEBUG_KMS("%s: R: %s\n", SDVO_NAME(intel_sdvo), buffer); 588 return true; 589 590 log_fail: 591 DRM_DEBUG_KMS("%s: R: ... failed\n", SDVO_NAME(intel_sdvo)); 592 return false; 593 } 594 595 static int intel_sdvo_get_pixel_multiplier(struct drm_display_mode *mode) 596 { 597 if (mode->clock >= 100000) 598 return 1; 599 else if (mode->clock >= 50000) 600 return 2; 601 else 602 return 4; 603 } 604 605 static bool intel_sdvo_set_control_bus_switch(struct intel_sdvo *intel_sdvo, 606 u8 ddc_bus) 607 { 608 /* This must be the immediately preceding write before the i2c xfer */ 609 return intel_sdvo_write_cmd(intel_sdvo, 610 SDVO_CMD_SET_CONTROL_BUS_SWITCH, 611 &ddc_bus, 1); 612 } 613 614 static bool intel_sdvo_set_value(struct intel_sdvo *intel_sdvo, u8 cmd, const void *data, int len) 615 { 616 if (!intel_sdvo_write_cmd(intel_sdvo, cmd, data, len)) 617 return false; 618 619 return intel_sdvo_read_response(intel_sdvo, NULL, 0); 620 } 621 622 static bool 623 intel_sdvo_get_value(struct intel_sdvo *intel_sdvo, u8 cmd, void *value, int len) 624 { 625 if (!intel_sdvo_write_cmd(intel_sdvo, cmd, NULL, 0)) 626 return false; 627 628 return intel_sdvo_read_response(intel_sdvo, value, len); 629 } 630 631 static bool intel_sdvo_set_target_input(struct intel_sdvo *intel_sdvo) 632 { 633 struct intel_sdvo_set_target_input_args targets = {0}; 634 return intel_sdvo_set_value(intel_sdvo, 635 SDVO_CMD_SET_TARGET_INPUT, 636 &targets, sizeof(targets)); 637 } 638 639 /** 640 * Return whether each input is trained. 641 * 642 * This function is making an assumption about the layout of the response, 643 * which should be checked against the docs. 644 */ 645 static bool intel_sdvo_get_trained_inputs(struct intel_sdvo *intel_sdvo, bool *input_1, bool *input_2) 646 { 647 struct intel_sdvo_get_trained_inputs_response response; 648 649 BUILD_BUG_ON(sizeof(response) != 1); 650 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_TRAINED_INPUTS, 651 &response, sizeof(response))) 652 return false; 653 654 *input_1 = response.input0_trained; 655 *input_2 = response.input1_trained; 656 return true; 657 } 658 659 static bool intel_sdvo_set_active_outputs(struct intel_sdvo *intel_sdvo, 660 u16 outputs) 661 { 662 return intel_sdvo_set_value(intel_sdvo, 663 SDVO_CMD_SET_ACTIVE_OUTPUTS, 664 &outputs, sizeof(outputs)); 665 } 666 667 static bool intel_sdvo_get_active_outputs(struct intel_sdvo *intel_sdvo, 668 u16 *outputs) 669 { 670 return intel_sdvo_get_value(intel_sdvo, 671 SDVO_CMD_GET_ACTIVE_OUTPUTS, 672 outputs, sizeof(*outputs)); 673 } 674 675 static bool intel_sdvo_set_encoder_power_state(struct intel_sdvo *intel_sdvo, 676 int mode) 677 { 678 u8 state = SDVO_ENCODER_STATE_ON; 679 680 switch (mode) { 681 case DRM_MODE_DPMS_ON: 682 state = SDVO_ENCODER_STATE_ON; 683 break; 684 case DRM_MODE_DPMS_STANDBY: 685 state = SDVO_ENCODER_STATE_STANDBY; 686 break; 687 case DRM_MODE_DPMS_SUSPEND: 688 state = SDVO_ENCODER_STATE_SUSPEND; 689 break; 690 case DRM_MODE_DPMS_OFF: 691 state = SDVO_ENCODER_STATE_OFF; 692 break; 693 } 694 695 return intel_sdvo_set_value(intel_sdvo, 696 SDVO_CMD_SET_ENCODER_POWER_STATE, &state, sizeof(state)); 697 } 698 699 static bool intel_sdvo_get_input_pixel_clock_range(struct intel_sdvo *intel_sdvo, 700 int *clock_min, 701 int *clock_max) 702 { 703 struct intel_sdvo_pixel_clock_range clocks; 704 705 BUILD_BUG_ON(sizeof(clocks) != 4); 706 if (!intel_sdvo_get_value(intel_sdvo, 707 SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE, 708 &clocks, sizeof(clocks))) 709 return false; 710 711 /* Convert the values from units of 10 kHz to kHz. */ 712 *clock_min = clocks.min * 10; 713 *clock_max = clocks.max * 10; 714 return true; 715 } 716 717 static bool intel_sdvo_set_target_output(struct intel_sdvo *intel_sdvo, 718 u16 outputs) 719 { 720 return intel_sdvo_set_value(intel_sdvo, 721 SDVO_CMD_SET_TARGET_OUTPUT, 722 &outputs, sizeof(outputs)); 723 } 724 725 static bool intel_sdvo_set_timing(struct intel_sdvo *intel_sdvo, u8 cmd, 726 struct intel_sdvo_dtd *dtd) 727 { 728 return intel_sdvo_set_value(intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) && 729 intel_sdvo_set_value(intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2)); 730 } 731 732 static bool intel_sdvo_get_timing(struct intel_sdvo *intel_sdvo, u8 cmd, 733 struct intel_sdvo_dtd *dtd) 734 { 735 return intel_sdvo_get_value(intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) && 736 intel_sdvo_get_value(intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2)); 737 } 738 739 static bool intel_sdvo_set_input_timing(struct intel_sdvo *intel_sdvo, 740 struct intel_sdvo_dtd *dtd) 741 { 742 return intel_sdvo_set_timing(intel_sdvo, 743 SDVO_CMD_SET_INPUT_TIMINGS_PART1, dtd); 744 } 745 746 static bool intel_sdvo_set_output_timing(struct intel_sdvo *intel_sdvo, 747 struct intel_sdvo_dtd *dtd) 748 { 749 return intel_sdvo_set_timing(intel_sdvo, 750 SDVO_CMD_SET_OUTPUT_TIMINGS_PART1, dtd); 751 } 752 753 static bool intel_sdvo_get_input_timing(struct intel_sdvo *intel_sdvo, 754 struct intel_sdvo_dtd *dtd) 755 { 756 return intel_sdvo_get_timing(intel_sdvo, 757 SDVO_CMD_GET_INPUT_TIMINGS_PART1, dtd); 758 } 759 760 static bool 761 intel_sdvo_create_preferred_input_timing(struct intel_sdvo *intel_sdvo, 762 uint16_t clock, 763 uint16_t width, 764 uint16_t height) 765 { 766 struct intel_sdvo_preferred_input_timing_args args; 767 768 memset(&args, 0, sizeof(args)); 769 args.clock = clock; 770 args.width = width; 771 args.height = height; 772 args.interlace = 0; 773 774 if (intel_sdvo->is_lvds && 775 (intel_sdvo->sdvo_lvds_fixed_mode->hdisplay != width || 776 intel_sdvo->sdvo_lvds_fixed_mode->vdisplay != height)) 777 args.scaled = 1; 778 779 return intel_sdvo_set_value(intel_sdvo, 780 SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING, 781 &args, sizeof(args)); 782 } 783 784 static bool intel_sdvo_get_preferred_input_timing(struct intel_sdvo *intel_sdvo, 785 struct intel_sdvo_dtd *dtd) 786 { 787 BUILD_BUG_ON(sizeof(dtd->part1) != 8); 788 BUILD_BUG_ON(sizeof(dtd->part2) != 8); 789 return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1, 790 &dtd->part1, sizeof(dtd->part1)) && 791 intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2, 792 &dtd->part2, sizeof(dtd->part2)); 793 } 794 795 static bool intel_sdvo_set_clock_rate_mult(struct intel_sdvo *intel_sdvo, u8 val) 796 { 797 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_CLOCK_RATE_MULT, &val, 1); 798 } 799 800 static void intel_sdvo_get_dtd_from_mode(struct intel_sdvo_dtd *dtd, 801 const struct drm_display_mode *mode) 802 { 803 uint16_t width, height; 804 uint16_t h_blank_len, h_sync_len, v_blank_len, v_sync_len; 805 uint16_t h_sync_offset, v_sync_offset; 806 int mode_clock; 807 808 memset(dtd, 0, sizeof(*dtd)); 809 810 width = mode->hdisplay; 811 height = mode->vdisplay; 812 813 /* do some mode translations */ 814 h_blank_len = mode->htotal - mode->hdisplay; 815 h_sync_len = mode->hsync_end - mode->hsync_start; 816 817 v_blank_len = mode->vtotal - mode->vdisplay; 818 v_sync_len = mode->vsync_end - mode->vsync_start; 819 820 h_sync_offset = mode->hsync_start - mode->hdisplay; 821 v_sync_offset = mode->vsync_start - mode->vdisplay; 822 823 mode_clock = mode->clock; 824 mode_clock /= 10; 825 dtd->part1.clock = mode_clock; 826 827 dtd->part1.h_active = width & 0xff; 828 dtd->part1.h_blank = h_blank_len & 0xff; 829 dtd->part1.h_high = (((width >> 8) & 0xf) << 4) | 830 ((h_blank_len >> 8) & 0xf); 831 dtd->part1.v_active = height & 0xff; 832 dtd->part1.v_blank = v_blank_len & 0xff; 833 dtd->part1.v_high = (((height >> 8) & 0xf) << 4) | 834 ((v_blank_len >> 8) & 0xf); 835 836 dtd->part2.h_sync_off = h_sync_offset & 0xff; 837 dtd->part2.h_sync_width = h_sync_len & 0xff; 838 dtd->part2.v_sync_off_width = (v_sync_offset & 0xf) << 4 | 839 (v_sync_len & 0xf); 840 dtd->part2.sync_off_width_high = ((h_sync_offset & 0x300) >> 2) | 841 ((h_sync_len & 0x300) >> 4) | ((v_sync_offset & 0x30) >> 2) | 842 ((v_sync_len & 0x30) >> 4); 843 844 dtd->part2.dtd_flags = 0x18; 845 if (mode->flags & DRM_MODE_FLAG_INTERLACE) 846 dtd->part2.dtd_flags |= DTD_FLAG_INTERLACE; 847 if (mode->flags & DRM_MODE_FLAG_PHSYNC) 848 dtd->part2.dtd_flags |= DTD_FLAG_HSYNC_POSITIVE; 849 if (mode->flags & DRM_MODE_FLAG_PVSYNC) 850 dtd->part2.dtd_flags |= DTD_FLAG_VSYNC_POSITIVE; 851 852 dtd->part2.v_sync_off_high = v_sync_offset & 0xc0; 853 } 854 855 static void intel_sdvo_get_mode_from_dtd(struct drm_display_mode *pmode, 856 const struct intel_sdvo_dtd *dtd) 857 { 858 struct drm_display_mode mode = {}; 859 860 mode.hdisplay = dtd->part1.h_active; 861 mode.hdisplay += ((dtd->part1.h_high >> 4) & 0x0f) << 8; 862 mode.hsync_start = mode.hdisplay + dtd->part2.h_sync_off; 863 mode.hsync_start += (dtd->part2.sync_off_width_high & 0xc0) << 2; 864 mode.hsync_end = mode.hsync_start + dtd->part2.h_sync_width; 865 mode.hsync_end += (dtd->part2.sync_off_width_high & 0x30) << 4; 866 mode.htotal = mode.hdisplay + dtd->part1.h_blank; 867 mode.htotal += (dtd->part1.h_high & 0xf) << 8; 868 869 mode.vdisplay = dtd->part1.v_active; 870 mode.vdisplay += ((dtd->part1.v_high >> 4) & 0x0f) << 8; 871 mode.vsync_start = mode.vdisplay; 872 mode.vsync_start += (dtd->part2.v_sync_off_width >> 4) & 0xf; 873 mode.vsync_start += (dtd->part2.sync_off_width_high & 0x0c) << 2; 874 mode.vsync_start += dtd->part2.v_sync_off_high & 0xc0; 875 mode.vsync_end = mode.vsync_start + 876 (dtd->part2.v_sync_off_width & 0xf); 877 mode.vsync_end += (dtd->part2.sync_off_width_high & 0x3) << 4; 878 mode.vtotal = mode.vdisplay + dtd->part1.v_blank; 879 mode.vtotal += (dtd->part1.v_high & 0xf) << 8; 880 881 mode.clock = dtd->part1.clock * 10; 882 883 if (dtd->part2.dtd_flags & DTD_FLAG_INTERLACE) 884 mode.flags |= DRM_MODE_FLAG_INTERLACE; 885 if (dtd->part2.dtd_flags & DTD_FLAG_HSYNC_POSITIVE) 886 mode.flags |= DRM_MODE_FLAG_PHSYNC; 887 else 888 mode.flags |= DRM_MODE_FLAG_NHSYNC; 889 if (dtd->part2.dtd_flags & DTD_FLAG_VSYNC_POSITIVE) 890 mode.flags |= DRM_MODE_FLAG_PVSYNC; 891 else 892 mode.flags |= DRM_MODE_FLAG_NVSYNC; 893 894 drm_mode_set_crtcinfo(&mode, 0); 895 896 drm_mode_copy(pmode, &mode); 897 } 898 899 static bool intel_sdvo_check_supp_encode(struct intel_sdvo *intel_sdvo) 900 { 901 struct intel_sdvo_encode encode; 902 903 BUILD_BUG_ON(sizeof(encode) != 2); 904 return intel_sdvo_get_value(intel_sdvo, 905 SDVO_CMD_GET_SUPP_ENCODE, 906 &encode, sizeof(encode)); 907 } 908 909 static bool intel_sdvo_set_encode(struct intel_sdvo *intel_sdvo, 910 uint8_t mode) 911 { 912 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_ENCODE, &mode, 1); 913 } 914 915 static bool intel_sdvo_set_colorimetry(struct intel_sdvo *intel_sdvo, 916 uint8_t mode) 917 { 918 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_COLORIMETRY, &mode, 1); 919 } 920 921 #if 0 922 static void intel_sdvo_dump_hdmi_buf(struct intel_sdvo *intel_sdvo) 923 { 924 int i, j; 925 uint8_t set_buf_index[2]; 926 uint8_t av_split; 927 uint8_t buf_size; 928 uint8_t buf[48]; 929 uint8_t *pos; 930 931 intel_sdvo_get_value(encoder, SDVO_CMD_GET_HBUF_AV_SPLIT, &av_split, 1); 932 933 for (i = 0; i <= av_split; i++) { 934 set_buf_index[0] = i; set_buf_index[1] = 0; 935 intel_sdvo_write_cmd(encoder, SDVO_CMD_SET_HBUF_INDEX, 936 set_buf_index, 2); 937 intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_INFO, NULL, 0); 938 intel_sdvo_read_response(encoder, &buf_size, 1); 939 940 pos = buf; 941 for (j = 0; j <= buf_size; j += 8) { 942 intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_DATA, 943 NULL, 0); 944 intel_sdvo_read_response(encoder, pos, 8); 945 pos += 8; 946 } 947 } 948 } 949 #endif 950 951 static bool intel_sdvo_write_infoframe(struct intel_sdvo *intel_sdvo, 952 unsigned if_index, uint8_t tx_rate, 953 const uint8_t *data, unsigned length) 954 { 955 uint8_t set_buf_index[2] = { if_index, 0 }; 956 uint8_t hbuf_size, tmp[8]; 957 int i; 958 959 if (!intel_sdvo_set_value(intel_sdvo, 960 SDVO_CMD_SET_HBUF_INDEX, 961 set_buf_index, 2)) 962 return false; 963 964 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HBUF_INFO, 965 &hbuf_size, 1)) 966 return false; 967 968 /* Buffer size is 0 based, hooray! */ 969 hbuf_size++; 970 971 DRM_DEBUG_KMS("writing sdvo hbuf: %i, hbuf_size %i, hbuf_size: %i\n", 972 if_index, length, hbuf_size); 973 974 for (i = 0; i < hbuf_size; i += 8) { 975 memset(tmp, 0, 8); 976 if (i < length) 977 memcpy(tmp, data + i, min_t(unsigned, 8, length - i)); 978 979 if (!intel_sdvo_set_value(intel_sdvo, 980 SDVO_CMD_SET_HBUF_DATA, 981 tmp, 8)) 982 return false; 983 } 984 985 return intel_sdvo_set_value(intel_sdvo, 986 SDVO_CMD_SET_HBUF_TXRATE, 987 &tx_rate, 1); 988 } 989 990 static bool intel_sdvo_set_avi_infoframe(struct intel_sdvo *intel_sdvo, 991 const struct drm_display_mode *adjusted_mode) 992 { 993 uint8_t sdvo_data[HDMI_INFOFRAME_SIZE(AVI)]; 994 struct drm_crtc *crtc = intel_sdvo->base.base.crtc; 995 struct intel_crtc *intel_crtc = to_intel_crtc(crtc); 996 union hdmi_infoframe frame; 997 int ret; 998 ssize_t len; 999 1000 ret = drm_hdmi_avi_infoframe_from_display_mode(&frame.avi, 1001 adjusted_mode); 1002 if (ret < 0) { 1003 DRM_ERROR("couldn't fill AVI infoframe\n"); 1004 return false; 1005 } 1006 1007 if (intel_sdvo->rgb_quant_range_selectable) { 1008 if (intel_crtc->config.limited_color_range) 1009 frame.avi.quantization_range = 1010 HDMI_QUANTIZATION_RANGE_LIMITED; 1011 else 1012 frame.avi.quantization_range = 1013 HDMI_QUANTIZATION_RANGE_FULL; 1014 } 1015 1016 len = hdmi_infoframe_pack(&frame, sdvo_data, sizeof(sdvo_data)); 1017 if (len < 0) 1018 return false; 1019 1020 return intel_sdvo_write_infoframe(intel_sdvo, SDVO_HBUF_INDEX_AVI_IF, 1021 SDVO_HBUF_TX_VSYNC, 1022 sdvo_data, sizeof(sdvo_data)); 1023 } 1024 1025 static bool intel_sdvo_set_tv_format(struct intel_sdvo *intel_sdvo) 1026 { 1027 struct intel_sdvo_tv_format format; 1028 uint32_t format_map; 1029 1030 format_map = 1 << intel_sdvo->tv_format_index; 1031 memset(&format, 0, sizeof(format)); 1032 memcpy(&format, &format_map, min(sizeof(format), sizeof(format_map))); 1033 1034 BUILD_BUG_ON(sizeof(format) != 6); 1035 return intel_sdvo_set_value(intel_sdvo, 1036 SDVO_CMD_SET_TV_FORMAT, 1037 &format, sizeof(format)); 1038 } 1039 1040 static bool 1041 intel_sdvo_set_output_timings_from_mode(struct intel_sdvo *intel_sdvo, 1042 const struct drm_display_mode *mode) 1043 { 1044 struct intel_sdvo_dtd output_dtd; 1045 1046 if (!intel_sdvo_set_target_output(intel_sdvo, 1047 intel_sdvo->attached_output)) 1048 return false; 1049 1050 intel_sdvo_get_dtd_from_mode(&output_dtd, mode); 1051 if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd)) 1052 return false; 1053 1054 return true; 1055 } 1056 1057 /* Asks the sdvo controller for the preferred input mode given the output mode. 1058 * Unfortunately we have to set up the full output mode to do that. */ 1059 static bool 1060 intel_sdvo_get_preferred_input_mode(struct intel_sdvo *intel_sdvo, 1061 const struct drm_display_mode *mode, 1062 struct drm_display_mode *adjusted_mode) 1063 { 1064 struct intel_sdvo_dtd input_dtd; 1065 1066 /* Reset the input timing to the screen. Assume always input 0. */ 1067 if (!intel_sdvo_set_target_input(intel_sdvo)) 1068 return false; 1069 1070 if (!intel_sdvo_create_preferred_input_timing(intel_sdvo, 1071 mode->clock / 10, 1072 mode->hdisplay, 1073 mode->vdisplay)) 1074 return false; 1075 1076 if (!intel_sdvo_get_preferred_input_timing(intel_sdvo, 1077 &input_dtd)) 1078 return false; 1079 1080 intel_sdvo_get_mode_from_dtd(adjusted_mode, &input_dtd); 1081 intel_sdvo->dtd_sdvo_flags = input_dtd.part2.sdvo_flags; 1082 1083 return true; 1084 } 1085 1086 static void i9xx_adjust_sdvo_tv_clock(struct intel_crtc_config *pipe_config) 1087 { 1088 unsigned dotclock = pipe_config->port_clock; 1089 struct dpll *clock = &pipe_config->dpll; 1090 1091 /* SDVO TV has fixed PLL values depend on its clock range, 1092 this mirrors vbios setting. */ 1093 if (dotclock >= 100000 && dotclock < 140500) { 1094 clock->p1 = 2; 1095 clock->p2 = 10; 1096 clock->n = 3; 1097 clock->m1 = 16; 1098 clock->m2 = 8; 1099 } else if (dotclock >= 140500 && dotclock <= 200000) { 1100 clock->p1 = 1; 1101 clock->p2 = 10; 1102 clock->n = 6; 1103 clock->m1 = 12; 1104 clock->m2 = 8; 1105 } else { 1106 WARN(1, "SDVO TV clock out of range: %i\n", dotclock); 1107 } 1108 1109 pipe_config->clock_set = true; 1110 } 1111 1112 static bool intel_sdvo_compute_config(struct intel_encoder *encoder, 1113 struct intel_crtc_config *pipe_config) 1114 { 1115 struct intel_sdvo *intel_sdvo = to_sdvo(encoder); 1116 struct drm_display_mode *adjusted_mode = &pipe_config->adjusted_mode; 1117 struct drm_display_mode *mode = &pipe_config->requested_mode; 1118 1119 DRM_DEBUG_KMS("forcing bpc to 8 for SDVO\n"); 1120 pipe_config->pipe_bpp = 8*3; 1121 1122 if (HAS_PCH_SPLIT(encoder->base.dev)) 1123 pipe_config->has_pch_encoder = true; 1124 1125 /* We need to construct preferred input timings based on our 1126 * output timings. To do that, we have to set the output 1127 * timings, even though this isn't really the right place in 1128 * the sequence to do it. Oh well. 1129 */ 1130 if (intel_sdvo->is_tv) { 1131 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo, mode)) 1132 return false; 1133 1134 (void) intel_sdvo_get_preferred_input_mode(intel_sdvo, 1135 mode, 1136 adjusted_mode); 1137 pipe_config->sdvo_tv_clock = true; 1138 } else if (intel_sdvo->is_lvds) { 1139 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo, 1140 intel_sdvo->sdvo_lvds_fixed_mode)) 1141 return false; 1142 1143 (void) intel_sdvo_get_preferred_input_mode(intel_sdvo, 1144 mode, 1145 adjusted_mode); 1146 } 1147 1148 /* Make the CRTC code factor in the SDVO pixel multiplier. The 1149 * SDVO device will factor out the multiplier during mode_set. 1150 */ 1151 pipe_config->pixel_multiplier = 1152 intel_sdvo_get_pixel_multiplier(adjusted_mode); 1153 1154 if (intel_sdvo->color_range_auto) { 1155 /* See CEA-861-E - 5.1 Default Encoding Parameters */ 1156 /* FIXME: This bit is only valid when using TMDS encoding and 8 1157 * bit per color mode. */ 1158 if (intel_sdvo->has_hdmi_monitor && 1159 drm_match_cea_mode(adjusted_mode) > 1) 1160 intel_sdvo->color_range = HDMI_COLOR_RANGE_16_235; 1161 else 1162 intel_sdvo->color_range = 0; 1163 } 1164 1165 if (intel_sdvo->color_range) 1166 pipe_config->limited_color_range = true; 1167 1168 /* Clock computation needs to happen after pixel multiplier. */ 1169 if (intel_sdvo->is_tv) 1170 i9xx_adjust_sdvo_tv_clock(pipe_config); 1171 1172 return true; 1173 } 1174 1175 static void intel_sdvo_mode_set(struct intel_encoder *intel_encoder) 1176 { 1177 struct drm_device *dev = intel_encoder->base.dev; 1178 struct drm_i915_private *dev_priv = dev->dev_private; 1179 struct intel_crtc *crtc = to_intel_crtc(intel_encoder->base.crtc); 1180 struct drm_display_mode *adjusted_mode = 1181 &crtc->config.adjusted_mode; 1182 struct drm_display_mode *mode = &crtc->config.requested_mode; 1183 struct intel_sdvo *intel_sdvo = to_sdvo(intel_encoder); 1184 u32 sdvox; 1185 struct intel_sdvo_in_out_map in_out; 1186 struct intel_sdvo_dtd input_dtd, output_dtd; 1187 int rate; 1188 1189 if (!mode) 1190 return; 1191 1192 /* First, set the input mapping for the first input to our controlled 1193 * output. This is only correct if we're a single-input device, in 1194 * which case the first input is the output from the appropriate SDVO 1195 * channel on the motherboard. In a two-input device, the first input 1196 * will be SDVOB and the second SDVOC. 1197 */ 1198 in_out.in0 = intel_sdvo->attached_output; 1199 in_out.in1 = 0; 1200 1201 intel_sdvo_set_value(intel_sdvo, 1202 SDVO_CMD_SET_IN_OUT_MAP, 1203 &in_out, sizeof(in_out)); 1204 1205 /* Set the output timings to the screen */ 1206 if (!intel_sdvo_set_target_output(intel_sdvo, 1207 intel_sdvo->attached_output)) 1208 return; 1209 1210 /* lvds has a special fixed output timing. */ 1211 if (intel_sdvo->is_lvds) 1212 intel_sdvo_get_dtd_from_mode(&output_dtd, 1213 intel_sdvo->sdvo_lvds_fixed_mode); 1214 else 1215 intel_sdvo_get_dtd_from_mode(&output_dtd, mode); 1216 if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd)) 1217 DRM_INFO("Setting output timings on %s failed\n", 1218 SDVO_NAME(intel_sdvo)); 1219 1220 /* Set the input timing to the screen. Assume always input 0. */ 1221 if (!intel_sdvo_set_target_input(intel_sdvo)) 1222 return; 1223 1224 if (intel_sdvo->has_hdmi_monitor) { 1225 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_HDMI); 1226 intel_sdvo_set_colorimetry(intel_sdvo, 1227 SDVO_COLORIMETRY_RGB256); 1228 intel_sdvo_set_avi_infoframe(intel_sdvo, adjusted_mode); 1229 } else 1230 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_DVI); 1231 1232 if (intel_sdvo->is_tv && 1233 !intel_sdvo_set_tv_format(intel_sdvo)) 1234 return; 1235 1236 intel_sdvo_get_dtd_from_mode(&input_dtd, adjusted_mode); 1237 1238 if (intel_sdvo->is_tv || intel_sdvo->is_lvds) 1239 input_dtd.part2.sdvo_flags = intel_sdvo->dtd_sdvo_flags; 1240 if (!intel_sdvo_set_input_timing(intel_sdvo, &input_dtd)) 1241 DRM_INFO("Setting input timings on %s failed\n", 1242 SDVO_NAME(intel_sdvo)); 1243 1244 switch (crtc->config.pixel_multiplier) { 1245 default: 1246 WARN(1, "unknown pixel mutlipler specified\n"); 1247 case 1: rate = SDVO_CLOCK_RATE_MULT_1X; break; 1248 case 2: rate = SDVO_CLOCK_RATE_MULT_2X; break; 1249 case 4: rate = SDVO_CLOCK_RATE_MULT_4X; break; 1250 } 1251 if (!intel_sdvo_set_clock_rate_mult(intel_sdvo, rate)) 1252 return; 1253 1254 /* Set the SDVO control regs. */ 1255 if (INTEL_INFO(dev)->gen >= 4) { 1256 /* The real mode polarity is set by the SDVO commands, using 1257 * struct intel_sdvo_dtd. */ 1258 sdvox = SDVO_VSYNC_ACTIVE_HIGH | SDVO_HSYNC_ACTIVE_HIGH; 1259 if (!HAS_PCH_SPLIT(dev) && intel_sdvo->is_hdmi) 1260 sdvox |= intel_sdvo->color_range; 1261 if (INTEL_INFO(dev)->gen < 5) 1262 sdvox |= SDVO_BORDER_ENABLE; 1263 } else { 1264 sdvox = I915_READ(intel_sdvo->sdvo_reg); 1265 switch (intel_sdvo->sdvo_reg) { 1266 case GEN3_SDVOB: 1267 sdvox &= SDVOB_PRESERVE_MASK; 1268 break; 1269 case GEN3_SDVOC: 1270 sdvox &= SDVOC_PRESERVE_MASK; 1271 break; 1272 } 1273 sdvox |= (9 << 19) | SDVO_BORDER_ENABLE; 1274 } 1275 1276 if (INTEL_PCH_TYPE(dev) >= PCH_CPT) 1277 sdvox |= SDVO_PIPE_SEL_CPT(crtc->pipe); 1278 else 1279 sdvox |= SDVO_PIPE_SEL(crtc->pipe); 1280 1281 if (intel_sdvo->has_hdmi_audio) 1282 sdvox |= SDVO_AUDIO_ENABLE; 1283 1284 if (INTEL_INFO(dev)->gen >= 4) { 1285 /* done in crtc_mode_set as the dpll_md reg must be written early */ 1286 } else if (IS_I945G(dev) || IS_I945GM(dev) || IS_G33(dev)) { 1287 /* done in crtc_mode_set as it lives inside the dpll register */ 1288 } else { 1289 sdvox |= (crtc->config.pixel_multiplier - 1) 1290 << SDVO_PORT_MULTIPLY_SHIFT; 1291 } 1292 1293 if (input_dtd.part2.sdvo_flags & SDVO_NEED_TO_STALL && 1294 INTEL_INFO(dev)->gen < 5) 1295 sdvox |= SDVO_STALL_SELECT; 1296 intel_sdvo_write_sdvox(intel_sdvo, sdvox); 1297 } 1298 1299 static bool intel_sdvo_connector_get_hw_state(struct intel_connector *connector) 1300 { 1301 struct intel_sdvo_connector *intel_sdvo_connector = 1302 to_intel_sdvo_connector(&connector->base); 1303 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(&connector->base); 1304 u16 active_outputs = 0; 1305 1306 intel_sdvo_get_active_outputs(intel_sdvo, &active_outputs); 1307 1308 if (active_outputs & intel_sdvo_connector->output_flag) 1309 return true; 1310 else 1311 return false; 1312 } 1313 1314 static bool intel_sdvo_get_hw_state(struct intel_encoder *encoder, 1315 enum i915_pipe *pipe) 1316 { 1317 struct drm_device *dev = encoder->base.dev; 1318 struct drm_i915_private *dev_priv = dev->dev_private; 1319 struct intel_sdvo *intel_sdvo = to_sdvo(encoder); 1320 u16 active_outputs = 0; 1321 u32 tmp; 1322 1323 tmp = I915_READ(intel_sdvo->sdvo_reg); 1324 intel_sdvo_get_active_outputs(intel_sdvo, &active_outputs); 1325 1326 if (!(tmp & SDVO_ENABLE) && (active_outputs == 0)) 1327 return false; 1328 1329 if (HAS_PCH_CPT(dev)) 1330 *pipe = PORT_TO_PIPE_CPT(tmp); 1331 else 1332 *pipe = PORT_TO_PIPE(tmp); 1333 1334 return true; 1335 } 1336 1337 static void intel_sdvo_get_config(struct intel_encoder *encoder, 1338 struct intel_crtc_config *pipe_config) 1339 { 1340 struct drm_device *dev = encoder->base.dev; 1341 struct drm_i915_private *dev_priv = dev->dev_private; 1342 struct intel_sdvo *intel_sdvo = to_sdvo(encoder); 1343 struct intel_sdvo_dtd dtd; 1344 int encoder_pixel_multiplier = 0; 1345 int dotclock; 1346 u32 flags = 0, sdvox; 1347 u8 val; 1348 bool ret; 1349 1350 ret = intel_sdvo_get_input_timing(intel_sdvo, &dtd); 1351 if (!ret) { 1352 /* Some sdvo encoders are not spec compliant and don't 1353 * implement the mandatory get_timings function. */ 1354 DRM_DEBUG_DRIVER("failed to retrieve SDVO DTD\n"); 1355 pipe_config->quirks |= PIPE_CONFIG_QUIRK_MODE_SYNC_FLAGS; 1356 } else { 1357 if (dtd.part2.dtd_flags & DTD_FLAG_HSYNC_POSITIVE) 1358 flags |= DRM_MODE_FLAG_PHSYNC; 1359 else 1360 flags |= DRM_MODE_FLAG_NHSYNC; 1361 1362 if (dtd.part2.dtd_flags & DTD_FLAG_VSYNC_POSITIVE) 1363 flags |= DRM_MODE_FLAG_PVSYNC; 1364 else 1365 flags |= DRM_MODE_FLAG_NVSYNC; 1366 } 1367 1368 pipe_config->adjusted_mode.flags |= flags; 1369 1370 /* 1371 * pixel multiplier readout is tricky: Only on i915g/gm it is stored in 1372 * the sdvo port register, on all other platforms it is part of the dpll 1373 * state. Since the general pipe state readout happens before the 1374 * encoder->get_config we so already have a valid pixel multplier on all 1375 * other platfroms. 1376 */ 1377 if (IS_I915G(dev) || IS_I915GM(dev)) { 1378 sdvox = I915_READ(intel_sdvo->sdvo_reg); 1379 pipe_config->pixel_multiplier = 1380 ((sdvox & SDVO_PORT_MULTIPLY_MASK) 1381 >> SDVO_PORT_MULTIPLY_SHIFT) + 1; 1382 } 1383 1384 dotclock = pipe_config->port_clock / pipe_config->pixel_multiplier; 1385 1386 if (HAS_PCH_SPLIT(dev)) 1387 ironlake_check_encoder_dotclock(pipe_config, dotclock); 1388 1389 pipe_config->adjusted_mode.crtc_clock = dotclock; 1390 1391 /* Cross check the port pixel multiplier with the sdvo encoder state. */ 1392 if (intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_CLOCK_RATE_MULT, 1393 &val, 1)) { 1394 switch (val) { 1395 case SDVO_CLOCK_RATE_MULT_1X: 1396 encoder_pixel_multiplier = 1; 1397 break; 1398 case SDVO_CLOCK_RATE_MULT_2X: 1399 encoder_pixel_multiplier = 2; 1400 break; 1401 case SDVO_CLOCK_RATE_MULT_4X: 1402 encoder_pixel_multiplier = 4; 1403 break; 1404 } 1405 } 1406 1407 WARN(encoder_pixel_multiplier != pipe_config->pixel_multiplier, 1408 "SDVO pixel multiplier mismatch, port: %i, encoder: %i\n", 1409 pipe_config->pixel_multiplier, encoder_pixel_multiplier); 1410 } 1411 1412 static void intel_disable_sdvo(struct intel_encoder *encoder) 1413 { 1414 struct drm_i915_private *dev_priv = encoder->base.dev->dev_private; 1415 struct intel_sdvo *intel_sdvo = to_sdvo(encoder); 1416 u32 temp; 1417 1418 intel_sdvo_set_active_outputs(intel_sdvo, 0); 1419 if (0) 1420 intel_sdvo_set_encoder_power_state(intel_sdvo, 1421 DRM_MODE_DPMS_OFF); 1422 1423 temp = I915_READ(intel_sdvo->sdvo_reg); 1424 if ((temp & SDVO_ENABLE) != 0) { 1425 /* HW workaround for IBX, we need to move the port to 1426 * transcoder A before disabling it. */ 1427 if (HAS_PCH_IBX(encoder->base.dev)) { 1428 struct drm_crtc *crtc = encoder->base.crtc; 1429 int pipe = crtc ? to_intel_crtc(crtc)->pipe : -1; 1430 1431 if (temp & SDVO_PIPE_B_SELECT) { 1432 temp &= ~SDVO_PIPE_B_SELECT; 1433 I915_WRITE(intel_sdvo->sdvo_reg, temp); 1434 POSTING_READ(intel_sdvo->sdvo_reg); 1435 1436 /* Again we need to write this twice. */ 1437 I915_WRITE(intel_sdvo->sdvo_reg, temp); 1438 POSTING_READ(intel_sdvo->sdvo_reg); 1439 1440 /* Transcoder selection bits only update 1441 * effectively on vblank. */ 1442 if (crtc) 1443 intel_wait_for_vblank(encoder->base.dev, pipe); 1444 else 1445 msleep(50); 1446 } 1447 } 1448 1449 intel_sdvo_write_sdvox(intel_sdvo, temp & ~SDVO_ENABLE); 1450 } 1451 } 1452 1453 static void intel_enable_sdvo(struct intel_encoder *encoder) 1454 { 1455 struct drm_device *dev = encoder->base.dev; 1456 struct drm_i915_private *dev_priv = dev->dev_private; 1457 struct intel_sdvo *intel_sdvo = to_sdvo(encoder); 1458 struct intel_crtc *intel_crtc = to_intel_crtc(encoder->base.crtc); 1459 u32 temp; 1460 bool input1, input2; 1461 int i; 1462 u8 status; 1463 1464 temp = I915_READ(intel_sdvo->sdvo_reg); 1465 if ((temp & SDVO_ENABLE) == 0) { 1466 /* HW workaround for IBX, we need to move the port 1467 * to transcoder A before disabling it, so restore it here. */ 1468 if (HAS_PCH_IBX(dev)) 1469 temp |= SDVO_PIPE_SEL(intel_crtc->pipe); 1470 1471 intel_sdvo_write_sdvox(intel_sdvo, temp | SDVO_ENABLE); 1472 } 1473 for (i = 0; i < 2; i++) 1474 intel_wait_for_vblank(dev, intel_crtc->pipe); 1475 1476 status = intel_sdvo_get_trained_inputs(intel_sdvo, &input1, &input2); 1477 /* Warn if the device reported failure to sync. 1478 * A lot of SDVO devices fail to notify of sync, but it's 1479 * a given it the status is a success, we succeeded. 1480 */ 1481 if (status == SDVO_CMD_STATUS_SUCCESS && !input1) { 1482 DRM_DEBUG_KMS("First %s output reported failure to " 1483 "sync\n", SDVO_NAME(intel_sdvo)); 1484 } 1485 1486 if (0) 1487 intel_sdvo_set_encoder_power_state(intel_sdvo, 1488 DRM_MODE_DPMS_ON); 1489 intel_sdvo_set_active_outputs(intel_sdvo, intel_sdvo->attached_output); 1490 } 1491 1492 /* Special dpms function to support cloning between dvo/sdvo/crt. */ 1493 static void intel_sdvo_dpms(struct drm_connector *connector, int mode) 1494 { 1495 struct drm_crtc *crtc; 1496 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector); 1497 1498 /* dvo supports only 2 dpms states. */ 1499 if (mode != DRM_MODE_DPMS_ON) 1500 mode = DRM_MODE_DPMS_OFF; 1501 1502 if (mode == connector->dpms) 1503 return; 1504 1505 connector->dpms = mode; 1506 1507 /* Only need to change hw state when actually enabled */ 1508 crtc = intel_sdvo->base.base.crtc; 1509 if (!crtc) { 1510 intel_sdvo->base.connectors_active = false; 1511 return; 1512 } 1513 1514 /* We set active outputs manually below in case pipe dpms doesn't change 1515 * due to cloning. */ 1516 if (mode != DRM_MODE_DPMS_ON) { 1517 intel_sdvo_set_active_outputs(intel_sdvo, 0); 1518 if (0) 1519 intel_sdvo_set_encoder_power_state(intel_sdvo, mode); 1520 1521 intel_sdvo->base.connectors_active = false; 1522 1523 intel_crtc_update_dpms(crtc); 1524 } else { 1525 intel_sdvo->base.connectors_active = true; 1526 1527 intel_crtc_update_dpms(crtc); 1528 1529 if (0) 1530 intel_sdvo_set_encoder_power_state(intel_sdvo, mode); 1531 intel_sdvo_set_active_outputs(intel_sdvo, intel_sdvo->attached_output); 1532 } 1533 1534 intel_modeset_check_state(connector->dev); 1535 } 1536 1537 static enum drm_mode_status 1538 intel_sdvo_mode_valid(struct drm_connector *connector, 1539 struct drm_display_mode *mode) 1540 { 1541 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector); 1542 1543 if (mode->flags & DRM_MODE_FLAG_DBLSCAN) 1544 return MODE_NO_DBLESCAN; 1545 1546 if (intel_sdvo->pixel_clock_min > mode->clock) 1547 return MODE_CLOCK_LOW; 1548 1549 if (intel_sdvo->pixel_clock_max < mode->clock) 1550 return MODE_CLOCK_HIGH; 1551 1552 if (intel_sdvo->is_lvds) { 1553 if (mode->hdisplay > intel_sdvo->sdvo_lvds_fixed_mode->hdisplay) 1554 return MODE_PANEL; 1555 1556 if (mode->vdisplay > intel_sdvo->sdvo_lvds_fixed_mode->vdisplay) 1557 return MODE_PANEL; 1558 } 1559 1560 return MODE_OK; 1561 } 1562 1563 static bool intel_sdvo_get_capabilities(struct intel_sdvo *intel_sdvo, struct intel_sdvo_caps *caps) 1564 { 1565 BUILD_BUG_ON(sizeof(*caps) != 8); 1566 if (!intel_sdvo_get_value(intel_sdvo, 1567 SDVO_CMD_GET_DEVICE_CAPS, 1568 caps, sizeof(*caps))) 1569 return false; 1570 1571 DRM_DEBUG_KMS("SDVO capabilities:\n" 1572 " vendor_id: %d\n" 1573 " device_id: %d\n" 1574 " device_rev_id: %d\n" 1575 " sdvo_version_major: %d\n" 1576 " sdvo_version_minor: %d\n" 1577 " sdvo_inputs_mask: %d\n" 1578 " smooth_scaling: %d\n" 1579 " sharp_scaling: %d\n" 1580 " up_scaling: %d\n" 1581 " down_scaling: %d\n" 1582 " stall_support: %d\n" 1583 " output_flags: %d\n", 1584 caps->vendor_id, 1585 caps->device_id, 1586 caps->device_rev_id, 1587 caps->sdvo_version_major, 1588 caps->sdvo_version_minor, 1589 caps->sdvo_inputs_mask, 1590 caps->smooth_scaling, 1591 caps->sharp_scaling, 1592 caps->up_scaling, 1593 caps->down_scaling, 1594 caps->stall_support, 1595 caps->output_flags); 1596 1597 return true; 1598 } 1599 1600 static uint16_t intel_sdvo_get_hotplug_support(struct intel_sdvo *intel_sdvo) 1601 { 1602 struct drm_device *dev = intel_sdvo->base.base.dev; 1603 uint16_t hotplug; 1604 1605 /* HW Erratum: SDVO Hotplug is broken on all i945G chips, there's noise 1606 * on the line. */ 1607 if (IS_I945G(dev) || IS_I945GM(dev)) 1608 return 0; 1609 1610 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HOT_PLUG_SUPPORT, 1611 &hotplug, sizeof(hotplug))) 1612 return 0; 1613 1614 return hotplug; 1615 } 1616 1617 static void intel_sdvo_enable_hotplug(struct intel_encoder *encoder) 1618 { 1619 struct intel_sdvo *intel_sdvo = to_sdvo(encoder); 1620 1621 intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_ACTIVE_HOT_PLUG, 1622 &intel_sdvo->hotplug_active, 2); 1623 } 1624 1625 static bool 1626 intel_sdvo_multifunc_encoder(struct intel_sdvo *intel_sdvo) 1627 { 1628 /* Is there more than one type of output? */ 1629 return hweight16(intel_sdvo->caps.output_flags) > 1; 1630 } 1631 1632 static struct edid * 1633 intel_sdvo_get_edid(struct drm_connector *connector) 1634 { 1635 struct intel_sdvo *sdvo = intel_attached_sdvo(connector); 1636 return drm_get_edid(connector, sdvo->ddc); 1637 } 1638 1639 /* Mac mini hack -- use the same DDC as the analog connector */ 1640 static struct edid * 1641 intel_sdvo_get_analog_edid(struct drm_connector *connector) 1642 { 1643 struct drm_i915_private *dev_priv = connector->dev->dev_private; 1644 1645 return drm_get_edid(connector, 1646 intel_gmbus_get_adapter(dev_priv, 1647 dev_priv->vbt.crt_ddc_pin)); 1648 } 1649 1650 static enum drm_connector_status 1651 intel_sdvo_tmds_sink_detect(struct drm_connector *connector) 1652 { 1653 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector); 1654 enum drm_connector_status status; 1655 struct edid *edid; 1656 1657 edid = intel_sdvo_get_edid(connector); 1658 1659 if (edid == NULL && intel_sdvo_multifunc_encoder(intel_sdvo)) { 1660 u8 ddc, saved_ddc = intel_sdvo->ddc_bus; 1661 1662 /* 1663 * Don't use the 1 as the argument of DDC bus switch to get 1664 * the EDID. It is used for SDVO SPD ROM. 1665 */ 1666 for (ddc = intel_sdvo->ddc_bus >> 1; ddc > 1; ddc >>= 1) { 1667 intel_sdvo->ddc_bus = ddc; 1668 edid = intel_sdvo_get_edid(connector); 1669 if (edid) 1670 break; 1671 } 1672 /* 1673 * If we found the EDID on the other bus, 1674 * assume that is the correct DDC bus. 1675 */ 1676 if (edid == NULL) 1677 intel_sdvo->ddc_bus = saved_ddc; 1678 } 1679 1680 /* 1681 * When there is no edid and no monitor is connected with VGA 1682 * port, try to use the CRT ddc to read the EDID for DVI-connector. 1683 */ 1684 if (edid == NULL) 1685 edid = intel_sdvo_get_analog_edid(connector); 1686 1687 status = connector_status_unknown; 1688 if (edid != NULL) { 1689 /* DDC bus is shared, match EDID to connector type */ 1690 if (edid->input & DRM_EDID_INPUT_DIGITAL) { 1691 status = connector_status_connected; 1692 if (intel_sdvo->is_hdmi) { 1693 intel_sdvo->has_hdmi_monitor = drm_detect_hdmi_monitor(edid); 1694 intel_sdvo->has_hdmi_audio = drm_detect_monitor_audio(edid); 1695 intel_sdvo->rgb_quant_range_selectable = 1696 drm_rgb_quant_range_selectable(edid); 1697 } 1698 } else 1699 status = connector_status_disconnected; 1700 kfree(edid); 1701 } 1702 1703 if (status == connector_status_connected) { 1704 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector); 1705 if (intel_sdvo_connector->force_audio != HDMI_AUDIO_AUTO) 1706 intel_sdvo->has_hdmi_audio = (intel_sdvo_connector->force_audio == HDMI_AUDIO_ON); 1707 } 1708 1709 return status; 1710 } 1711 1712 static bool 1713 intel_sdvo_connector_matches_edid(struct intel_sdvo_connector *sdvo, 1714 struct edid *edid) 1715 { 1716 bool monitor_is_digital = !!(edid->input & DRM_EDID_INPUT_DIGITAL); 1717 bool connector_is_digital = !!IS_DIGITAL(sdvo); 1718 1719 DRM_DEBUG_KMS("connector_is_digital? %d, monitor_is_digital? %d\n", 1720 connector_is_digital, monitor_is_digital); 1721 return connector_is_digital == monitor_is_digital; 1722 } 1723 1724 static enum drm_connector_status 1725 intel_sdvo_detect(struct drm_connector *connector, bool force) 1726 { 1727 uint16_t response; 1728 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector); 1729 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector); 1730 enum drm_connector_status ret; 1731 1732 DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n", 1733 connector->base.id, drm_get_connector_name(connector)); 1734 1735 if (!intel_sdvo_get_value(intel_sdvo, 1736 SDVO_CMD_GET_ATTACHED_DISPLAYS, 1737 &response, 2)) 1738 return connector_status_unknown; 1739 1740 DRM_DEBUG_KMS("SDVO response %d %d [%x]\n", 1741 response & 0xff, response >> 8, 1742 intel_sdvo_connector->output_flag); 1743 1744 if (response == 0) 1745 return connector_status_disconnected; 1746 1747 intel_sdvo->attached_output = response; 1748 1749 intel_sdvo->has_hdmi_monitor = false; 1750 intel_sdvo->has_hdmi_audio = false; 1751 intel_sdvo->rgb_quant_range_selectable = false; 1752 1753 if ((intel_sdvo_connector->output_flag & response) == 0) 1754 ret = connector_status_disconnected; 1755 else if (IS_TMDS(intel_sdvo_connector)) 1756 ret = intel_sdvo_tmds_sink_detect(connector); 1757 else { 1758 struct edid *edid; 1759 1760 /* if we have an edid check it matches the connection */ 1761 edid = intel_sdvo_get_edid(connector); 1762 if (edid == NULL) 1763 edid = intel_sdvo_get_analog_edid(connector); 1764 if (edid != NULL) { 1765 if (intel_sdvo_connector_matches_edid(intel_sdvo_connector, 1766 edid)) 1767 ret = connector_status_connected; 1768 else 1769 ret = connector_status_disconnected; 1770 1771 kfree(edid); 1772 } else 1773 ret = connector_status_connected; 1774 } 1775 1776 /* May update encoder flag for like clock for SDVO TV, etc.*/ 1777 if (ret == connector_status_connected) { 1778 intel_sdvo->is_tv = false; 1779 intel_sdvo->is_lvds = false; 1780 1781 if (response & SDVO_TV_MASK) 1782 intel_sdvo->is_tv = true; 1783 if (response & SDVO_LVDS_MASK) 1784 intel_sdvo->is_lvds = intel_sdvo->sdvo_lvds_fixed_mode != NULL; 1785 } 1786 1787 return ret; 1788 } 1789 1790 static void intel_sdvo_get_ddc_modes(struct drm_connector *connector) 1791 { 1792 struct edid *edid; 1793 1794 DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n", 1795 connector->base.id, drm_get_connector_name(connector)); 1796 1797 /* set the bus switch and get the modes */ 1798 edid = intel_sdvo_get_edid(connector); 1799 1800 /* 1801 * Mac mini hack. On this device, the DVI-I connector shares one DDC 1802 * link between analog and digital outputs. So, if the regular SDVO 1803 * DDC fails, check to see if the analog output is disconnected, in 1804 * which case we'll look there for the digital DDC data. 1805 */ 1806 if (edid == NULL) 1807 edid = intel_sdvo_get_analog_edid(connector); 1808 1809 if (edid != NULL) { 1810 if (intel_sdvo_connector_matches_edid(to_intel_sdvo_connector(connector), 1811 edid)) { 1812 drm_mode_connector_update_edid_property(connector, edid); 1813 drm_add_edid_modes(connector, edid); 1814 } 1815 1816 kfree(edid); 1817 } 1818 } 1819 1820 /* 1821 * Set of SDVO TV modes. 1822 * Note! This is in reply order (see loop in get_tv_modes). 1823 * XXX: all 60Hz refresh? 1824 */ 1825 static const struct drm_display_mode sdvo_tv_modes[] = { 1826 { DRM_MODE("320x200", DRM_MODE_TYPE_DRIVER, 5815, 320, 321, 384, 1827 416, 0, 200, 201, 232, 233, 0, 1828 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1829 { DRM_MODE("320x240", DRM_MODE_TYPE_DRIVER, 6814, 320, 321, 384, 1830 416, 0, 240, 241, 272, 273, 0, 1831 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1832 { DRM_MODE("400x300", DRM_MODE_TYPE_DRIVER, 9910, 400, 401, 464, 1833 496, 0, 300, 301, 332, 333, 0, 1834 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1835 { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 16913, 640, 641, 704, 1836 736, 0, 350, 351, 382, 383, 0, 1837 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1838 { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 19121, 640, 641, 704, 1839 736, 0, 400, 401, 432, 433, 0, 1840 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1841 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 22654, 640, 641, 704, 1842 736, 0, 480, 481, 512, 513, 0, 1843 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1844 { DRM_MODE("704x480", DRM_MODE_TYPE_DRIVER, 24624, 704, 705, 768, 1845 800, 0, 480, 481, 512, 513, 0, 1846 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1847 { DRM_MODE("704x576", DRM_MODE_TYPE_DRIVER, 29232, 704, 705, 768, 1848 800, 0, 576, 577, 608, 609, 0, 1849 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1850 { DRM_MODE("720x350", DRM_MODE_TYPE_DRIVER, 18751, 720, 721, 784, 1851 816, 0, 350, 351, 382, 383, 0, 1852 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1853 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 21199, 720, 721, 784, 1854 816, 0, 400, 401, 432, 433, 0, 1855 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1856 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 25116, 720, 721, 784, 1857 816, 0, 480, 481, 512, 513, 0, 1858 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1859 { DRM_MODE("720x540", DRM_MODE_TYPE_DRIVER, 28054, 720, 721, 784, 1860 816, 0, 540, 541, 572, 573, 0, 1861 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1862 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 29816, 720, 721, 784, 1863 816, 0, 576, 577, 608, 609, 0, 1864 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1865 { DRM_MODE("768x576", DRM_MODE_TYPE_DRIVER, 31570, 768, 769, 832, 1866 864, 0, 576, 577, 608, 609, 0, 1867 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1868 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 34030, 800, 801, 864, 1869 896, 0, 600, 601, 632, 633, 0, 1870 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1871 { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 36581, 832, 833, 896, 1872 928, 0, 624, 625, 656, 657, 0, 1873 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1874 { DRM_MODE("920x766", DRM_MODE_TYPE_DRIVER, 48707, 920, 921, 984, 1875 1016, 0, 766, 767, 798, 799, 0, 1876 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1877 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 53827, 1024, 1025, 1088, 1878 1120, 0, 768, 769, 800, 801, 0, 1879 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1880 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 87265, 1280, 1281, 1344, 1881 1376, 0, 1024, 1025, 1056, 1057, 0, 1882 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1883 }; 1884 1885 static void intel_sdvo_get_tv_modes(struct drm_connector *connector) 1886 { 1887 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector); 1888 struct intel_sdvo_sdtv_resolution_request tv_res; 1889 uint32_t reply = 0, format_map = 0; 1890 int i; 1891 1892 DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n", 1893 connector->base.id, drm_get_connector_name(connector)); 1894 1895 /* Read the list of supported input resolutions for the selected TV 1896 * format. 1897 */ 1898 format_map = 1 << intel_sdvo->tv_format_index; 1899 memcpy(&tv_res, &format_map, 1900 min(sizeof(format_map), sizeof(struct intel_sdvo_sdtv_resolution_request))); 1901 1902 if (!intel_sdvo_set_target_output(intel_sdvo, intel_sdvo->attached_output)) 1903 return; 1904 1905 BUILD_BUG_ON(sizeof(tv_res) != 3); 1906 if (!intel_sdvo_write_cmd(intel_sdvo, 1907 SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT, 1908 &tv_res, sizeof(tv_res))) 1909 return; 1910 if (!intel_sdvo_read_response(intel_sdvo, &reply, 3)) 1911 return; 1912 1913 for (i = 0; i < ARRAY_SIZE(sdvo_tv_modes); i++) 1914 if (reply & (1 << i)) { 1915 struct drm_display_mode *nmode; 1916 nmode = drm_mode_duplicate(connector->dev, 1917 &sdvo_tv_modes[i]); 1918 if (nmode) 1919 drm_mode_probed_add(connector, nmode); 1920 } 1921 } 1922 1923 static void intel_sdvo_get_lvds_modes(struct drm_connector *connector) 1924 { 1925 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector); 1926 struct drm_i915_private *dev_priv = connector->dev->dev_private; 1927 struct drm_display_mode *newmode; 1928 1929 DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n", 1930 connector->base.id, drm_get_connector_name(connector)); 1931 1932 /* 1933 * Fetch modes from VBT. For SDVO prefer the VBT mode since some 1934 * SDVO->LVDS transcoders can't cope with the EDID mode. 1935 */ 1936 if (dev_priv->vbt.sdvo_lvds_vbt_mode != NULL) { 1937 newmode = drm_mode_duplicate(connector->dev, 1938 dev_priv->vbt.sdvo_lvds_vbt_mode); 1939 if (newmode != NULL) { 1940 /* Guarantee the mode is preferred */ 1941 newmode->type = (DRM_MODE_TYPE_PREFERRED | 1942 DRM_MODE_TYPE_DRIVER); 1943 drm_mode_probed_add(connector, newmode); 1944 } 1945 } 1946 1947 /* 1948 * Attempt to get the mode list from DDC. 1949 * Assume that the preferred modes are 1950 * arranged in priority order. 1951 */ 1952 intel_ddc_get_modes(connector, intel_sdvo->ddc); 1953 1954 list_for_each_entry(newmode, &connector->probed_modes, head) { 1955 if (newmode->type & DRM_MODE_TYPE_PREFERRED) { 1956 intel_sdvo->sdvo_lvds_fixed_mode = 1957 drm_mode_duplicate(connector->dev, newmode); 1958 1959 intel_sdvo->is_lvds = true; 1960 break; 1961 } 1962 } 1963 } 1964 1965 static int intel_sdvo_get_modes(struct drm_connector *connector) 1966 { 1967 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector); 1968 1969 if (IS_TV(intel_sdvo_connector)) 1970 intel_sdvo_get_tv_modes(connector); 1971 else if (IS_LVDS(intel_sdvo_connector)) 1972 intel_sdvo_get_lvds_modes(connector); 1973 else 1974 intel_sdvo_get_ddc_modes(connector); 1975 1976 return !list_empty(&connector->probed_modes); 1977 } 1978 1979 static void 1980 intel_sdvo_destroy_enhance_property(struct drm_connector *connector) 1981 { 1982 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector); 1983 struct drm_device *dev = connector->dev; 1984 1985 if (intel_sdvo_connector->left) 1986 drm_property_destroy(dev, intel_sdvo_connector->left); 1987 if (intel_sdvo_connector->right) 1988 drm_property_destroy(dev, intel_sdvo_connector->right); 1989 if (intel_sdvo_connector->top) 1990 drm_property_destroy(dev, intel_sdvo_connector->top); 1991 if (intel_sdvo_connector->bottom) 1992 drm_property_destroy(dev, intel_sdvo_connector->bottom); 1993 if (intel_sdvo_connector->hpos) 1994 drm_property_destroy(dev, intel_sdvo_connector->hpos); 1995 if (intel_sdvo_connector->vpos) 1996 drm_property_destroy(dev, intel_sdvo_connector->vpos); 1997 if (intel_sdvo_connector->saturation) 1998 drm_property_destroy(dev, intel_sdvo_connector->saturation); 1999 if (intel_sdvo_connector->contrast) 2000 drm_property_destroy(dev, intel_sdvo_connector->contrast); 2001 if (intel_sdvo_connector->hue) 2002 drm_property_destroy(dev, intel_sdvo_connector->hue); 2003 if (intel_sdvo_connector->sharpness) 2004 drm_property_destroy(dev, intel_sdvo_connector->sharpness); 2005 if (intel_sdvo_connector->flicker_filter) 2006 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter); 2007 if (intel_sdvo_connector->flicker_filter_2d) 2008 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_2d); 2009 if (intel_sdvo_connector->flicker_filter_adaptive) 2010 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_adaptive); 2011 if (intel_sdvo_connector->tv_luma_filter) 2012 drm_property_destroy(dev, intel_sdvo_connector->tv_luma_filter); 2013 if (intel_sdvo_connector->tv_chroma_filter) 2014 drm_property_destroy(dev, intel_sdvo_connector->tv_chroma_filter); 2015 if (intel_sdvo_connector->dot_crawl) 2016 drm_property_destroy(dev, intel_sdvo_connector->dot_crawl); 2017 if (intel_sdvo_connector->brightness) 2018 drm_property_destroy(dev, intel_sdvo_connector->brightness); 2019 } 2020 2021 static void intel_sdvo_destroy(struct drm_connector *connector) 2022 { 2023 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector); 2024 2025 if (intel_sdvo_connector->tv_format) 2026 drm_property_destroy(connector->dev, 2027 intel_sdvo_connector->tv_format); 2028 2029 intel_sdvo_destroy_enhance_property(connector); 2030 drm_connector_cleanup(connector); 2031 kfree(intel_sdvo_connector); 2032 } 2033 2034 static bool intel_sdvo_detect_hdmi_audio(struct drm_connector *connector) 2035 { 2036 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector); 2037 struct edid *edid; 2038 bool has_audio = false; 2039 2040 if (!intel_sdvo->is_hdmi) 2041 return false; 2042 2043 edid = intel_sdvo_get_edid(connector); 2044 if (edid != NULL && edid->input & DRM_EDID_INPUT_DIGITAL) 2045 has_audio = drm_detect_monitor_audio(edid); 2046 kfree(edid); 2047 2048 return has_audio; 2049 } 2050 2051 static int 2052 intel_sdvo_set_property(struct drm_connector *connector, 2053 struct drm_property *property, 2054 uint64_t val) 2055 { 2056 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector); 2057 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector); 2058 struct drm_i915_private *dev_priv = connector->dev->dev_private; 2059 uint16_t temp_value; 2060 uint8_t cmd; 2061 int ret; 2062 2063 ret = drm_object_property_set_value(&connector->base, property, val); 2064 if (ret) 2065 return ret; 2066 2067 if (property == dev_priv->force_audio_property) { 2068 int i = val; 2069 bool has_audio; 2070 2071 if (i == intel_sdvo_connector->force_audio) 2072 return 0; 2073 2074 intel_sdvo_connector->force_audio = i; 2075 2076 if (i == HDMI_AUDIO_AUTO) 2077 has_audio = intel_sdvo_detect_hdmi_audio(connector); 2078 else 2079 has_audio = (i == HDMI_AUDIO_ON); 2080 2081 if (has_audio == intel_sdvo->has_hdmi_audio) 2082 return 0; 2083 2084 intel_sdvo->has_hdmi_audio = has_audio; 2085 goto done; 2086 } 2087 2088 if (property == dev_priv->broadcast_rgb_property) { 2089 bool old_auto = intel_sdvo->color_range_auto; 2090 uint32_t old_range = intel_sdvo->color_range; 2091 2092 switch (val) { 2093 case INTEL_BROADCAST_RGB_AUTO: 2094 intel_sdvo->color_range_auto = true; 2095 break; 2096 case INTEL_BROADCAST_RGB_FULL: 2097 intel_sdvo->color_range_auto = false; 2098 intel_sdvo->color_range = 0; 2099 break; 2100 case INTEL_BROADCAST_RGB_LIMITED: 2101 intel_sdvo->color_range_auto = false; 2102 /* FIXME: this bit is only valid when using TMDS 2103 * encoding and 8 bit per color mode. */ 2104 intel_sdvo->color_range = HDMI_COLOR_RANGE_16_235; 2105 break; 2106 default: 2107 return -EINVAL; 2108 } 2109 2110 if (old_auto == intel_sdvo->color_range_auto && 2111 old_range == intel_sdvo->color_range) 2112 return 0; 2113 2114 goto done; 2115 } 2116 2117 #define CHECK_PROPERTY(name, NAME) \ 2118 if (intel_sdvo_connector->name == property) { \ 2119 if (intel_sdvo_connector->cur_##name == temp_value) return 0; \ 2120 if (intel_sdvo_connector->max_##name < temp_value) return -EINVAL; \ 2121 cmd = SDVO_CMD_SET_##NAME; \ 2122 intel_sdvo_connector->cur_##name = temp_value; \ 2123 goto set_value; \ 2124 } 2125 2126 if (property == intel_sdvo_connector->tv_format) { 2127 if (val >= TV_FORMAT_NUM) 2128 return -EINVAL; 2129 2130 if (intel_sdvo->tv_format_index == 2131 intel_sdvo_connector->tv_format_supported[val]) 2132 return 0; 2133 2134 intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[val]; 2135 goto done; 2136 } else if (IS_TV_OR_LVDS(intel_sdvo_connector)) { 2137 temp_value = val; 2138 if (intel_sdvo_connector->left == property) { 2139 drm_object_property_set_value(&connector->base, 2140 intel_sdvo_connector->right, val); 2141 if (intel_sdvo_connector->left_margin == temp_value) 2142 return 0; 2143 2144 intel_sdvo_connector->left_margin = temp_value; 2145 intel_sdvo_connector->right_margin = temp_value; 2146 temp_value = intel_sdvo_connector->max_hscan - 2147 intel_sdvo_connector->left_margin; 2148 cmd = SDVO_CMD_SET_OVERSCAN_H; 2149 goto set_value; 2150 } else if (intel_sdvo_connector->right == property) { 2151 drm_object_property_set_value(&connector->base, 2152 intel_sdvo_connector->left, val); 2153 if (intel_sdvo_connector->right_margin == temp_value) 2154 return 0; 2155 2156 intel_sdvo_connector->left_margin = temp_value; 2157 intel_sdvo_connector->right_margin = temp_value; 2158 temp_value = intel_sdvo_connector->max_hscan - 2159 intel_sdvo_connector->left_margin; 2160 cmd = SDVO_CMD_SET_OVERSCAN_H; 2161 goto set_value; 2162 } else if (intel_sdvo_connector->top == property) { 2163 drm_object_property_set_value(&connector->base, 2164 intel_sdvo_connector->bottom, val); 2165 if (intel_sdvo_connector->top_margin == temp_value) 2166 return 0; 2167 2168 intel_sdvo_connector->top_margin = temp_value; 2169 intel_sdvo_connector->bottom_margin = temp_value; 2170 temp_value = intel_sdvo_connector->max_vscan - 2171 intel_sdvo_connector->top_margin; 2172 cmd = SDVO_CMD_SET_OVERSCAN_V; 2173 goto set_value; 2174 } else if (intel_sdvo_connector->bottom == property) { 2175 drm_object_property_set_value(&connector->base, 2176 intel_sdvo_connector->top, val); 2177 if (intel_sdvo_connector->bottom_margin == temp_value) 2178 return 0; 2179 2180 intel_sdvo_connector->top_margin = temp_value; 2181 intel_sdvo_connector->bottom_margin = temp_value; 2182 temp_value = intel_sdvo_connector->max_vscan - 2183 intel_sdvo_connector->top_margin; 2184 cmd = SDVO_CMD_SET_OVERSCAN_V; 2185 goto set_value; 2186 } 2187 CHECK_PROPERTY(hpos, HPOS) 2188 CHECK_PROPERTY(vpos, VPOS) 2189 CHECK_PROPERTY(saturation, SATURATION) 2190 CHECK_PROPERTY(contrast, CONTRAST) 2191 CHECK_PROPERTY(hue, HUE) 2192 CHECK_PROPERTY(brightness, BRIGHTNESS) 2193 CHECK_PROPERTY(sharpness, SHARPNESS) 2194 CHECK_PROPERTY(flicker_filter, FLICKER_FILTER) 2195 CHECK_PROPERTY(flicker_filter_2d, FLICKER_FILTER_2D) 2196 CHECK_PROPERTY(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE) 2197 CHECK_PROPERTY(tv_chroma_filter, TV_CHROMA_FILTER) 2198 CHECK_PROPERTY(tv_luma_filter, TV_LUMA_FILTER) 2199 CHECK_PROPERTY(dot_crawl, DOT_CRAWL) 2200 } 2201 2202 return -EINVAL; /* unknown property */ 2203 2204 set_value: 2205 if (!intel_sdvo_set_value(intel_sdvo, cmd, &temp_value, 2)) 2206 return -EIO; 2207 2208 2209 done: 2210 if (intel_sdvo->base.base.crtc) 2211 intel_crtc_restore_mode(intel_sdvo->base.base.crtc); 2212 2213 return 0; 2214 #undef CHECK_PROPERTY 2215 } 2216 2217 static const struct drm_connector_funcs intel_sdvo_connector_funcs = { 2218 .dpms = intel_sdvo_dpms, 2219 .detect = intel_sdvo_detect, 2220 .fill_modes = drm_helper_probe_single_connector_modes, 2221 .set_property = intel_sdvo_set_property, 2222 .destroy = intel_sdvo_destroy, 2223 }; 2224 2225 static const struct drm_connector_helper_funcs intel_sdvo_connector_helper_funcs = { 2226 .get_modes = intel_sdvo_get_modes, 2227 .mode_valid = intel_sdvo_mode_valid, 2228 .best_encoder = intel_best_encoder, 2229 }; 2230 2231 static void intel_sdvo_enc_destroy(struct drm_encoder *encoder) 2232 { 2233 struct intel_sdvo *intel_sdvo = to_sdvo(to_intel_encoder(encoder)); 2234 2235 if (intel_sdvo->sdvo_lvds_fixed_mode != NULL) 2236 drm_mode_destroy(encoder->dev, 2237 intel_sdvo->sdvo_lvds_fixed_mode); 2238 2239 device_delete_child(intel_sdvo->base.base.dev->dev, 2240 intel_sdvo->ddc_iic_bus); 2241 intel_encoder_destroy(encoder); 2242 } 2243 2244 static const struct drm_encoder_funcs intel_sdvo_enc_funcs = { 2245 .destroy = intel_sdvo_enc_destroy, 2246 }; 2247 2248 static void 2249 intel_sdvo_guess_ddc_bus(struct intel_sdvo *sdvo) 2250 { 2251 uint16_t mask = 0; 2252 unsigned int num_bits; 2253 2254 /* Make a mask of outputs less than or equal to our own priority in the 2255 * list. 2256 */ 2257 switch (sdvo->controlled_output) { 2258 case SDVO_OUTPUT_LVDS1: 2259 mask |= SDVO_OUTPUT_LVDS1; 2260 case SDVO_OUTPUT_LVDS0: 2261 mask |= SDVO_OUTPUT_LVDS0; 2262 case SDVO_OUTPUT_TMDS1: 2263 mask |= SDVO_OUTPUT_TMDS1; 2264 case SDVO_OUTPUT_TMDS0: 2265 mask |= SDVO_OUTPUT_TMDS0; 2266 case SDVO_OUTPUT_RGB1: 2267 mask |= SDVO_OUTPUT_RGB1; 2268 case SDVO_OUTPUT_RGB0: 2269 mask |= SDVO_OUTPUT_RGB0; 2270 break; 2271 } 2272 2273 /* Count bits to find what number we are in the priority list. */ 2274 mask &= sdvo->caps.output_flags; 2275 num_bits = hweight16(mask); 2276 /* If more than 3 outputs, default to DDC bus 3 for now. */ 2277 if (num_bits > 3) 2278 num_bits = 3; 2279 2280 /* Corresponds to SDVO_CONTROL_BUS_DDCx */ 2281 sdvo->ddc_bus = 1 << num_bits; 2282 } 2283 2284 /** 2285 * Choose the appropriate DDC bus for control bus switch command for this 2286 * SDVO output based on the controlled output. 2287 * 2288 * DDC bus number assignment is in a priority order of RGB outputs, then TMDS 2289 * outputs, then LVDS outputs. 2290 */ 2291 static void 2292 intel_sdvo_select_ddc_bus(struct drm_i915_private *dev_priv, 2293 struct intel_sdvo *sdvo, u32 reg) 2294 { 2295 struct sdvo_device_mapping *mapping; 2296 2297 if (sdvo->is_sdvob) 2298 mapping = &(dev_priv->sdvo_mappings[0]); 2299 else 2300 mapping = &(dev_priv->sdvo_mappings[1]); 2301 2302 if (mapping->initialized) 2303 sdvo->ddc_bus = 1 << ((mapping->ddc_pin & 0xf0) >> 4); 2304 else 2305 intel_sdvo_guess_ddc_bus(sdvo); 2306 } 2307 2308 static void 2309 intel_sdvo_select_i2c_bus(struct drm_i915_private *dev_priv, 2310 struct intel_sdvo *sdvo, u32 reg) 2311 { 2312 struct sdvo_device_mapping *mapping; 2313 u8 pin; 2314 2315 if (sdvo->is_sdvob) 2316 mapping = &dev_priv->sdvo_mappings[0]; 2317 else 2318 mapping = &dev_priv->sdvo_mappings[1]; 2319 2320 if (mapping->initialized && intel_gmbus_is_port_valid(mapping->i2c_pin)) 2321 pin = mapping->i2c_pin; 2322 else 2323 pin = GMBUS_PORT_DPB; 2324 2325 sdvo->i2c = intel_gmbus_get_adapter(dev_priv, pin); 2326 2327 /* With gmbus we should be able to drive sdvo i2c at 2MHz, but somehow 2328 * our code totally fails once we start using gmbus. Hence fall back to 2329 * bit banging for now. */ 2330 intel_gmbus_force_bit(sdvo->i2c, true); 2331 } 2332 2333 /* undo any changes intel_sdvo_select_i2c_bus() did to sdvo->i2c */ 2334 static void 2335 intel_sdvo_unselect_i2c_bus(struct intel_sdvo *sdvo) 2336 { 2337 intel_gmbus_force_bit(sdvo->i2c, false); 2338 } 2339 2340 static bool 2341 intel_sdvo_is_hdmi_connector(struct intel_sdvo *intel_sdvo, int device) 2342 { 2343 return intel_sdvo_check_supp_encode(intel_sdvo); 2344 } 2345 2346 static u8 2347 intel_sdvo_get_slave_addr(struct drm_device *dev, struct intel_sdvo *sdvo) 2348 { 2349 struct drm_i915_private *dev_priv = dev->dev_private; 2350 struct sdvo_device_mapping *my_mapping, *other_mapping; 2351 2352 if (sdvo->is_sdvob) { 2353 my_mapping = &dev_priv->sdvo_mappings[0]; 2354 other_mapping = &dev_priv->sdvo_mappings[1]; 2355 } else { 2356 my_mapping = &dev_priv->sdvo_mappings[1]; 2357 other_mapping = &dev_priv->sdvo_mappings[0]; 2358 } 2359 2360 /* If the BIOS described our SDVO device, take advantage of it. */ 2361 if (my_mapping->slave_addr) 2362 return my_mapping->slave_addr; 2363 2364 /* If the BIOS only described a different SDVO device, use the 2365 * address that it isn't using. 2366 */ 2367 if (other_mapping->slave_addr) { 2368 if (other_mapping->slave_addr == 0x70) 2369 return 0x72; 2370 else 2371 return 0x70; 2372 } 2373 2374 /* No SDVO device info is found for another DVO port, 2375 * so use mapping assumption we had before BIOS parsing. 2376 */ 2377 if (sdvo->is_sdvob) 2378 return 0x70; 2379 else 2380 return 0x72; 2381 } 2382 2383 static void 2384 intel_sdvo_connector_init(struct intel_sdvo_connector *connector, 2385 struct intel_sdvo *encoder) 2386 { 2387 drm_connector_init(encoder->base.base.dev, 2388 &connector->base.base, 2389 &intel_sdvo_connector_funcs, 2390 connector->base.base.connector_type); 2391 2392 drm_connector_helper_add(&connector->base.base, 2393 &intel_sdvo_connector_helper_funcs); 2394 2395 connector->base.base.interlace_allowed = 1; 2396 connector->base.base.doublescan_allowed = 0; 2397 connector->base.base.display_info.subpixel_order = SubPixelHorizontalRGB; 2398 connector->base.get_hw_state = intel_sdvo_connector_get_hw_state; 2399 2400 intel_connector_attach_encoder(&connector->base, &encoder->base); 2401 drm_sysfs_connector_add(&connector->base.base); 2402 } 2403 2404 static void 2405 intel_sdvo_add_hdmi_properties(struct intel_sdvo *intel_sdvo, 2406 struct intel_sdvo_connector *connector) 2407 { 2408 struct drm_device *dev = connector->base.base.dev; 2409 2410 intel_attach_force_audio_property(&connector->base.base); 2411 if (INTEL_INFO(dev)->gen >= 4 && IS_MOBILE(dev)) { 2412 intel_attach_broadcast_rgb_property(&connector->base.base); 2413 intel_sdvo->color_range_auto = true; 2414 } 2415 } 2416 2417 static bool 2418 intel_sdvo_dvi_init(struct intel_sdvo *intel_sdvo, int device) 2419 { 2420 struct drm_encoder *encoder = &intel_sdvo->base.base; 2421 struct drm_connector *connector; 2422 struct intel_encoder *intel_encoder = to_intel_encoder(encoder); 2423 struct intel_connector *intel_connector; 2424 struct intel_sdvo_connector *intel_sdvo_connector; 2425 2426 DRM_DEBUG_KMS("initialising DVI device %d\n", device); 2427 2428 intel_sdvo_connector = kzalloc(sizeof(*intel_sdvo_connector), GFP_KERNEL); 2429 if (!intel_sdvo_connector) 2430 return false; 2431 2432 if (device == 0) { 2433 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS0; 2434 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS0; 2435 } else if (device == 1) { 2436 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS1; 2437 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS1; 2438 } 2439 2440 intel_connector = &intel_sdvo_connector->base; 2441 connector = &intel_connector->base; 2442 if (intel_sdvo_get_hotplug_support(intel_sdvo) & 2443 intel_sdvo_connector->output_flag) { 2444 intel_sdvo->hotplug_active |= intel_sdvo_connector->output_flag; 2445 /* Some SDVO devices have one-shot hotplug interrupts. 2446 * Ensure that they get re-enabled when an interrupt happens. 2447 */ 2448 intel_encoder->hot_plug = intel_sdvo_enable_hotplug; 2449 intel_sdvo_enable_hotplug(intel_encoder); 2450 } else { 2451 intel_connector->polled = DRM_CONNECTOR_POLL_CONNECT | DRM_CONNECTOR_POLL_DISCONNECT; 2452 } 2453 encoder->encoder_type = DRM_MODE_ENCODER_TMDS; 2454 connector->connector_type = DRM_MODE_CONNECTOR_DVID; 2455 2456 if (intel_sdvo_is_hdmi_connector(intel_sdvo, device)) { 2457 connector->connector_type = DRM_MODE_CONNECTOR_HDMIA; 2458 intel_sdvo->is_hdmi = true; 2459 } 2460 2461 intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo); 2462 if (intel_sdvo->is_hdmi) 2463 intel_sdvo_add_hdmi_properties(intel_sdvo, intel_sdvo_connector); 2464 2465 return true; 2466 } 2467 2468 static bool 2469 intel_sdvo_tv_init(struct intel_sdvo *intel_sdvo, int type) 2470 { 2471 struct drm_encoder *encoder = &intel_sdvo->base.base; 2472 struct drm_connector *connector; 2473 struct intel_connector *intel_connector; 2474 struct intel_sdvo_connector *intel_sdvo_connector; 2475 2476 DRM_DEBUG_KMS("initialising TV type %d\n", type); 2477 2478 intel_sdvo_connector = kzalloc(sizeof(*intel_sdvo_connector), GFP_KERNEL); 2479 if (!intel_sdvo_connector) 2480 return false; 2481 2482 intel_connector = &intel_sdvo_connector->base; 2483 connector = &intel_connector->base; 2484 encoder->encoder_type = DRM_MODE_ENCODER_TVDAC; 2485 connector->connector_type = DRM_MODE_CONNECTOR_SVIDEO; 2486 2487 intel_sdvo->controlled_output |= type; 2488 intel_sdvo_connector->output_flag = type; 2489 2490 intel_sdvo->is_tv = true; 2491 2492 intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo); 2493 2494 if (!intel_sdvo_tv_create_property(intel_sdvo, intel_sdvo_connector, type)) 2495 goto err; 2496 2497 if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector)) 2498 goto err; 2499 2500 return true; 2501 2502 err: 2503 drm_sysfs_connector_remove(connector); 2504 intel_sdvo_destroy(connector); 2505 return false; 2506 } 2507 2508 static bool 2509 intel_sdvo_analog_init(struct intel_sdvo *intel_sdvo, int device) 2510 { 2511 struct drm_encoder *encoder = &intel_sdvo->base.base; 2512 struct drm_connector *connector; 2513 struct intel_connector *intel_connector; 2514 struct intel_sdvo_connector *intel_sdvo_connector; 2515 2516 DRM_DEBUG_KMS("initialising analog device %d\n", device); 2517 2518 intel_sdvo_connector = kzalloc(sizeof(*intel_sdvo_connector), GFP_KERNEL); 2519 if (!intel_sdvo_connector) 2520 return false; 2521 2522 intel_connector = &intel_sdvo_connector->base; 2523 connector = &intel_connector->base; 2524 intel_connector->polled = DRM_CONNECTOR_POLL_CONNECT; 2525 encoder->encoder_type = DRM_MODE_ENCODER_DAC; 2526 connector->connector_type = DRM_MODE_CONNECTOR_VGA; 2527 2528 if (device == 0) { 2529 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB0; 2530 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB0; 2531 } else if (device == 1) { 2532 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB1; 2533 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB1; 2534 } 2535 2536 intel_sdvo_connector_init(intel_sdvo_connector, 2537 intel_sdvo); 2538 return true; 2539 } 2540 2541 static bool 2542 intel_sdvo_lvds_init(struct intel_sdvo *intel_sdvo, int device) 2543 { 2544 struct drm_encoder *encoder = &intel_sdvo->base.base; 2545 struct drm_connector *connector; 2546 struct intel_connector *intel_connector; 2547 struct intel_sdvo_connector *intel_sdvo_connector; 2548 2549 DRM_DEBUG_KMS("initialising LVDS device %d\n", device); 2550 2551 intel_sdvo_connector = kzalloc(sizeof(*intel_sdvo_connector), GFP_KERNEL); 2552 if (!intel_sdvo_connector) 2553 return false; 2554 2555 intel_connector = &intel_sdvo_connector->base; 2556 connector = &intel_connector->base; 2557 encoder->encoder_type = DRM_MODE_ENCODER_LVDS; 2558 connector->connector_type = DRM_MODE_CONNECTOR_LVDS; 2559 2560 if (device == 0) { 2561 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS0; 2562 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS0; 2563 } else if (device == 1) { 2564 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS1; 2565 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS1; 2566 } 2567 2568 intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo); 2569 if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector)) 2570 goto err; 2571 2572 return true; 2573 2574 err: 2575 drm_sysfs_connector_remove(connector); 2576 intel_sdvo_destroy(connector); 2577 return false; 2578 } 2579 2580 static bool 2581 intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags) 2582 { 2583 intel_sdvo->is_tv = false; 2584 intel_sdvo->is_lvds = false; 2585 2586 /* SDVO requires XXX1 function may not exist unless it has XXX0 function.*/ 2587 2588 if (flags & SDVO_OUTPUT_TMDS0) 2589 if (!intel_sdvo_dvi_init(intel_sdvo, 0)) 2590 return false; 2591 2592 if ((flags & SDVO_TMDS_MASK) == SDVO_TMDS_MASK) 2593 if (!intel_sdvo_dvi_init(intel_sdvo, 1)) 2594 return false; 2595 2596 /* TV has no XXX1 function block */ 2597 if (flags & SDVO_OUTPUT_SVID0) 2598 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_SVID0)) 2599 return false; 2600 2601 if (flags & SDVO_OUTPUT_CVBS0) 2602 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_CVBS0)) 2603 return false; 2604 2605 if (flags & SDVO_OUTPUT_YPRPB0) 2606 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_YPRPB0)) 2607 return false; 2608 2609 if (flags & SDVO_OUTPUT_RGB0) 2610 if (!intel_sdvo_analog_init(intel_sdvo, 0)) 2611 return false; 2612 2613 if ((flags & SDVO_RGB_MASK) == SDVO_RGB_MASK) 2614 if (!intel_sdvo_analog_init(intel_sdvo, 1)) 2615 return false; 2616 2617 if (flags & SDVO_OUTPUT_LVDS0) 2618 if (!intel_sdvo_lvds_init(intel_sdvo, 0)) 2619 return false; 2620 2621 if ((flags & SDVO_LVDS_MASK) == SDVO_LVDS_MASK) 2622 if (!intel_sdvo_lvds_init(intel_sdvo, 1)) 2623 return false; 2624 2625 if ((flags & SDVO_OUTPUT_MASK) == 0) { 2626 unsigned char bytes[2]; 2627 2628 intel_sdvo->controlled_output = 0; 2629 memcpy(bytes, &intel_sdvo->caps.output_flags, 2); 2630 DRM_DEBUG_KMS("%s: Unknown SDVO output type (0x%02x%02x)\n", 2631 SDVO_NAME(intel_sdvo), 2632 bytes[0], bytes[1]); 2633 return false; 2634 } 2635 intel_sdvo->base.crtc_mask = (1 << 0) | (1 << 1) | (1 << 2); 2636 2637 return true; 2638 } 2639 2640 static void intel_sdvo_output_cleanup(struct intel_sdvo *intel_sdvo) 2641 { 2642 struct drm_device *dev = intel_sdvo->base.base.dev; 2643 struct drm_connector *connector, *tmp; 2644 2645 list_for_each_entry_safe(connector, tmp, 2646 &dev->mode_config.connector_list, head) { 2647 if (intel_attached_encoder(connector) == &intel_sdvo->base) { 2648 drm_sysfs_connector_remove(connector); 2649 intel_sdvo_destroy(connector); 2650 } 2651 } 2652 } 2653 2654 static bool intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo, 2655 struct intel_sdvo_connector *intel_sdvo_connector, 2656 int type) 2657 { 2658 struct drm_device *dev = intel_sdvo->base.base.dev; 2659 struct intel_sdvo_tv_format format; 2660 uint32_t format_map, i; 2661 2662 if (!intel_sdvo_set_target_output(intel_sdvo, type)) 2663 return false; 2664 2665 BUILD_BUG_ON(sizeof(format) != 6); 2666 if (!intel_sdvo_get_value(intel_sdvo, 2667 SDVO_CMD_GET_SUPPORTED_TV_FORMATS, 2668 &format, sizeof(format))) 2669 return false; 2670 2671 memcpy(&format_map, &format, min(sizeof(format_map), sizeof(format))); 2672 2673 if (format_map == 0) 2674 return false; 2675 2676 intel_sdvo_connector->format_supported_num = 0; 2677 for (i = 0 ; i < TV_FORMAT_NUM; i++) 2678 if (format_map & (1 << i)) 2679 intel_sdvo_connector->tv_format_supported[intel_sdvo_connector->format_supported_num++] = i; 2680 2681 2682 intel_sdvo_connector->tv_format = 2683 drm_property_create(dev, DRM_MODE_PROP_ENUM, 2684 "mode", intel_sdvo_connector->format_supported_num); 2685 if (!intel_sdvo_connector->tv_format) 2686 return false; 2687 2688 for (i = 0; i < intel_sdvo_connector->format_supported_num; i++) 2689 drm_property_add_enum( 2690 intel_sdvo_connector->tv_format, i, 2691 i, tv_format_names[intel_sdvo_connector->tv_format_supported[i]]); 2692 2693 intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[0]; 2694 drm_object_attach_property(&intel_sdvo_connector->base.base.base, 2695 intel_sdvo_connector->tv_format, 0); 2696 return true; 2697 2698 } 2699 2700 #define ENHANCEMENT(name, NAME) do { \ 2701 if (enhancements.name) { \ 2702 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_MAX_##NAME, &data_value, 4) || \ 2703 !intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_##NAME, &response, 2)) \ 2704 return false; \ 2705 intel_sdvo_connector->max_##name = data_value[0]; \ 2706 intel_sdvo_connector->cur_##name = response; \ 2707 intel_sdvo_connector->name = \ 2708 drm_property_create_range(dev, 0, #name, 0, data_value[0]); \ 2709 if (!intel_sdvo_connector->name) return false; \ 2710 drm_object_attach_property(&connector->base, \ 2711 intel_sdvo_connector->name, \ 2712 intel_sdvo_connector->cur_##name); \ 2713 DRM_DEBUG_KMS(#name ": max %d, default %d, current %d\n", \ 2714 data_value[0], data_value[1], response); \ 2715 } \ 2716 } while (0) 2717 2718 static bool 2719 intel_sdvo_create_enhance_property_tv(struct intel_sdvo *intel_sdvo, 2720 struct intel_sdvo_connector *intel_sdvo_connector, 2721 struct intel_sdvo_enhancements_reply enhancements) 2722 { 2723 struct drm_device *dev = intel_sdvo->base.base.dev; 2724 struct drm_connector *connector = &intel_sdvo_connector->base.base; 2725 uint16_t response, data_value[2]; 2726 2727 /* when horizontal overscan is supported, Add the left/right property */ 2728 if (enhancements.overscan_h) { 2729 if (!intel_sdvo_get_value(intel_sdvo, 2730 SDVO_CMD_GET_MAX_OVERSCAN_H, 2731 &data_value, 4)) 2732 return false; 2733 2734 if (!intel_sdvo_get_value(intel_sdvo, 2735 SDVO_CMD_GET_OVERSCAN_H, 2736 &response, 2)) 2737 return false; 2738 2739 intel_sdvo_connector->max_hscan = data_value[0]; 2740 intel_sdvo_connector->left_margin = data_value[0] - response; 2741 intel_sdvo_connector->right_margin = intel_sdvo_connector->left_margin; 2742 intel_sdvo_connector->left = 2743 drm_property_create_range(dev, 0, "left_margin", 0, data_value[0]); 2744 if (!intel_sdvo_connector->left) 2745 return false; 2746 2747 drm_object_attach_property(&connector->base, 2748 intel_sdvo_connector->left, 2749 intel_sdvo_connector->left_margin); 2750 2751 intel_sdvo_connector->right = 2752 drm_property_create_range(dev, 0, "right_margin", 0, data_value[0]); 2753 if (!intel_sdvo_connector->right) 2754 return false; 2755 2756 drm_object_attach_property(&connector->base, 2757 intel_sdvo_connector->right, 2758 intel_sdvo_connector->right_margin); 2759 DRM_DEBUG_KMS("h_overscan: max %d, " 2760 "default %d, current %d\n", 2761 data_value[0], data_value[1], response); 2762 } 2763 2764 if (enhancements.overscan_v) { 2765 if (!intel_sdvo_get_value(intel_sdvo, 2766 SDVO_CMD_GET_MAX_OVERSCAN_V, 2767 &data_value, 4)) 2768 return false; 2769 2770 if (!intel_sdvo_get_value(intel_sdvo, 2771 SDVO_CMD_GET_OVERSCAN_V, 2772 &response, 2)) 2773 return false; 2774 2775 intel_sdvo_connector->max_vscan = data_value[0]; 2776 intel_sdvo_connector->top_margin = data_value[0] - response; 2777 intel_sdvo_connector->bottom_margin = intel_sdvo_connector->top_margin; 2778 intel_sdvo_connector->top = 2779 drm_property_create_range(dev, 0, 2780 "top_margin", 0, data_value[0]); 2781 if (!intel_sdvo_connector->top) 2782 return false; 2783 2784 drm_object_attach_property(&connector->base, 2785 intel_sdvo_connector->top, 2786 intel_sdvo_connector->top_margin); 2787 2788 intel_sdvo_connector->bottom = 2789 drm_property_create_range(dev, 0, 2790 "bottom_margin", 0, data_value[0]); 2791 if (!intel_sdvo_connector->bottom) 2792 return false; 2793 2794 drm_object_attach_property(&connector->base, 2795 intel_sdvo_connector->bottom, 2796 intel_sdvo_connector->bottom_margin); 2797 DRM_DEBUG_KMS("v_overscan: max %d, " 2798 "default %d, current %d\n", 2799 data_value[0], data_value[1], response); 2800 } 2801 2802 ENHANCEMENT(hpos, HPOS); 2803 ENHANCEMENT(vpos, VPOS); 2804 ENHANCEMENT(saturation, SATURATION); 2805 ENHANCEMENT(contrast, CONTRAST); 2806 ENHANCEMENT(hue, HUE); 2807 ENHANCEMENT(sharpness, SHARPNESS); 2808 ENHANCEMENT(brightness, BRIGHTNESS); 2809 ENHANCEMENT(flicker_filter, FLICKER_FILTER); 2810 ENHANCEMENT(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE); 2811 ENHANCEMENT(flicker_filter_2d, FLICKER_FILTER_2D); 2812 ENHANCEMENT(tv_chroma_filter, TV_CHROMA_FILTER); 2813 ENHANCEMENT(tv_luma_filter, TV_LUMA_FILTER); 2814 2815 if (enhancements.dot_crawl) { 2816 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_DOT_CRAWL, &response, 2)) 2817 return false; 2818 2819 intel_sdvo_connector->max_dot_crawl = 1; 2820 intel_sdvo_connector->cur_dot_crawl = response & 0x1; 2821 intel_sdvo_connector->dot_crawl = 2822 drm_property_create_range(dev, 0, "dot_crawl", 0, 1); 2823 if (!intel_sdvo_connector->dot_crawl) 2824 return false; 2825 2826 drm_object_attach_property(&connector->base, 2827 intel_sdvo_connector->dot_crawl, 2828 intel_sdvo_connector->cur_dot_crawl); 2829 DRM_DEBUG_KMS("dot crawl: current %d\n", response); 2830 } 2831 2832 return true; 2833 } 2834 2835 static bool 2836 intel_sdvo_create_enhance_property_lvds(struct intel_sdvo *intel_sdvo, 2837 struct intel_sdvo_connector *intel_sdvo_connector, 2838 struct intel_sdvo_enhancements_reply enhancements) 2839 { 2840 struct drm_device *dev = intel_sdvo->base.base.dev; 2841 struct drm_connector *connector = &intel_sdvo_connector->base.base; 2842 uint16_t response, data_value[2]; 2843 2844 ENHANCEMENT(brightness, BRIGHTNESS); 2845 2846 return true; 2847 } 2848 #undef ENHANCEMENT 2849 2850 static bool intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo, 2851 struct intel_sdvo_connector *intel_sdvo_connector) 2852 { 2853 union { 2854 struct intel_sdvo_enhancements_reply reply; 2855 uint16_t response; 2856 } enhancements; 2857 2858 BUILD_BUG_ON(sizeof(enhancements) != 2); 2859 2860 enhancements.response = 0; 2861 intel_sdvo_get_value(intel_sdvo, 2862 SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS, 2863 &enhancements, sizeof(enhancements)); 2864 if (enhancements.response == 0) { 2865 DRM_DEBUG_KMS("No enhancement is supported\n"); 2866 return true; 2867 } 2868 2869 if (IS_TV(intel_sdvo_connector)) 2870 return intel_sdvo_create_enhance_property_tv(intel_sdvo, intel_sdvo_connector, enhancements.reply); 2871 else if (IS_LVDS(intel_sdvo_connector)) 2872 return intel_sdvo_create_enhance_property_lvds(intel_sdvo, intel_sdvo_connector, enhancements.reply); 2873 else 2874 return true; 2875 } 2876 2877 struct intel_sdvo_ddc_proxy_sc { 2878 struct intel_sdvo *intel_sdvo; 2879 device_t port; 2880 }; 2881 2882 static int 2883 intel_sdvo_ddc_proxy_probe(device_t idev) 2884 { 2885 2886 return (BUS_PROBE_DEFAULT); 2887 } 2888 2889 static int 2890 intel_sdvo_ddc_proxy_attach(device_t idev) 2891 { 2892 struct intel_sdvo_ddc_proxy_sc *sc; 2893 2894 sc = device_get_softc(idev); 2895 sc->port = device_add_child(idev, "iicbus", -1); 2896 if (sc->port == NULL) 2897 return (ENXIO); 2898 device_quiet(sc->port); 2899 bus_generic_attach(idev); 2900 return (0); 2901 } 2902 2903 static int 2904 intel_sdvo_ddc_proxy_detach(device_t idev) 2905 { 2906 struct intel_sdvo_ddc_proxy_sc *sc; 2907 device_t port; 2908 2909 sc = device_get_softc(idev); 2910 port = sc->port; 2911 bus_generic_detach(idev); 2912 if (port != NULL) 2913 device_delete_child(idev, port); 2914 return (0); 2915 } 2916 2917 static int 2918 intel_sdvo_ddc_proxy_reset(device_t idev, u_char speed, u_char addr, 2919 u_char *oldaddr) 2920 { 2921 struct intel_sdvo_ddc_proxy_sc *sc; 2922 struct intel_sdvo *sdvo; 2923 2924 sc = device_get_softc(idev); 2925 sdvo = sc->intel_sdvo; 2926 2927 return (IICBUS_RESET(device_get_parent(sdvo->i2c), speed, addr, 2928 oldaddr)); 2929 } 2930 2931 static int intel_sdvo_ddc_proxy_xfer(struct device *adapter, 2932 struct i2c_msg *msgs, 2933 int num) 2934 { 2935 struct intel_sdvo_ddc_proxy_sc *sc = device_get_softc(adapter); 2936 struct intel_sdvo *sdvo = sc->intel_sdvo; 2937 2938 if (!intel_sdvo_set_control_bus_switch(sdvo, sdvo->ddc_bus)) 2939 return -EIO; 2940 2941 return (iicbus_transfer(sdvo->i2c, msgs, num)); 2942 } 2943 2944 static bool 2945 intel_sdvo_init_ddc_proxy(struct intel_sdvo *sdvo, struct drm_device *dev, 2946 int sdvo_reg) 2947 { 2948 struct intel_sdvo_ddc_proxy_sc *sc; 2949 int ret; 2950 2951 sdvo->ddc_iic_bus = device_add_child(dev->dev, 2952 "intel_sdvo_ddc_proxy", sdvo_reg); 2953 if (sdvo->ddc_iic_bus == NULL) { 2954 DRM_ERROR("cannot create ddc proxy bus %d\n", sdvo_reg); 2955 return (false); 2956 } 2957 device_quiet(sdvo->ddc_iic_bus); 2958 ret = device_probe_and_attach(sdvo->ddc_iic_bus); 2959 if (ret != 0) { 2960 DRM_ERROR("cannot attach proxy bus %d error %d\n", 2961 sdvo_reg, ret); 2962 device_delete_child(dev->dev, sdvo->ddc_iic_bus); 2963 return (false); 2964 } 2965 sc = device_get_softc(sdvo->ddc_iic_bus); 2966 sc->intel_sdvo = sdvo; 2967 2968 sdvo->ddc = sc->port; 2969 return (true); 2970 } 2971 2972 static device_method_t intel_sdvo_ddc_proxy_methods[] = { 2973 DEVMETHOD(device_probe, intel_sdvo_ddc_proxy_probe), 2974 DEVMETHOD(device_attach, intel_sdvo_ddc_proxy_attach), 2975 DEVMETHOD(device_detach, intel_sdvo_ddc_proxy_detach), 2976 DEVMETHOD(iicbus_reset, intel_sdvo_ddc_proxy_reset), 2977 DEVMETHOD(iicbus_transfer, intel_sdvo_ddc_proxy_xfer), 2978 DEVMETHOD_END 2979 }; 2980 static driver_t intel_sdvo_ddc_proxy_driver = { 2981 "intel_sdvo_ddc_proxy", 2982 intel_sdvo_ddc_proxy_methods, 2983 sizeof(struct intel_sdvo_ddc_proxy_sc) 2984 }; 2985 static devclass_t intel_sdvo_devclass; 2986 DRIVER_MODULE_ORDERED(intel_sdvo_ddc_proxy, drm, intel_sdvo_ddc_proxy_driver, 2987 intel_sdvo_devclass, 0, 0, SI_ORDER_FIRST); 2988 2989 bool intel_sdvo_init(struct drm_device *dev, uint32_t sdvo_reg, bool is_sdvob) 2990 { 2991 struct drm_i915_private *dev_priv = dev->dev_private; 2992 struct intel_encoder *intel_encoder; 2993 struct intel_sdvo *intel_sdvo; 2994 int i; 2995 intel_sdvo = kzalloc(sizeof(*intel_sdvo), GFP_KERNEL); 2996 if (!intel_sdvo) 2997 return false; 2998 2999 intel_sdvo->sdvo_reg = sdvo_reg; 3000 intel_sdvo->is_sdvob = is_sdvob; 3001 intel_sdvo->slave_addr = intel_sdvo_get_slave_addr(dev, intel_sdvo) >> 1; 3002 intel_sdvo_select_i2c_bus(dev_priv, intel_sdvo, sdvo_reg); 3003 if (!intel_sdvo_init_ddc_proxy(intel_sdvo, dev, sdvo_reg)) 3004 goto err_i2c_bus; 3005 3006 /* encoder type will be decided later */ 3007 intel_encoder = &intel_sdvo->base; 3008 intel_encoder->type = INTEL_OUTPUT_SDVO; 3009 drm_encoder_init(dev, &intel_encoder->base, &intel_sdvo_enc_funcs, 0); 3010 3011 /* Read the regs to test if we can talk to the device */ 3012 for (i = 0; i < 0x40; i++) { 3013 u8 byte; 3014 3015 if (!intel_sdvo_read_byte(intel_sdvo, i, &byte)) { 3016 DRM_DEBUG_KMS("No SDVO device found on %s\n", 3017 SDVO_NAME(intel_sdvo)); 3018 goto err; 3019 } 3020 } 3021 3022 intel_encoder->compute_config = intel_sdvo_compute_config; 3023 intel_encoder->disable = intel_disable_sdvo; 3024 intel_encoder->mode_set = intel_sdvo_mode_set; 3025 intel_encoder->enable = intel_enable_sdvo; 3026 intel_encoder->get_hw_state = intel_sdvo_get_hw_state; 3027 intel_encoder->get_config = intel_sdvo_get_config; 3028 3029 /* In default case sdvo lvds is false */ 3030 if (!intel_sdvo_get_capabilities(intel_sdvo, &intel_sdvo->caps)) 3031 goto err; 3032 3033 if (intel_sdvo_output_setup(intel_sdvo, 3034 intel_sdvo->caps.output_flags) != true) { 3035 DRM_DEBUG_KMS("SDVO output failed to setup on %s\n", 3036 SDVO_NAME(intel_sdvo)); 3037 /* Output_setup can leave behind connectors! */ 3038 goto err_output; 3039 } 3040 3041 /* Only enable the hotplug irq if we need it, to work around noisy 3042 * hotplug lines. 3043 */ 3044 if (intel_sdvo->hotplug_active) { 3045 intel_encoder->hpd_pin = 3046 intel_sdvo->is_sdvob ? HPD_SDVO_B : HPD_SDVO_C; 3047 } 3048 3049 /* 3050 * Cloning SDVO with anything is often impossible, since the SDVO 3051 * encoder can request a special input timing mode. And even if that's 3052 * not the case we have evidence that cloning a plain unscaled mode with 3053 * VGA doesn't really work. Furthermore the cloning flags are way too 3054 * simplistic anyway to express such constraints, so just give up on 3055 * cloning for SDVO encoders. 3056 */ 3057 intel_sdvo->base.cloneable = false; 3058 3059 intel_sdvo_select_ddc_bus(dev_priv, intel_sdvo, sdvo_reg); 3060 3061 /* Set the input timing to the screen. Assume always input 0. */ 3062 if (!intel_sdvo_set_target_input(intel_sdvo)) 3063 goto err_output; 3064 3065 if (!intel_sdvo_get_input_pixel_clock_range(intel_sdvo, 3066 &intel_sdvo->pixel_clock_min, 3067 &intel_sdvo->pixel_clock_max)) 3068 goto err_output; 3069 3070 DRM_DEBUG_KMS("%s device VID/DID: %02X:%02X.%02X, " 3071 "clock range %dMHz - %dMHz, " 3072 "input 1: %c, input 2: %c, " 3073 "output 1: %c, output 2: %c\n", 3074 SDVO_NAME(intel_sdvo), 3075 intel_sdvo->caps.vendor_id, intel_sdvo->caps.device_id, 3076 intel_sdvo->caps.device_rev_id, 3077 intel_sdvo->pixel_clock_min / 1000, 3078 intel_sdvo->pixel_clock_max / 1000, 3079 (intel_sdvo->caps.sdvo_inputs_mask & 0x1) ? 'Y' : 'N', 3080 (intel_sdvo->caps.sdvo_inputs_mask & 0x2) ? 'Y' : 'N', 3081 /* check currently supported outputs */ 3082 intel_sdvo->caps.output_flags & 3083 (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_RGB0) ? 'Y' : 'N', 3084 intel_sdvo->caps.output_flags & 3085 (SDVO_OUTPUT_TMDS1 | SDVO_OUTPUT_RGB1) ? 'Y' : 'N'); 3086 return true; 3087 3088 err_output: 3089 intel_sdvo_output_cleanup(intel_sdvo); 3090 3091 err: 3092 drm_encoder_cleanup(&intel_encoder->base); 3093 err_i2c_bus: 3094 intel_sdvo_unselect_i2c_bus(intel_sdvo); 3095 kfree(intel_sdvo); 3096 3097 return false; 3098 } 3099