1 /* 2 * Copyright © 2006-2010 Intel Corporation 3 * Copyright (c) 2006 Dave Airlie <airlied@linux.ie> 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining a 6 * copy of this software and associated documentation files (the "Software"), 7 * to deal in the Software without restriction, including without limitation 8 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 9 * and/or sell copies of the Software, and to permit persons to whom the 10 * Software is furnished to do so, subject to the following conditions: 11 * 12 * The above copyright notice and this permission notice (including the next 13 * paragraph) shall be included in all copies or substantial portions of the 14 * Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 22 * DEALINGS IN THE SOFTWARE. 23 * 24 * Authors: 25 * Eric Anholt <eric@anholt.net> 26 * Dave Airlie <airlied@linux.ie> 27 * Jesse Barnes <jesse.barnes@intel.com> 28 * Chris Wilson <chris@chris-wilson.co.uk> 29 * 30 * $FreeBSD: src/sys/dev/drm2/i915/intel_panel.c,v 1.1 2012/05/22 11:07:44 kib Exp $ 31 */ 32 33 #include <dev/drm/drmP.h> 34 #include <dev/drm/drm.h> 35 #include "i915_drm.h" 36 #include "intel_drv.h" 37 38 #define PCI_LBPC 0xf4 /* legacy/combination backlight modes */ 39 40 void 41 intel_fixed_panel_mode(struct drm_display_mode *fixed_mode, 42 struct drm_display_mode *adjusted_mode) 43 { 44 adjusted_mode->hdisplay = fixed_mode->hdisplay; 45 adjusted_mode->hsync_start = fixed_mode->hsync_start; 46 adjusted_mode->hsync_end = fixed_mode->hsync_end; 47 adjusted_mode->htotal = fixed_mode->htotal; 48 49 adjusted_mode->vdisplay = fixed_mode->vdisplay; 50 adjusted_mode->vsync_start = fixed_mode->vsync_start; 51 adjusted_mode->vsync_end = fixed_mode->vsync_end; 52 adjusted_mode->vtotal = fixed_mode->vtotal; 53 54 adjusted_mode->clock = fixed_mode->clock; 55 } 56 57 /* adjusted_mode has been preset to be the panel's fixed mode */ 58 void 59 intel_pch_panel_fitting(struct drm_device *dev, 60 int fitting_mode, 61 const struct drm_display_mode *mode, 62 struct drm_display_mode *adjusted_mode) 63 { 64 struct drm_i915_private *dev_priv = dev->dev_private; 65 int x, y, width, height; 66 67 x = y = width = height = 0; 68 69 /* Native modes don't need fitting */ 70 if (adjusted_mode->hdisplay == mode->hdisplay && 71 adjusted_mode->vdisplay == mode->vdisplay) 72 goto done; 73 74 switch (fitting_mode) { 75 case DRM_MODE_SCALE_CENTER: 76 width = mode->hdisplay; 77 height = mode->vdisplay; 78 x = (adjusted_mode->hdisplay - width + 1)/2; 79 y = (adjusted_mode->vdisplay - height + 1)/2; 80 break; 81 82 case DRM_MODE_SCALE_ASPECT: 83 /* Scale but preserve the aspect ratio */ 84 { 85 u32 scaled_width = adjusted_mode->hdisplay * mode->vdisplay; 86 u32 scaled_height = mode->hdisplay * adjusted_mode->vdisplay; 87 if (scaled_width > scaled_height) { /* pillar */ 88 width = scaled_height / mode->vdisplay; 89 if (width & 1) 90 width++; 91 x = (adjusted_mode->hdisplay - width + 1) / 2; 92 y = 0; 93 height = adjusted_mode->vdisplay; 94 } else if (scaled_width < scaled_height) { /* letter */ 95 height = scaled_width / mode->hdisplay; 96 if (height & 1) 97 height++; 98 y = (adjusted_mode->vdisplay - height + 1) / 2; 99 x = 0; 100 width = adjusted_mode->hdisplay; 101 } else { 102 x = y = 0; 103 width = adjusted_mode->hdisplay; 104 height = adjusted_mode->vdisplay; 105 } 106 } 107 break; 108 109 default: 110 case DRM_MODE_SCALE_FULLSCREEN: 111 x = y = 0; 112 width = adjusted_mode->hdisplay; 113 height = adjusted_mode->vdisplay; 114 break; 115 } 116 117 done: 118 dev_priv->pch_pf_pos = (x << 16) | y; 119 dev_priv->pch_pf_size = (width << 16) | height; 120 } 121 122 static int is_backlight_combination_mode(struct drm_device *dev) 123 { 124 struct drm_i915_private *dev_priv = dev->dev_private; 125 126 if (INTEL_INFO(dev)->gen >= 4) 127 return I915_READ(BLC_PWM_CTL2) & BLM_COMBINATION_MODE; 128 129 if (IS_GEN2(dev)) 130 return I915_READ(BLC_PWM_CTL) & BLM_LEGACY_MODE; 131 132 return 0; 133 } 134 135 static u32 i915_read_blc_pwm_ctl(struct drm_i915_private *dev_priv) 136 { 137 u32 val; 138 139 /* Restore the CTL value if it lost, e.g. GPU reset */ 140 141 if (HAS_PCH_SPLIT(dev_priv->dev)) { 142 val = I915_READ(BLC_PWM_PCH_CTL2); 143 if (dev_priv->saveBLC_PWM_CTL2 == 0) { 144 dev_priv->saveBLC_PWM_CTL2 = val; 145 } else if (val == 0) { 146 I915_WRITE(BLC_PWM_PCH_CTL2, 147 dev_priv->saveBLC_PWM_CTL2); 148 val = dev_priv->saveBLC_PWM_CTL2; 149 } 150 } else { 151 val = I915_READ(BLC_PWM_CTL); 152 if (dev_priv->saveBLC_PWM_CTL == 0) { 153 dev_priv->saveBLC_PWM_CTL = val; 154 dev_priv->saveBLC_PWM_CTL2 = I915_READ(BLC_PWM_CTL2); 155 } else if (val == 0) { 156 I915_WRITE(BLC_PWM_CTL, 157 dev_priv->saveBLC_PWM_CTL); 158 I915_WRITE(BLC_PWM_CTL2, 159 dev_priv->saveBLC_PWM_CTL2); 160 val = dev_priv->saveBLC_PWM_CTL; 161 } 162 } 163 164 return val; 165 } 166 167 u32 intel_panel_get_max_backlight(struct drm_device *dev) 168 { 169 struct drm_i915_private *dev_priv = dev->dev_private; 170 u32 max; 171 172 max = i915_read_blc_pwm_ctl(dev_priv); 173 if (max == 0) { 174 /* XXX add code here to query mode clock or hardware clock 175 * and program max PWM appropriately. 176 */ 177 #if 0 178 printf("fixme: max PWM is zero.\n"); 179 #endif 180 return 1; 181 } 182 183 if (HAS_PCH_SPLIT(dev)) { 184 max >>= 16; 185 } else { 186 if (INTEL_INFO(dev)->gen < 4) 187 max >>= 17; 188 else 189 max >>= 16; 190 191 if (is_backlight_combination_mode(dev)) 192 max *= 0xff; 193 } 194 195 DRM_DEBUG("max backlight PWM = %d\n", max); 196 return max; 197 } 198 199 u32 intel_panel_get_backlight(struct drm_device *dev) 200 { 201 struct drm_i915_private *dev_priv = dev->dev_private; 202 u32 val; 203 204 if (HAS_PCH_SPLIT(dev)) { 205 val = I915_READ(BLC_PWM_CPU_CTL) & BACKLIGHT_DUTY_CYCLE_MASK; 206 } else { 207 val = I915_READ(BLC_PWM_CTL) & BACKLIGHT_DUTY_CYCLE_MASK; 208 if (INTEL_INFO(dev)->gen < 4) 209 val >>= 1; 210 211 if (is_backlight_combination_mode(dev)) { 212 u8 lbpc; 213 214 lbpc = pci_read_config(dev->device, PCI_LBPC, 1); 215 val *= lbpc; 216 } 217 } 218 219 DRM_DEBUG("get backlight PWM = %d\n", val); 220 return val; 221 } 222 223 static void intel_pch_panel_set_backlight(struct drm_device *dev, u32 level) 224 { 225 struct drm_i915_private *dev_priv = dev->dev_private; 226 u32 val = I915_READ(BLC_PWM_CPU_CTL) & ~BACKLIGHT_DUTY_CYCLE_MASK; 227 I915_WRITE(BLC_PWM_CPU_CTL, val | level); 228 } 229 230 static void intel_panel_actually_set_backlight(struct drm_device *dev, u32 level) 231 { 232 struct drm_i915_private *dev_priv = dev->dev_private; 233 u32 tmp; 234 235 DRM_DEBUG("set backlight PWM = %d\n", level); 236 237 if (HAS_PCH_SPLIT(dev)) 238 return intel_pch_panel_set_backlight(dev, level); 239 240 if (is_backlight_combination_mode(dev)) { 241 u32 max = intel_panel_get_max_backlight(dev); 242 u8 lbpc; 243 244 lbpc = level * 0xfe / max + 1; 245 level /= lbpc; 246 pci_write_config(dev->device, PCI_LBPC, lbpc, 4); 247 } 248 249 tmp = I915_READ(BLC_PWM_CTL); 250 if (INTEL_INFO(dev)->gen < 4) 251 level <<= 1; 252 tmp &= ~BACKLIGHT_DUTY_CYCLE_MASK; 253 I915_WRITE(BLC_PWM_CTL, tmp | level); 254 } 255 256 void intel_panel_set_backlight(struct drm_device *dev, u32 level) 257 { 258 struct drm_i915_private *dev_priv = dev->dev_private; 259 260 dev_priv->backlight_level = level; 261 if (dev_priv->backlight_enabled) 262 intel_panel_actually_set_backlight(dev, level); 263 } 264 265 void intel_panel_disable_backlight(struct drm_device *dev) 266 { 267 struct drm_i915_private *dev_priv = dev->dev_private; 268 269 dev_priv->backlight_enabled = false; 270 intel_panel_actually_set_backlight(dev, 0); 271 } 272 273 void intel_panel_enable_backlight(struct drm_device *dev) 274 { 275 struct drm_i915_private *dev_priv = dev->dev_private; 276 277 if (dev_priv->backlight_level == 0) 278 dev_priv->backlight_level = intel_panel_get_max_backlight(dev); 279 280 dev_priv->backlight_enabled = true; 281 intel_panel_actually_set_backlight(dev, dev_priv->backlight_level); 282 } 283 284 static void intel_panel_init_backlight(struct drm_device *dev) 285 { 286 struct drm_i915_private *dev_priv = dev->dev_private; 287 288 dev_priv->backlight_level = intel_panel_get_backlight(dev); 289 dev_priv->backlight_enabled = dev_priv->backlight_level != 0; 290 } 291 292 enum drm_connector_status 293 intel_panel_detect(struct drm_device *dev) 294 { 295 #if 0 296 struct drm_i915_private *dev_priv = dev->dev_private; 297 #endif 298 299 if (i915_panel_ignore_lid) 300 return i915_panel_ignore_lid > 0 ? 301 connector_status_connected : 302 connector_status_disconnected; 303 304 /* opregion lid state on HP 2540p is wrong at boot up, 305 * appears to be either the BIOS or Linux ACPI fault */ 306 #if 0 307 /* Assume that the BIOS does not lie through the OpRegion... */ 308 if (dev_priv->opregion.lid_state) 309 return ioread32(dev_priv->opregion.lid_state) & 0x1 ? 310 connector_status_connected : 311 connector_status_disconnected; 312 #endif 313 314 return connector_status_unknown; 315 } 316 317 int intel_panel_setup_backlight(struct drm_device *dev) 318 { 319 intel_panel_init_backlight(dev); 320 return 0; 321 } 322 323 void intel_panel_destroy_backlight(struct drm_device *dev) 324 { 325 return; 326 } 327