1a05eeebfSFrançois Tigeot /* 2a05eeebfSFrançois Tigeot * Copyright (c) 2015 Intel Corporation 3a05eeebfSFrançois Tigeot * 4a05eeebfSFrançois Tigeot * Permission is hereby granted, free of charge, to any person obtaining a 5a05eeebfSFrançois Tigeot * copy of this software and associated documentation files (the "Software"), 6a05eeebfSFrançois Tigeot * to deal in the Software without restriction, including without limitation 7a05eeebfSFrançois Tigeot * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8a05eeebfSFrançois Tigeot * and/or sell copies of the Software, and to permit persons to whom the 9a05eeebfSFrançois Tigeot * Software is furnished to do so, subject to the following conditions: 10a05eeebfSFrançois Tigeot * 11a05eeebfSFrançois Tigeot * The above copyright notice and this permission notice (including the next 12a05eeebfSFrançois Tigeot * paragraph) shall be included in all copies or substantial portions of the 13a05eeebfSFrançois Tigeot * Software. 14a05eeebfSFrançois Tigeot * 15a05eeebfSFrançois Tigeot * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16a05eeebfSFrançois Tigeot * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17a05eeebfSFrançois Tigeot * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18a05eeebfSFrançois Tigeot * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 19a05eeebfSFrançois Tigeot * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 20a05eeebfSFrançois Tigeot * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 21a05eeebfSFrançois Tigeot * SOFTWARE. 22a05eeebfSFrançois Tigeot */ 23a05eeebfSFrançois Tigeot 24a05eeebfSFrançois Tigeot #ifndef INTEL_MOCS_H 25a05eeebfSFrançois Tigeot #define INTEL_MOCS_H 26a05eeebfSFrançois Tigeot 27a05eeebfSFrançois Tigeot /** 28a05eeebfSFrançois Tigeot * DOC: Memory Objects Control State (MOCS) 29a05eeebfSFrançois Tigeot * 30a05eeebfSFrançois Tigeot * Motivation: 31a05eeebfSFrançois Tigeot * In previous Gens the MOCS settings was a value that was set by user land as 32a05eeebfSFrançois Tigeot * part of the batch. In Gen9 this has changed to be a single table (per ring) 33a05eeebfSFrançois Tigeot * that all batches now reference by index instead of programming the MOCS 34a05eeebfSFrançois Tigeot * directly. 35a05eeebfSFrançois Tigeot * 36a05eeebfSFrançois Tigeot * The one wrinkle in this is that only PART of the MOCS tables are included 37a05eeebfSFrançois Tigeot * in context (The GFX_MOCS_0 - GFX_MOCS_64 and the LNCFCMOCS0 - LNCFCMOCS32 38a05eeebfSFrançois Tigeot * registers). The rest are not (the settings for the other rings). 39a05eeebfSFrançois Tigeot * 40a05eeebfSFrançois Tigeot * This table needs to be set at system start-up because the way the table 41a05eeebfSFrançois Tigeot * interacts with the contexts and the GmmLib interface. 42a05eeebfSFrançois Tigeot * 43a05eeebfSFrançois Tigeot * 44a05eeebfSFrançois Tigeot * Implementation: 45a05eeebfSFrançois Tigeot * 46a05eeebfSFrançois Tigeot * The tables (one per supported platform) are defined in intel_mocs.c 47a05eeebfSFrançois Tigeot * and are programmed in the first batch after the context is loaded 48a05eeebfSFrançois Tigeot * (with the hardware workarounds). This will then let the usual 49a05eeebfSFrançois Tigeot * context handling keep the MOCS in step. 50a05eeebfSFrançois Tigeot */ 51a05eeebfSFrançois Tigeot 52a05eeebfSFrançois Tigeot #include <drm/drmP.h> 53a05eeebfSFrançois Tigeot #include "i915_drv.h" 54a05eeebfSFrançois Tigeot 55a05eeebfSFrançois Tigeot int intel_rcs_context_init_mocs(struct drm_i915_gem_request *req); 56*a85cb24fSFrançois Tigeot void intel_mocs_init_l3cc_table(struct drm_i915_private *dev_priv); 5787df8fc6SFrançois Tigeot int intel_mocs_init_engine(struct intel_engine_cs *engine); 58a05eeebfSFrançois Tigeot 59a05eeebfSFrançois Tigeot #endif 60