1 /* 2 * Copyright © 2006-2007 Intel Corporation 3 * Copyright (c) 2006 Dave Airlie <airlied@linux.ie> 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining a 6 * copy of this software and associated documentation files (the "Software"), 7 * to deal in the Software without restriction, including without limitation 8 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 9 * and/or sell copies of the Software, and to permit persons to whom the 10 * Software is furnished to do so, subject to the following conditions: 11 * 12 * The above copyright notice and this permission notice (including the next 13 * paragraph) shall be included in all copies or substantial portions of the 14 * Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 22 * DEALINGS IN THE SOFTWARE. 23 * 24 * Authors: 25 * Eric Anholt <eric@anholt.net> 26 * Dave Airlie <airlied@linux.ie> 27 * Jesse Barnes <jesse.barnes@intel.com> 28 */ 29 30 #include <linux/dmi.h> 31 #include <linux/i2c.h> 32 #include <drm/drmP.h> 33 #include <drm/drm_atomic_helper.h> 34 #include <drm/drm_crtc.h> 35 #include <drm/drm_edid.h> 36 #include "intel_drv.h" 37 #include <drm/i915_drm.h> 38 #include "i915_drv.h" 39 40 /* Private structure for the integrated LVDS support */ 41 struct intel_lvds_connector { 42 struct intel_connector base; 43 44 struct notifier_block lid_notifier; 45 }; 46 47 struct intel_lvds_encoder { 48 struct intel_encoder base; 49 50 bool is_dual_link; 51 u32 reg; 52 u32 a3_power; 53 54 struct intel_lvds_connector *attached_connector; 55 }; 56 57 static struct intel_lvds_encoder *to_lvds_encoder(struct drm_encoder *encoder) 58 { 59 return container_of(encoder, struct intel_lvds_encoder, base.base); 60 } 61 62 static struct intel_lvds_connector *to_lvds_connector(struct drm_connector *connector) 63 { 64 return container_of(connector, struct intel_lvds_connector, base.base); 65 } 66 67 static bool intel_lvds_get_hw_state(struct intel_encoder *encoder, 68 enum i915_pipe *pipe) 69 { 70 struct drm_device *dev = encoder->base.dev; 71 struct drm_i915_private *dev_priv = dev->dev_private; 72 struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base); 73 enum intel_display_power_domain power_domain; 74 u32 tmp; 75 76 power_domain = intel_display_port_power_domain(encoder); 77 if (!intel_display_power_is_enabled(dev_priv, power_domain)) 78 return false; 79 80 tmp = I915_READ(lvds_encoder->reg); 81 82 if (!(tmp & LVDS_PORT_EN)) 83 return false; 84 85 if (HAS_PCH_CPT(dev)) 86 *pipe = PORT_TO_PIPE_CPT(tmp); 87 else 88 *pipe = PORT_TO_PIPE(tmp); 89 90 return true; 91 } 92 93 static void intel_lvds_get_config(struct intel_encoder *encoder, 94 struct intel_crtc_state *pipe_config) 95 { 96 struct drm_device *dev = encoder->base.dev; 97 struct drm_i915_private *dev_priv = dev->dev_private; 98 struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base); 99 u32 tmp, flags = 0; 100 int dotclock; 101 102 tmp = I915_READ(lvds_encoder->reg); 103 if (tmp & LVDS_HSYNC_POLARITY) 104 flags |= DRM_MODE_FLAG_NHSYNC; 105 else 106 flags |= DRM_MODE_FLAG_PHSYNC; 107 if (tmp & LVDS_VSYNC_POLARITY) 108 flags |= DRM_MODE_FLAG_NVSYNC; 109 else 110 flags |= DRM_MODE_FLAG_PVSYNC; 111 112 pipe_config->base.adjusted_mode.flags |= flags; 113 114 /* gen2/3 store dither state in pfit control, needs to match */ 115 if (INTEL_INFO(dev)->gen < 4) { 116 tmp = I915_READ(PFIT_CONTROL); 117 118 pipe_config->gmch_pfit.control |= tmp & PANEL_8TO6_DITHER_ENABLE; 119 } 120 121 dotclock = pipe_config->port_clock; 122 123 if (HAS_PCH_SPLIT(dev_priv->dev)) 124 ironlake_check_encoder_dotclock(pipe_config, dotclock); 125 126 pipe_config->base.adjusted_mode.crtc_clock = dotclock; 127 } 128 129 static void intel_pre_enable_lvds(struct intel_encoder *encoder) 130 { 131 struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base); 132 struct drm_device *dev = encoder->base.dev; 133 struct drm_i915_private *dev_priv = dev->dev_private; 134 struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc); 135 const struct drm_display_mode *adjusted_mode = &crtc->config->base.adjusted_mode; 136 int pipe = crtc->pipe; 137 u32 temp; 138 139 if (HAS_PCH_SPLIT(dev)) { 140 assert_fdi_rx_pll_disabled(dev_priv, pipe); 141 assert_shared_dpll_disabled(dev_priv, 142 intel_crtc_to_shared_dpll(crtc)); 143 } else { 144 assert_pll_disabled(dev_priv, pipe); 145 } 146 147 temp = I915_READ(lvds_encoder->reg); 148 temp |= LVDS_PORT_EN | LVDS_A0A2_CLKA_POWER_UP; 149 150 if (HAS_PCH_CPT(dev)) { 151 temp &= ~PORT_TRANS_SEL_MASK; 152 temp |= PORT_TRANS_SEL_CPT(pipe); 153 } else { 154 if (pipe == 1) { 155 temp |= LVDS_PIPEB_SELECT; 156 } else { 157 temp &= ~LVDS_PIPEB_SELECT; 158 } 159 } 160 161 /* set the corresponsding LVDS_BORDER bit */ 162 temp &= ~LVDS_BORDER_ENABLE; 163 temp |= crtc->config->gmch_pfit.lvds_border_bits; 164 /* Set the B0-B3 data pairs corresponding to whether we're going to 165 * set the DPLLs for dual-channel mode or not. 166 */ 167 if (lvds_encoder->is_dual_link) 168 temp |= LVDS_B0B3_POWER_UP | LVDS_CLKB_POWER_UP; 169 else 170 temp &= ~(LVDS_B0B3_POWER_UP | LVDS_CLKB_POWER_UP); 171 172 /* It would be nice to set 24 vs 18-bit mode (LVDS_A3_POWER_UP) 173 * appropriately here, but we need to look more thoroughly into how 174 * panels behave in the two modes. For now, let's just maintain the 175 * value we got from the BIOS. 176 */ 177 temp &= ~LVDS_A3_POWER_MASK; 178 temp |= lvds_encoder->a3_power; 179 180 /* Set the dithering flag on LVDS as needed, note that there is no 181 * special lvds dither control bit on pch-split platforms, dithering is 182 * only controlled through the PIPECONF reg. */ 183 if (INTEL_INFO(dev)->gen == 4) { 184 /* Bspec wording suggests that LVDS port dithering only exists 185 * for 18bpp panels. */ 186 if (crtc->config->dither && crtc->config->pipe_bpp == 18) 187 temp |= LVDS_ENABLE_DITHER; 188 else 189 temp &= ~LVDS_ENABLE_DITHER; 190 } 191 temp &= ~(LVDS_HSYNC_POLARITY | LVDS_VSYNC_POLARITY); 192 if (adjusted_mode->flags & DRM_MODE_FLAG_NHSYNC) 193 temp |= LVDS_HSYNC_POLARITY; 194 if (adjusted_mode->flags & DRM_MODE_FLAG_NVSYNC) 195 temp |= LVDS_VSYNC_POLARITY; 196 197 I915_WRITE(lvds_encoder->reg, temp); 198 } 199 200 /** 201 * Sets the power state for the panel. 202 */ 203 static void intel_enable_lvds(struct intel_encoder *encoder) 204 { 205 struct drm_device *dev = encoder->base.dev; 206 struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base); 207 struct intel_connector *intel_connector = 208 &lvds_encoder->attached_connector->base; 209 struct drm_i915_private *dev_priv = dev->dev_private; 210 u32 ctl_reg, stat_reg; 211 212 if (HAS_PCH_SPLIT(dev)) { 213 ctl_reg = PCH_PP_CONTROL; 214 stat_reg = PCH_PP_STATUS; 215 } else { 216 ctl_reg = PP_CONTROL; 217 stat_reg = PP_STATUS; 218 } 219 220 I915_WRITE(lvds_encoder->reg, I915_READ(lvds_encoder->reg) | LVDS_PORT_EN); 221 222 I915_WRITE(ctl_reg, I915_READ(ctl_reg) | POWER_TARGET_ON); 223 POSTING_READ(lvds_encoder->reg); 224 if (wait_for((I915_READ(stat_reg) & PP_ON) != 0, 1000)) 225 DRM_ERROR("timed out waiting for panel to power on\n"); 226 227 intel_panel_enable_backlight(intel_connector); 228 } 229 230 static void intel_disable_lvds(struct intel_encoder *encoder) 231 { 232 struct drm_device *dev = encoder->base.dev; 233 struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base); 234 struct drm_i915_private *dev_priv = dev->dev_private; 235 u32 ctl_reg, stat_reg; 236 237 if (HAS_PCH_SPLIT(dev)) { 238 ctl_reg = PCH_PP_CONTROL; 239 stat_reg = PCH_PP_STATUS; 240 } else { 241 ctl_reg = PP_CONTROL; 242 stat_reg = PP_STATUS; 243 } 244 245 I915_WRITE(ctl_reg, I915_READ(ctl_reg) & ~POWER_TARGET_ON); 246 if (wait_for((I915_READ(stat_reg) & PP_ON) == 0, 1000)) 247 DRM_ERROR("timed out waiting for panel to power off\n"); 248 249 I915_WRITE(lvds_encoder->reg, I915_READ(lvds_encoder->reg) & ~LVDS_PORT_EN); 250 POSTING_READ(lvds_encoder->reg); 251 } 252 253 static void gmch_disable_lvds(struct intel_encoder *encoder) 254 { 255 struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base); 256 struct intel_connector *intel_connector = 257 &lvds_encoder->attached_connector->base; 258 259 intel_panel_disable_backlight(intel_connector); 260 261 intel_disable_lvds(encoder); 262 } 263 264 static void pch_disable_lvds(struct intel_encoder *encoder) 265 { 266 struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base); 267 struct intel_connector *intel_connector = 268 &lvds_encoder->attached_connector->base; 269 270 intel_panel_disable_backlight(intel_connector); 271 } 272 273 static void pch_post_disable_lvds(struct intel_encoder *encoder) 274 { 275 intel_disable_lvds(encoder); 276 } 277 278 static enum drm_mode_status 279 intel_lvds_mode_valid(struct drm_connector *connector, 280 struct drm_display_mode *mode) 281 { 282 struct intel_connector *intel_connector = to_intel_connector(connector); 283 struct drm_display_mode *fixed_mode = intel_connector->panel.fixed_mode; 284 int max_pixclk = to_i915(connector->dev)->max_dotclk_freq; 285 286 if (mode->hdisplay > fixed_mode->hdisplay) 287 return MODE_PANEL; 288 if (mode->vdisplay > fixed_mode->vdisplay) 289 return MODE_PANEL; 290 if (fixed_mode->clock > max_pixclk) 291 return MODE_CLOCK_HIGH; 292 293 return MODE_OK; 294 } 295 296 static bool intel_lvds_compute_config(struct intel_encoder *intel_encoder, 297 struct intel_crtc_state *pipe_config) 298 { 299 struct drm_device *dev = intel_encoder->base.dev; 300 struct intel_lvds_encoder *lvds_encoder = 301 to_lvds_encoder(&intel_encoder->base); 302 struct intel_connector *intel_connector = 303 &lvds_encoder->attached_connector->base; 304 struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode; 305 struct intel_crtc *intel_crtc = to_intel_crtc(pipe_config->base.crtc); 306 unsigned int lvds_bpp; 307 308 /* Should never happen!! */ 309 if (INTEL_INFO(dev)->gen < 4 && intel_crtc->pipe == 0) { 310 DRM_ERROR("Can't support LVDS on pipe A\n"); 311 return false; 312 } 313 314 if (lvds_encoder->a3_power == LVDS_A3_POWER_UP) 315 lvds_bpp = 8*3; 316 else 317 lvds_bpp = 6*3; 318 319 if (lvds_bpp != pipe_config->pipe_bpp && !pipe_config->bw_constrained) { 320 DRM_DEBUG_KMS("forcing display bpp (was %d) to LVDS (%d)\n", 321 pipe_config->pipe_bpp, lvds_bpp); 322 pipe_config->pipe_bpp = lvds_bpp; 323 } 324 325 /* 326 * We have timings from the BIOS for the panel, put them in 327 * to the adjusted mode. The CRTC will be set up for this mode, 328 * with the panel scaling set up to source from the H/VDisplay 329 * of the original mode. 330 */ 331 intel_fixed_panel_mode(intel_connector->panel.fixed_mode, 332 adjusted_mode); 333 334 if (HAS_PCH_SPLIT(dev)) { 335 pipe_config->has_pch_encoder = true; 336 337 intel_pch_panel_fitting(intel_crtc, pipe_config, 338 intel_connector->panel.fitting_mode); 339 } else { 340 intel_gmch_panel_fitting(intel_crtc, pipe_config, 341 intel_connector->panel.fitting_mode); 342 343 } 344 345 /* 346 * XXX: It would be nice to support lower refresh rates on the 347 * panels to reduce power consumption, and perhaps match the 348 * user's requested refresh rate. 349 */ 350 351 return true; 352 } 353 354 /** 355 * Detect the LVDS connection. 356 * 357 * Since LVDS doesn't have hotlug, we use the lid as a proxy. Open means 358 * connected and closed means disconnected. We also send hotplug events as 359 * needed, using lid status notification from the input layer. 360 */ 361 static enum drm_connector_status 362 intel_lvds_detect(struct drm_connector *connector, bool force) 363 { 364 struct drm_device *dev = connector->dev; 365 enum drm_connector_status status; 366 367 DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n", 368 connector->base.id, connector->name); 369 370 status = intel_panel_detect(dev); 371 if (status != connector_status_unknown) 372 return status; 373 374 return connector_status_connected; 375 } 376 377 /** 378 * Return the list of DDC modes if available, or the BIOS fixed mode otherwise. 379 */ 380 static int intel_lvds_get_modes(struct drm_connector *connector) 381 { 382 struct intel_lvds_connector *lvds_connector = to_lvds_connector(connector); 383 struct drm_device *dev = connector->dev; 384 struct drm_display_mode *mode; 385 386 /* use cached edid if we have one */ 387 if (!IS_ERR_OR_NULL(lvds_connector->base.edid)) 388 return drm_add_edid_modes(connector, lvds_connector->base.edid); 389 390 mode = drm_mode_duplicate(dev, lvds_connector->base.panel.fixed_mode); 391 if (mode == NULL) 392 return 0; 393 394 drm_mode_probed_add(connector, mode); 395 return 1; 396 } 397 398 static int intel_no_modeset_on_lid_dmi_callback(const struct dmi_system_id *id) 399 { 400 DRM_INFO("Skipping forced modeset for %s\n", id->ident); 401 return 1; 402 } 403 404 /* The GPU hangs up on these systems if modeset is performed on LID open */ 405 static const struct dmi_system_id intel_no_modeset_on_lid[] = { 406 { 407 .callback = intel_no_modeset_on_lid_dmi_callback, 408 .ident = "Toshiba Tecra A11", 409 .matches = { 410 DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"), 411 DMI_MATCH(DMI_PRODUCT_NAME, "TECRA A11"), 412 }, 413 }, 414 415 { } /* terminating entry */ 416 }; 417 418 #if 0 419 /* 420 * Lid events. Note the use of 'modeset': 421 * - we set it to MODESET_ON_LID_OPEN on lid close, 422 * and set it to MODESET_DONE on open 423 * - we use it as a "only once" bit (ie we ignore 424 * duplicate events where it was already properly set) 425 * - the suspend/resume paths will set it to 426 * MODESET_SUSPENDED and ignore the lid open event, 427 * because they restore the mode ("lid open"). 428 */ 429 static int intel_lid_notify(struct notifier_block *nb, unsigned long val, 430 void *unused) 431 { 432 struct intel_lvds_connector *lvds_connector = 433 container_of(nb, struct intel_lvds_connector, lid_notifier); 434 struct drm_connector *connector = &lvds_connector->base.base; 435 struct drm_device *dev = connector->dev; 436 struct drm_i915_private *dev_priv = dev->dev_private; 437 438 if (dev->switch_power_state != DRM_SWITCH_POWER_ON) 439 return NOTIFY_OK; 440 441 mutex_lock(&dev_priv->modeset_restore_lock); 442 if (dev_priv->modeset_restore == MODESET_SUSPENDED) 443 goto exit; 444 /* 445 * check and update the status of LVDS connector after receiving 446 * the LID nofication event. 447 */ 448 connector->status = connector->funcs->detect(connector, false); 449 450 /* Don't force modeset on machines where it causes a GPU lockup */ 451 if (dmi_check_system(intel_no_modeset_on_lid)) 452 goto exit; 453 if (!acpi_lid_open()) { 454 /* do modeset on next lid open event */ 455 dev_priv->modeset_restore = MODESET_ON_LID_OPEN; 456 goto exit; 457 } 458 459 if (dev_priv->modeset_restore == MODESET_DONE) 460 goto exit; 461 462 /* 463 * Some old platform's BIOS love to wreak havoc while the lid is closed. 464 * We try to detect this here and undo any damage. The split for PCH 465 * platforms is rather conservative and a bit arbitrary expect that on 466 * those platforms VGA disabling requires actual legacy VGA I/O access, 467 * and as part of the cleanup in the hw state restore we also redisable 468 * the vga plane. 469 */ 470 if (!HAS_PCH_SPLIT(dev)) { 471 drm_modeset_lock_all(dev); 472 intel_display_resume(dev); 473 drm_modeset_unlock_all(dev); 474 } 475 476 dev_priv->modeset_restore = MODESET_DONE; 477 478 exit: 479 mutex_unlock(&dev_priv->modeset_restore_lock); 480 return NOTIFY_OK; 481 } 482 #endif 483 484 /** 485 * intel_lvds_destroy - unregister and free LVDS structures 486 * @connector: connector to free 487 * 488 * Unregister the DDC bus for this connector then free the driver private 489 * structure. 490 */ 491 static void intel_lvds_destroy(struct drm_connector *connector) 492 { 493 struct intel_lvds_connector *lvds_connector = 494 to_lvds_connector(connector); 495 496 #if 0 497 if (lvds_connector->lid_notifier.notifier_call) 498 acpi_lid_notifier_unregister(&lvds_connector->lid_notifier); 499 #endif 500 501 if (!IS_ERR_OR_NULL(lvds_connector->base.edid)) 502 kfree(lvds_connector->base.edid); 503 504 intel_panel_fini(&lvds_connector->base.panel); 505 506 drm_connector_cleanup(connector); 507 kfree(connector); 508 } 509 510 static int intel_lvds_set_property(struct drm_connector *connector, 511 struct drm_property *property, 512 uint64_t value) 513 { 514 struct intel_connector *intel_connector = to_intel_connector(connector); 515 struct drm_device *dev = connector->dev; 516 517 if (property == dev->mode_config.scaling_mode_property) { 518 struct drm_crtc *crtc; 519 520 if (value == DRM_MODE_SCALE_NONE) { 521 DRM_DEBUG_KMS("no scaling not supported\n"); 522 return -EINVAL; 523 } 524 525 if (intel_connector->panel.fitting_mode == value) { 526 /* the LVDS scaling property is not changed */ 527 return 0; 528 } 529 intel_connector->panel.fitting_mode = value; 530 531 crtc = intel_attached_encoder(connector)->base.crtc; 532 if (crtc && crtc->state->enable) { 533 /* 534 * If the CRTC is enabled, the display will be changed 535 * according to the new panel fitting mode. 536 */ 537 intel_crtc_restore_mode(crtc); 538 } 539 } 540 541 return 0; 542 } 543 544 static const struct drm_connector_helper_funcs intel_lvds_connector_helper_funcs = { 545 .get_modes = intel_lvds_get_modes, 546 .mode_valid = intel_lvds_mode_valid, 547 .best_encoder = intel_best_encoder, 548 }; 549 550 static const struct drm_connector_funcs intel_lvds_connector_funcs = { 551 .dpms = drm_atomic_helper_connector_dpms, 552 .detect = intel_lvds_detect, 553 .fill_modes = drm_helper_probe_single_connector_modes, 554 .set_property = intel_lvds_set_property, 555 .atomic_get_property = intel_connector_atomic_get_property, 556 .destroy = intel_lvds_destroy, 557 .atomic_destroy_state = drm_atomic_helper_connector_destroy_state, 558 .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state, 559 }; 560 561 static const struct drm_encoder_funcs intel_lvds_enc_funcs = { 562 .destroy = intel_encoder_destroy, 563 }; 564 565 static int intel_no_lvds_dmi_callback(const struct dmi_system_id *id) 566 { 567 DRM_INFO("Skipping LVDS initialization for %s\n", id->ident); 568 return 1; 569 } 570 571 /* These systems claim to have LVDS, but really don't */ 572 static const struct dmi_system_id intel_no_lvds[] = { 573 { 574 .callback = intel_no_lvds_dmi_callback, 575 .ident = "Apple Mac Mini (Core series)", 576 .matches = { 577 DMI_MATCH(DMI_SYS_VENDOR, "Apple"), 578 DMI_MATCH(DMI_PRODUCT_NAME, "Macmini1,1"), 579 }, 580 }, 581 { 582 .callback = intel_no_lvds_dmi_callback, 583 .ident = "Apple Mac Mini (Core 2 series)", 584 .matches = { 585 DMI_MATCH(DMI_SYS_VENDOR, "Apple"), 586 DMI_MATCH(DMI_PRODUCT_NAME, "Macmini2,1"), 587 }, 588 }, 589 { 590 .callback = intel_no_lvds_dmi_callback, 591 .ident = "MSI IM-945GSE-A", 592 .matches = { 593 DMI_MATCH(DMI_SYS_VENDOR, "MSI"), 594 DMI_MATCH(DMI_PRODUCT_NAME, "A9830IMS"), 595 }, 596 }, 597 { 598 .callback = intel_no_lvds_dmi_callback, 599 .ident = "Dell Studio Hybrid", 600 .matches = { 601 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), 602 DMI_MATCH(DMI_PRODUCT_NAME, "Studio Hybrid 140g"), 603 }, 604 }, 605 { 606 .callback = intel_no_lvds_dmi_callback, 607 .ident = "Dell OptiPlex FX170", 608 .matches = { 609 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), 610 DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex FX170"), 611 }, 612 }, 613 { 614 .callback = intel_no_lvds_dmi_callback, 615 .ident = "AOpen Mini PC", 616 .matches = { 617 DMI_MATCH(DMI_SYS_VENDOR, "AOpen"), 618 DMI_MATCH(DMI_PRODUCT_NAME, "i965GMx-IF"), 619 }, 620 }, 621 { 622 .callback = intel_no_lvds_dmi_callback, 623 .ident = "AOpen Mini PC MP915", 624 .matches = { 625 DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"), 626 DMI_MATCH(DMI_BOARD_NAME, "i915GMx-F"), 627 }, 628 }, 629 { 630 .callback = intel_no_lvds_dmi_callback, 631 .ident = "AOpen i915GMm-HFS", 632 .matches = { 633 DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"), 634 DMI_MATCH(DMI_BOARD_NAME, "i915GMm-HFS"), 635 }, 636 }, 637 { 638 .callback = intel_no_lvds_dmi_callback, 639 .ident = "AOpen i45GMx-I", 640 .matches = { 641 DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"), 642 DMI_MATCH(DMI_BOARD_NAME, "i45GMx-I"), 643 }, 644 }, 645 { 646 .callback = intel_no_lvds_dmi_callback, 647 .ident = "Aopen i945GTt-VFA", 648 .matches = { 649 DMI_MATCH(DMI_PRODUCT_VERSION, "AO00001JW"), 650 }, 651 }, 652 { 653 .callback = intel_no_lvds_dmi_callback, 654 .ident = "Clientron U800", 655 .matches = { 656 DMI_MATCH(DMI_SYS_VENDOR, "Clientron"), 657 DMI_MATCH(DMI_PRODUCT_NAME, "U800"), 658 }, 659 }, 660 { 661 .callback = intel_no_lvds_dmi_callback, 662 .ident = "Clientron E830", 663 .matches = { 664 DMI_MATCH(DMI_SYS_VENDOR, "Clientron"), 665 DMI_MATCH(DMI_PRODUCT_NAME, "E830"), 666 }, 667 }, 668 { 669 .callback = intel_no_lvds_dmi_callback, 670 .ident = "Asus EeeBox PC EB1007", 671 .matches = { 672 DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK Computer INC."), 673 DMI_MATCH(DMI_PRODUCT_NAME, "EB1007"), 674 }, 675 }, 676 { 677 .callback = intel_no_lvds_dmi_callback, 678 .ident = "Asus AT5NM10T-I", 679 .matches = { 680 DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."), 681 DMI_MATCH(DMI_BOARD_NAME, "AT5NM10T-I"), 682 }, 683 }, 684 { 685 .callback = intel_no_lvds_dmi_callback, 686 .ident = "Hewlett-Packard HP t5740", 687 .matches = { 688 DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"), 689 DMI_MATCH(DMI_PRODUCT_NAME, " t5740"), 690 }, 691 }, 692 { 693 .callback = intel_no_lvds_dmi_callback, 694 .ident = "Hewlett-Packard t5745", 695 .matches = { 696 DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"), 697 DMI_MATCH(DMI_PRODUCT_NAME, "hp t5745"), 698 }, 699 }, 700 { 701 .callback = intel_no_lvds_dmi_callback, 702 .ident = "Hewlett-Packard st5747", 703 .matches = { 704 DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"), 705 DMI_MATCH(DMI_PRODUCT_NAME, "hp st5747"), 706 }, 707 }, 708 { 709 .callback = intel_no_lvds_dmi_callback, 710 .ident = "MSI Wind Box DC500", 711 .matches = { 712 DMI_MATCH(DMI_BOARD_VENDOR, "MICRO-STAR INTERNATIONAL CO., LTD"), 713 DMI_MATCH(DMI_BOARD_NAME, "MS-7469"), 714 }, 715 }, 716 { 717 .callback = intel_no_lvds_dmi_callback, 718 .ident = "Gigabyte GA-D525TUD", 719 .matches = { 720 DMI_MATCH(DMI_BOARD_VENDOR, "Gigabyte Technology Co., Ltd."), 721 DMI_MATCH(DMI_BOARD_NAME, "D525TUD"), 722 }, 723 }, 724 { 725 .callback = intel_no_lvds_dmi_callback, 726 .ident = "Supermicro X7SPA-H", 727 .matches = { 728 DMI_MATCH(DMI_SYS_VENDOR, "Supermicro"), 729 DMI_MATCH(DMI_PRODUCT_NAME, "X7SPA-H"), 730 }, 731 }, 732 { 733 .callback = intel_no_lvds_dmi_callback, 734 .ident = "Fujitsu Esprimo Q900", 735 .matches = { 736 DMI_MATCH(DMI_SYS_VENDOR, "FUJITSU"), 737 DMI_MATCH(DMI_PRODUCT_NAME, "ESPRIMO Q900"), 738 }, 739 }, 740 { 741 .callback = intel_no_lvds_dmi_callback, 742 .ident = "Intel D410PT", 743 .matches = { 744 DMI_MATCH(DMI_BOARD_VENDOR, "Intel"), 745 DMI_MATCH(DMI_BOARD_NAME, "D410PT"), 746 }, 747 }, 748 { 749 .callback = intel_no_lvds_dmi_callback, 750 .ident = "Intel D425KT", 751 .matches = { 752 DMI_MATCH(DMI_BOARD_VENDOR, "Intel"), 753 DMI_EXACT_MATCH(DMI_BOARD_NAME, "D425KT"), 754 }, 755 }, 756 { 757 .callback = intel_no_lvds_dmi_callback, 758 .ident = "Intel D510MO", 759 .matches = { 760 DMI_MATCH(DMI_BOARD_VENDOR, "Intel"), 761 DMI_EXACT_MATCH(DMI_BOARD_NAME, "D510MO"), 762 }, 763 }, 764 { 765 .callback = intel_no_lvds_dmi_callback, 766 .ident = "Intel D525MW", 767 .matches = { 768 DMI_MATCH(DMI_BOARD_VENDOR, "Intel"), 769 DMI_EXACT_MATCH(DMI_BOARD_NAME, "D525MW"), 770 }, 771 }, 772 773 { } /* terminating entry */ 774 }; 775 776 /* 777 * Enumerate the child dev array parsed from VBT to check whether 778 * the LVDS is present. 779 * If it is present, return 1. 780 * If it is not present, return false. 781 * If no child dev is parsed from VBT, it assumes that the LVDS is present. 782 */ 783 static bool lvds_is_present_in_vbt(struct drm_device *dev, 784 u8 *i2c_pin) 785 { 786 struct drm_i915_private *dev_priv = dev->dev_private; 787 int i; 788 789 if (!dev_priv->vbt.child_dev_num) 790 return true; 791 792 for (i = 0; i < dev_priv->vbt.child_dev_num; i++) { 793 union child_device_config *uchild = dev_priv->vbt.child_dev + i; 794 struct old_child_dev_config *child = &uchild->old; 795 796 /* If the device type is not LFP, continue. 797 * We have to check both the new identifiers as well as the 798 * old for compatibility with some BIOSes. 799 */ 800 if (child->device_type != DEVICE_TYPE_INT_LFP && 801 child->device_type != DEVICE_TYPE_LFP) 802 continue; 803 804 if (intel_gmbus_is_valid_pin(dev_priv, child->i2c_pin)) 805 *i2c_pin = child->i2c_pin; 806 807 /* However, we cannot trust the BIOS writers to populate 808 * the VBT correctly. Since LVDS requires additional 809 * information from AIM blocks, a non-zero addin offset is 810 * a good indicator that the LVDS is actually present. 811 */ 812 if (child->addin_offset) 813 return true; 814 815 /* But even then some BIOS writers perform some black magic 816 * and instantiate the device without reference to any 817 * additional data. Trust that if the VBT was written into 818 * the OpRegion then they have validated the LVDS's existence. 819 */ 820 if (dev_priv->opregion.vbt) 821 return true; 822 } 823 824 return false; 825 } 826 827 static int intel_dual_link_lvds_callback(const struct dmi_system_id *id) 828 { 829 DRM_INFO("Forcing lvds to dual link mode on %s\n", id->ident); 830 return 1; 831 } 832 833 static const struct dmi_system_id intel_dual_link_lvds[] = { 834 { 835 .callback = intel_dual_link_lvds_callback, 836 .ident = "Apple MacBook Pro 15\" (2010)", 837 .matches = { 838 DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."), 839 DMI_MATCH(DMI_PRODUCT_NAME, "MacBookPro6,2"), 840 }, 841 }, 842 { 843 .callback = intel_dual_link_lvds_callback, 844 .ident = "Apple MacBook Pro 15\" (2011)", 845 .matches = { 846 DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."), 847 DMI_MATCH(DMI_PRODUCT_NAME, "MacBookPro8,2"), 848 }, 849 }, 850 { 851 .callback = intel_dual_link_lvds_callback, 852 .ident = "Apple MacBook Pro 15\" (2012)", 853 .matches = { 854 DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."), 855 DMI_MATCH(DMI_PRODUCT_NAME, "MacBookPro9,1"), 856 }, 857 }, 858 { } /* terminating entry */ 859 }; 860 861 bool intel_is_dual_link_lvds(struct drm_device *dev) 862 { 863 struct intel_encoder *encoder; 864 struct intel_lvds_encoder *lvds_encoder; 865 866 for_each_intel_encoder(dev, encoder) { 867 if (encoder->type == INTEL_OUTPUT_LVDS) { 868 lvds_encoder = to_lvds_encoder(&encoder->base); 869 870 return lvds_encoder->is_dual_link; 871 } 872 } 873 874 return false; 875 } 876 877 static bool compute_is_dual_link_lvds(struct intel_lvds_encoder *lvds_encoder) 878 { 879 struct drm_device *dev = lvds_encoder->base.base.dev; 880 unsigned int val; 881 struct drm_i915_private *dev_priv = dev->dev_private; 882 883 /* use the module option value if specified */ 884 if (i915.lvds_channel_mode > 0) 885 return i915.lvds_channel_mode == 2; 886 887 /* single channel LVDS is limited to 112 MHz */ 888 if (lvds_encoder->attached_connector->base.panel.fixed_mode->clock 889 > 112999) 890 return true; 891 892 if (dmi_check_system(intel_dual_link_lvds)) 893 return true; 894 895 /* BIOS should set the proper LVDS register value at boot, but 896 * in reality, it doesn't set the value when the lid is closed; 897 * we need to check "the value to be set" in VBT when LVDS 898 * register is uninitialized. 899 */ 900 val = I915_READ(lvds_encoder->reg); 901 if (!(val & ~(LVDS_PIPE_MASK | LVDS_DETECTED))) 902 val = dev_priv->vbt.bios_lvds_val; 903 904 return (val & LVDS_CLKB_POWER_MASK) == LVDS_CLKB_POWER_UP; 905 } 906 907 static bool intel_lvds_supported(struct drm_device *dev) 908 { 909 /* With the introduction of the PCH we gained a dedicated 910 * LVDS presence pin, use it. */ 911 if (HAS_PCH_IBX(dev) || HAS_PCH_CPT(dev)) 912 return true; 913 914 /* Otherwise LVDS was only attached to mobile products, 915 * except for the inglorious 830gm */ 916 if (INTEL_INFO(dev)->gen <= 4 && IS_MOBILE(dev) && !IS_I830(dev)) 917 return true; 918 919 return false; 920 } 921 922 /** 923 * intel_lvds_init - setup LVDS connectors on this device 924 * @dev: drm device 925 * 926 * Create the connector, register the LVDS DDC bus, and try to figure out what 927 * modes we can display on the LVDS panel (if present). 928 */ 929 void intel_lvds_init(struct drm_device *dev) 930 { 931 struct drm_i915_private *dev_priv = dev->dev_private; 932 struct intel_lvds_encoder *lvds_encoder; 933 struct intel_encoder *intel_encoder; 934 struct intel_lvds_connector *lvds_connector; 935 struct intel_connector *intel_connector; 936 struct drm_connector *connector; 937 struct drm_encoder *encoder; 938 struct drm_display_mode *scan; /* *modes, *bios_mode; */ 939 struct drm_display_mode *fixed_mode = NULL; 940 struct drm_display_mode *downclock_mode = NULL; 941 struct edid *edid; 942 struct drm_crtc *crtc; 943 u32 lvds_reg; 944 u32 lvds; 945 int pipe; 946 u8 pin; 947 948 /* 949 * Unlock registers and just leave them unlocked. Do this before 950 * checking quirk lists to avoid bogus WARNINGs. 951 */ 952 if (HAS_PCH_SPLIT(dev)) { 953 I915_WRITE(PCH_PP_CONTROL, 954 I915_READ(PCH_PP_CONTROL) | PANEL_UNLOCK_REGS); 955 } else if (INTEL_INFO(dev_priv)->gen < 5) { 956 I915_WRITE(PP_CONTROL, 957 I915_READ(PP_CONTROL) | PANEL_UNLOCK_REGS); 958 } 959 if (!intel_lvds_supported(dev)) 960 return; 961 962 /* Skip init on machines we know falsely report LVDS */ 963 if (dmi_check_system(intel_no_lvds)) 964 return; 965 966 if (HAS_PCH_SPLIT(dev)) 967 lvds_reg = PCH_LVDS; 968 else 969 lvds_reg = LVDS; 970 971 lvds = I915_READ(lvds_reg); 972 973 if (HAS_PCH_SPLIT(dev)) { 974 if ((lvds & LVDS_DETECTED) == 0) 975 return; 976 if (dev_priv->vbt.edp_support) { 977 DRM_DEBUG_KMS("disable LVDS for eDP support\n"); 978 return; 979 } 980 } 981 982 pin = GMBUS_PIN_PANEL; 983 if (!lvds_is_present_in_vbt(dev, &pin)) { 984 if ((lvds & LVDS_PORT_EN) == 0) { 985 DRM_DEBUG_KMS("LVDS is not present in VBT\n"); 986 return; 987 } 988 DRM_DEBUG_KMS("LVDS is not present in VBT, but enabled anyway\n"); 989 } 990 991 /* Set the Panel Power On/Off timings if uninitialized. */ 992 if (INTEL_INFO(dev_priv)->gen < 5 && 993 I915_READ(PP_ON_DELAYS) == 0 && I915_READ(PP_OFF_DELAYS) == 0) { 994 /* Set T2 to 40ms and T5 to 200ms */ 995 I915_WRITE(PP_ON_DELAYS, 0x019007d0); 996 997 /* Set T3 to 35ms and Tx to 200ms */ 998 I915_WRITE(PP_OFF_DELAYS, 0x015e07d0); 999 1000 DRM_DEBUG_KMS("Panel power timings uninitialized, setting defaults\n"); 1001 } 1002 1003 lvds_encoder = kzalloc(sizeof(*lvds_encoder), GFP_KERNEL); 1004 if (!lvds_encoder) 1005 return; 1006 1007 lvds_connector = kzalloc(sizeof(*lvds_connector), GFP_KERNEL); 1008 if (!lvds_connector) { 1009 kfree(lvds_encoder); 1010 return; 1011 } 1012 1013 if (intel_connector_init(&lvds_connector->base) < 0) { 1014 kfree(lvds_connector); 1015 kfree(lvds_encoder); 1016 return; 1017 } 1018 1019 lvds_encoder->attached_connector = lvds_connector; 1020 1021 intel_encoder = &lvds_encoder->base; 1022 encoder = &intel_encoder->base; 1023 intel_connector = &lvds_connector->base; 1024 connector = &intel_connector->base; 1025 drm_connector_init(dev, &intel_connector->base, &intel_lvds_connector_funcs, 1026 DRM_MODE_CONNECTOR_LVDS); 1027 1028 drm_encoder_init(dev, &intel_encoder->base, &intel_lvds_enc_funcs, 1029 DRM_MODE_ENCODER_LVDS); 1030 1031 intel_encoder->enable = intel_enable_lvds; 1032 intel_encoder->pre_enable = intel_pre_enable_lvds; 1033 intel_encoder->compute_config = intel_lvds_compute_config; 1034 if (HAS_PCH_SPLIT(dev_priv)) { 1035 intel_encoder->disable = pch_disable_lvds; 1036 intel_encoder->post_disable = pch_post_disable_lvds; 1037 } else { 1038 intel_encoder->disable = gmch_disable_lvds; 1039 } 1040 intel_encoder->get_hw_state = intel_lvds_get_hw_state; 1041 intel_encoder->get_config = intel_lvds_get_config; 1042 intel_connector->get_hw_state = intel_connector_get_hw_state; 1043 intel_connector->unregister = intel_connector_unregister; 1044 1045 intel_connector_attach_encoder(intel_connector, intel_encoder); 1046 intel_encoder->type = INTEL_OUTPUT_LVDS; 1047 1048 intel_encoder->cloneable = 0; 1049 if (HAS_PCH_SPLIT(dev)) 1050 intel_encoder->crtc_mask = (1 << 0) | (1 << 1) | (1 << 2); 1051 else if (IS_GEN4(dev)) 1052 intel_encoder->crtc_mask = (1 << 0) | (1 << 1); 1053 else 1054 intel_encoder->crtc_mask = (1 << 1); 1055 1056 drm_connector_helper_add(connector, &intel_lvds_connector_helper_funcs); 1057 connector->display_info.subpixel_order = SubPixelHorizontalRGB; 1058 connector->interlace_allowed = false; 1059 connector->doublescan_allowed = false; 1060 1061 lvds_encoder->reg = lvds_reg; 1062 1063 /* create the scaling mode property */ 1064 drm_mode_create_scaling_mode_property(dev); 1065 drm_object_attach_property(&connector->base, 1066 dev->mode_config.scaling_mode_property, 1067 DRM_MODE_SCALE_ASPECT); 1068 intel_connector->panel.fitting_mode = DRM_MODE_SCALE_ASPECT; 1069 /* 1070 * LVDS discovery: 1071 * 1) check for EDID on DDC 1072 * 2) check for VBT data 1073 * 3) check to see if LVDS is already on 1074 * if none of the above, no panel 1075 * 4) make sure lid is open 1076 * if closed, act like it's not there for now 1077 */ 1078 1079 /* 1080 * Attempt to get the fixed panel mode from DDC. Assume that the 1081 * preferred mode is the right one. 1082 */ 1083 mutex_lock(&dev->mode_config.mutex); 1084 edid = drm_get_edid(connector, intel_gmbus_get_adapter(dev_priv, pin)); 1085 if (edid) { 1086 if (drm_add_edid_modes(connector, edid)) { 1087 drm_mode_connector_update_edid_property(connector, 1088 edid); 1089 } else { 1090 kfree(edid); 1091 edid = ERR_PTR(-EINVAL); 1092 } 1093 } else { 1094 edid = ERR_PTR(-ENOENT); 1095 } 1096 lvds_connector->base.edid = edid; 1097 1098 if (IS_ERR_OR_NULL(edid)) { 1099 /* Didn't get an EDID, so 1100 * Set wide sync ranges so we get all modes 1101 * handed to valid_mode for checking 1102 */ 1103 connector->display_info.min_vfreq = 0; 1104 connector->display_info.max_vfreq = 200; 1105 connector->display_info.min_hfreq = 0; 1106 connector->display_info.max_hfreq = 200; 1107 } 1108 1109 list_for_each_entry(scan, &connector->probed_modes, head) { 1110 if (scan->type & DRM_MODE_TYPE_PREFERRED) { 1111 DRM_DEBUG_KMS("using preferred mode from EDID: "); 1112 drm_mode_debug_printmodeline(scan); 1113 1114 fixed_mode = drm_mode_duplicate(dev, scan); 1115 if (fixed_mode) 1116 goto out; 1117 } 1118 } 1119 1120 /* Failed to get EDID, what about VBT? */ 1121 if (dev_priv->vbt.lfp_lvds_vbt_mode) { 1122 DRM_DEBUG_KMS("using mode from VBT: "); 1123 drm_mode_debug_printmodeline(dev_priv->vbt.lfp_lvds_vbt_mode); 1124 1125 fixed_mode = drm_mode_duplicate(dev, dev_priv->vbt.lfp_lvds_vbt_mode); 1126 if (fixed_mode) { 1127 fixed_mode->type |= DRM_MODE_TYPE_PREFERRED; 1128 goto out; 1129 } 1130 } 1131 1132 /* 1133 * If we didn't get EDID, try checking if the panel is already turned 1134 * on. If so, assume that whatever is currently programmed is the 1135 * correct mode. 1136 */ 1137 1138 /* Ironlake: FIXME if still fail, not try pipe mode now */ 1139 if (HAS_PCH_SPLIT(dev)) 1140 goto failed; 1141 1142 pipe = (lvds & LVDS_PIPEB_SELECT) ? 1 : 0; 1143 crtc = intel_get_crtc_for_pipe(dev, pipe); 1144 1145 if (crtc && (lvds & LVDS_PORT_EN)) { 1146 fixed_mode = intel_crtc_mode_get(dev, crtc); 1147 if (fixed_mode) { 1148 DRM_DEBUG_KMS("using current (BIOS) mode: "); 1149 drm_mode_debug_printmodeline(fixed_mode); 1150 fixed_mode->type |= DRM_MODE_TYPE_PREFERRED; 1151 goto out; 1152 } 1153 } 1154 1155 /* If we still don't have a mode after all that, give up. */ 1156 if (!fixed_mode) 1157 goto failed; 1158 1159 out: 1160 mutex_unlock(&dev->mode_config.mutex); 1161 1162 intel_panel_init(&intel_connector->panel, fixed_mode, downclock_mode); 1163 1164 lvds_encoder->is_dual_link = compute_is_dual_link_lvds(lvds_encoder); 1165 DRM_DEBUG_KMS("detected %s-link lvds configuration\n", 1166 lvds_encoder->is_dual_link ? "dual" : "single"); 1167 1168 lvds_encoder->a3_power = I915_READ(lvds_encoder->reg) & 1169 LVDS_A3_POWER_MASK; 1170 1171 #if 0 1172 lvds_connector->lid_notifier.notifier_call = intel_lid_notify; 1173 if (acpi_lid_notifier_register(&lvds_connector->lid_notifier)) { 1174 DRM_DEBUG_KMS("lid notifier registration failed\n"); 1175 lvds_connector->lid_notifier.notifier_call = NULL; 1176 } 1177 drm_connector_register(connector); 1178 #endif 1179 1180 intel_panel_setup_backlight(connector, INVALID_PIPE); 1181 1182 return; 1183 1184 failed: 1185 mutex_unlock(&dev->mode_config.mutex); 1186 1187 DRM_DEBUG_KMS("No LVDS modes found, disabling.\n"); 1188 drm_connector_cleanup(connector); 1189 drm_encoder_cleanup(encoder); 1190 kfree(lvds_encoder); 1191 kfree(lvds_connector); 1192 return; 1193 } 1194