1 /* 2 * Copyright © 2006-2007 Intel Corporation 3 * Copyright (c) 2006 Dave Airlie <airlied@linux.ie> 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining a 6 * copy of this software and associated documentation files (the "Software"), 7 * to deal in the Software without restriction, including without limitation 8 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 9 * and/or sell copies of the Software, and to permit persons to whom the 10 * Software is furnished to do so, subject to the following conditions: 11 * 12 * The above copyright notice and this permission notice (including the next 13 * paragraph) shall be included in all copies or substantial portions of the 14 * Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 22 * DEALINGS IN THE SOFTWARE. 23 * 24 * Authors: 25 * Eric Anholt <eric@anholt.net> 26 * Dave Airlie <airlied@linux.ie> 27 * Jesse Barnes <jesse.barnes@intel.com> 28 * $FreeBSD: src/sys/dev/drm2/i915/intel_lvds.c,v 1.1 2012/05/22 11:07:44 kib Exp $ 29 */ 30 31 #include <dev/drm/drmP.h> 32 #include <dev/drm/drm.h> 33 #include <dev/drm/drm_crtc.h> 34 #include <dev/drm/drm_edid.h> 35 #include "i915_drm.h" 36 #include "i915_drv.h" 37 #include "intel_drv.h" 38 39 /* Private structure for the integrated LVDS support */ 40 struct intel_lvds { 41 struct intel_encoder base; 42 43 struct edid *edid; 44 45 int fitting_mode; 46 u32 pfit_control; 47 u32 pfit_pgm_ratios; 48 bool pfit_dirty; 49 50 struct drm_display_mode *fixed_mode; 51 }; 52 53 static struct intel_lvds *to_intel_lvds(struct drm_encoder *encoder) 54 { 55 return container_of(encoder, struct intel_lvds, base.base); 56 } 57 58 static struct intel_lvds *intel_attached_lvds(struct drm_connector *connector) 59 { 60 return container_of(intel_attached_encoder(connector), 61 struct intel_lvds, base); 62 } 63 64 /** 65 * Sets the power state for the panel. 66 */ 67 static void intel_lvds_enable(struct intel_lvds *intel_lvds) 68 { 69 struct drm_device *dev = intel_lvds->base.base.dev; 70 struct drm_i915_private *dev_priv = dev->dev_private; 71 u32 ctl_reg, lvds_reg, stat_reg; 72 73 if (HAS_PCH_SPLIT(dev)) { 74 ctl_reg = PCH_PP_CONTROL; 75 lvds_reg = PCH_LVDS; 76 stat_reg = PCH_PP_STATUS; 77 } else { 78 ctl_reg = PP_CONTROL; 79 lvds_reg = LVDS; 80 stat_reg = PP_STATUS; 81 } 82 83 I915_WRITE(lvds_reg, I915_READ(lvds_reg) | LVDS_PORT_EN); 84 85 if (intel_lvds->pfit_dirty) { 86 /* 87 * Enable automatic panel scaling so that non-native modes 88 * fill the screen. The panel fitter should only be 89 * adjusted whilst the pipe is disabled, according to 90 * register description and PRM. 91 */ 92 DRM_DEBUG_KMS("applying panel-fitter: %x, %x\n", 93 intel_lvds->pfit_control, 94 intel_lvds->pfit_pgm_ratios); 95 96 I915_WRITE(PFIT_PGM_RATIOS, intel_lvds->pfit_pgm_ratios); 97 I915_WRITE(PFIT_CONTROL, intel_lvds->pfit_control); 98 intel_lvds->pfit_dirty = false; 99 } 100 101 I915_WRITE(ctl_reg, I915_READ(ctl_reg) | POWER_TARGET_ON); 102 POSTING_READ(lvds_reg); 103 if (_intel_wait_for(dev, 104 (I915_READ(stat_reg) & PP_ON) == 0, 1000, 105 1, "915lvds")) 106 DRM_ERROR("timed out waiting for panel to power off\n"); 107 108 intel_panel_enable_backlight(dev); 109 } 110 111 static void intel_lvds_disable(struct intel_lvds *intel_lvds) 112 { 113 struct drm_device *dev = intel_lvds->base.base.dev; 114 struct drm_i915_private *dev_priv = dev->dev_private; 115 u32 ctl_reg, lvds_reg, stat_reg; 116 117 if (HAS_PCH_SPLIT(dev)) { 118 ctl_reg = PCH_PP_CONTROL; 119 lvds_reg = PCH_LVDS; 120 stat_reg = PCH_PP_STATUS; 121 } else { 122 ctl_reg = PP_CONTROL; 123 lvds_reg = LVDS; 124 stat_reg = PP_STATUS; 125 } 126 127 intel_panel_disable_backlight(dev); 128 129 I915_WRITE(ctl_reg, I915_READ(ctl_reg) & ~POWER_TARGET_ON); 130 if (_intel_wait_for(dev, 131 (I915_READ(stat_reg) & PP_ON) == 0, 1000, 132 1, "915lvo")) 133 DRM_ERROR("timed out waiting for panel to power off\n"); 134 135 if (intel_lvds->pfit_control) { 136 I915_WRITE(PFIT_CONTROL, 0); 137 intel_lvds->pfit_dirty = true; 138 } 139 140 I915_WRITE(lvds_reg, I915_READ(lvds_reg) & ~LVDS_PORT_EN); 141 POSTING_READ(lvds_reg); 142 } 143 144 static void intel_lvds_dpms(struct drm_encoder *encoder, int mode) 145 { 146 struct intel_lvds *intel_lvds = to_intel_lvds(encoder); 147 148 if (mode == DRM_MODE_DPMS_ON) 149 intel_lvds_enable(intel_lvds); 150 else 151 intel_lvds_disable(intel_lvds); 152 153 /* XXX: We never power down the LVDS pairs. */ 154 } 155 156 static int intel_lvds_mode_valid(struct drm_connector *connector, 157 struct drm_display_mode *mode) 158 { 159 struct intel_lvds *intel_lvds = intel_attached_lvds(connector); 160 struct drm_display_mode *fixed_mode = intel_lvds->fixed_mode; 161 162 if (mode->hdisplay > fixed_mode->hdisplay) 163 return MODE_PANEL; 164 if (mode->vdisplay > fixed_mode->vdisplay) 165 return MODE_PANEL; 166 167 return MODE_OK; 168 } 169 170 static void 171 centre_horizontally(struct drm_display_mode *mode, 172 int width) 173 { 174 u32 border, sync_pos, blank_width, sync_width; 175 176 /* keep the hsync and hblank widths constant */ 177 sync_width = mode->crtc_hsync_end - mode->crtc_hsync_start; 178 blank_width = mode->crtc_hblank_end - mode->crtc_hblank_start; 179 sync_pos = (blank_width - sync_width + 1) / 2; 180 181 border = (mode->hdisplay - width + 1) / 2; 182 border += border & 1; /* make the border even */ 183 184 mode->crtc_hdisplay = width; 185 mode->crtc_hblank_start = width + border; 186 mode->crtc_hblank_end = mode->crtc_hblank_start + blank_width; 187 188 mode->crtc_hsync_start = mode->crtc_hblank_start + sync_pos; 189 mode->crtc_hsync_end = mode->crtc_hsync_start + sync_width; 190 191 mode->private_flags |= INTEL_MODE_CRTC_TIMINGS_SET; 192 } 193 194 static void 195 centre_vertically(struct drm_display_mode *mode, 196 int height) 197 { 198 u32 border, sync_pos, blank_width, sync_width; 199 200 /* keep the vsync and vblank widths constant */ 201 sync_width = mode->crtc_vsync_end - mode->crtc_vsync_start; 202 blank_width = mode->crtc_vblank_end - mode->crtc_vblank_start; 203 sync_pos = (blank_width - sync_width + 1) / 2; 204 205 border = (mode->vdisplay - height + 1) / 2; 206 207 mode->crtc_vdisplay = height; 208 mode->crtc_vblank_start = height + border; 209 mode->crtc_vblank_end = mode->crtc_vblank_start + blank_width; 210 211 mode->crtc_vsync_start = mode->crtc_vblank_start + sync_pos; 212 mode->crtc_vsync_end = mode->crtc_vsync_start + sync_width; 213 214 mode->private_flags |= INTEL_MODE_CRTC_TIMINGS_SET; 215 } 216 217 static inline u32 panel_fitter_scaling(u32 source, u32 target) 218 { 219 /* 220 * Floating point operation is not supported. So the FACTOR 221 * is defined, which can avoid the floating point computation 222 * when calculating the panel ratio. 223 */ 224 #define ACCURACY 12 225 #define FACTOR (1 << ACCURACY) 226 u32 ratio = source * FACTOR / target; 227 return (FACTOR * ratio + FACTOR/2) / FACTOR; 228 } 229 230 static bool intel_lvds_mode_fixup(struct drm_encoder *encoder, 231 const struct drm_display_mode *mode, 232 struct drm_display_mode *adjusted_mode) 233 { 234 struct drm_device *dev = encoder->dev; 235 struct drm_i915_private *dev_priv = dev->dev_private; 236 struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc); 237 struct intel_lvds *intel_lvds = to_intel_lvds(encoder); 238 struct drm_encoder *tmp_encoder; 239 u32 pfit_control = 0, pfit_pgm_ratios = 0, border = 0; 240 int pipe; 241 242 /* Should never happen!! */ 243 if (INTEL_INFO(dev)->gen < 4 && intel_crtc->pipe == 0) { 244 DRM_ERROR("Can't support LVDS on pipe A\n"); 245 return false; 246 } 247 248 /* Should never happen!! */ 249 list_for_each_entry(tmp_encoder, &dev->mode_config.encoder_list, head) { 250 if (tmp_encoder != encoder && tmp_encoder->crtc == encoder->crtc) { 251 DRM_ERROR("Can't enable LVDS and another " 252 "encoder on the same pipe\n"); 253 return false; 254 } 255 } 256 257 /* 258 * We have timings from the BIOS for the panel, put them in 259 * to the adjusted mode. The CRTC will be set up for this mode, 260 * with the panel scaling set up to source from the H/VDisplay 261 * of the original mode. 262 */ 263 intel_fixed_panel_mode(intel_lvds->fixed_mode, adjusted_mode); 264 265 if (HAS_PCH_SPLIT(dev)) { 266 intel_pch_panel_fitting(dev, intel_lvds->fitting_mode, 267 mode, adjusted_mode); 268 return true; 269 } 270 271 /* Native modes don't need fitting */ 272 if (adjusted_mode->hdisplay == mode->hdisplay && 273 adjusted_mode->vdisplay == mode->vdisplay) 274 goto out; 275 276 /* 965+ wants fuzzy fitting */ 277 if (INTEL_INFO(dev)->gen >= 4) 278 pfit_control |= ((intel_crtc->pipe << PFIT_PIPE_SHIFT) | 279 PFIT_FILTER_FUZZY); 280 281 /* 282 * Enable automatic panel scaling for non-native modes so that they fill 283 * the screen. Should be enabled before the pipe is enabled, according 284 * to register description and PRM. 285 * Change the value here to see the borders for debugging 286 */ 287 for_each_pipe(pipe) 288 I915_WRITE(BCLRPAT(pipe), 0); 289 290 drm_mode_set_crtcinfo(adjusted_mode, 0); 291 292 switch (intel_lvds->fitting_mode) { 293 case DRM_MODE_SCALE_CENTER: 294 /* 295 * For centered modes, we have to calculate border widths & 296 * heights and modify the values programmed into the CRTC. 297 */ 298 centre_horizontally(adjusted_mode, mode->hdisplay); 299 centre_vertically(adjusted_mode, mode->vdisplay); 300 border = LVDS_BORDER_ENABLE; 301 break; 302 303 case DRM_MODE_SCALE_ASPECT: 304 /* Scale but preserve the aspect ratio */ 305 if (INTEL_INFO(dev)->gen >= 4) { 306 u32 scaled_width = adjusted_mode->hdisplay * mode->vdisplay; 307 u32 scaled_height = mode->hdisplay * adjusted_mode->vdisplay; 308 309 /* 965+ is easy, it does everything in hw */ 310 if (scaled_width > scaled_height) 311 pfit_control |= PFIT_ENABLE | PFIT_SCALING_PILLAR; 312 else if (scaled_width < scaled_height) 313 pfit_control |= PFIT_ENABLE | PFIT_SCALING_LETTER; 314 else if (adjusted_mode->hdisplay != mode->hdisplay) 315 pfit_control |= PFIT_ENABLE | PFIT_SCALING_AUTO; 316 } else { 317 u32 scaled_width = adjusted_mode->hdisplay * mode->vdisplay; 318 u32 scaled_height = mode->hdisplay * adjusted_mode->vdisplay; 319 /* 320 * For earlier chips we have to calculate the scaling 321 * ratio by hand and program it into the 322 * PFIT_PGM_RATIO register 323 */ 324 if (scaled_width > scaled_height) { /* pillar */ 325 centre_horizontally(adjusted_mode, scaled_height / mode->vdisplay); 326 327 border = LVDS_BORDER_ENABLE; 328 if (mode->vdisplay != adjusted_mode->vdisplay) { 329 u32 bits = panel_fitter_scaling(mode->vdisplay, adjusted_mode->vdisplay); 330 pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT | 331 bits << PFIT_VERT_SCALE_SHIFT); 332 pfit_control |= (PFIT_ENABLE | 333 VERT_INTERP_BILINEAR | 334 HORIZ_INTERP_BILINEAR); 335 } 336 } else if (scaled_width < scaled_height) { /* letter */ 337 centre_vertically(adjusted_mode, scaled_width / mode->hdisplay); 338 339 border = LVDS_BORDER_ENABLE; 340 if (mode->hdisplay != adjusted_mode->hdisplay) { 341 u32 bits = panel_fitter_scaling(mode->hdisplay, adjusted_mode->hdisplay); 342 pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT | 343 bits << PFIT_VERT_SCALE_SHIFT); 344 pfit_control |= (PFIT_ENABLE | 345 VERT_INTERP_BILINEAR | 346 HORIZ_INTERP_BILINEAR); 347 } 348 } else 349 /* Aspects match, Let hw scale both directions */ 350 pfit_control |= (PFIT_ENABLE | 351 VERT_AUTO_SCALE | HORIZ_AUTO_SCALE | 352 VERT_INTERP_BILINEAR | 353 HORIZ_INTERP_BILINEAR); 354 } 355 break; 356 357 case DRM_MODE_SCALE_FULLSCREEN: 358 /* 359 * Full scaling, even if it changes the aspect ratio. 360 * Fortunately this is all done for us in hw. 361 */ 362 if (mode->vdisplay != adjusted_mode->vdisplay || 363 mode->hdisplay != adjusted_mode->hdisplay) { 364 pfit_control |= PFIT_ENABLE; 365 if (INTEL_INFO(dev)->gen >= 4) 366 pfit_control |= PFIT_SCALING_AUTO; 367 else 368 pfit_control |= (VERT_AUTO_SCALE | 369 VERT_INTERP_BILINEAR | 370 HORIZ_AUTO_SCALE | 371 HORIZ_INTERP_BILINEAR); 372 } 373 break; 374 375 default: 376 break; 377 } 378 379 out: 380 /* If not enabling scaling, be consistent and always use 0. */ 381 if ((pfit_control & PFIT_ENABLE) == 0) { 382 pfit_control = 0; 383 pfit_pgm_ratios = 0; 384 } 385 386 /* Make sure pre-965 set dither correctly */ 387 if (INTEL_INFO(dev)->gen < 4 && dev_priv->lvds_dither) 388 pfit_control |= PANEL_8TO6_DITHER_ENABLE; 389 390 if (pfit_control != intel_lvds->pfit_control || 391 pfit_pgm_ratios != intel_lvds->pfit_pgm_ratios) { 392 intel_lvds->pfit_control = pfit_control; 393 intel_lvds->pfit_pgm_ratios = pfit_pgm_ratios; 394 intel_lvds->pfit_dirty = true; 395 } 396 dev_priv->lvds_border_bits = border; 397 398 /* 399 * XXX: It would be nice to support lower refresh rates on the 400 * panels to reduce power consumption, and perhaps match the 401 * user's requested refresh rate. 402 */ 403 404 return true; 405 } 406 407 static void intel_lvds_prepare(struct drm_encoder *encoder) 408 { 409 struct intel_lvds *intel_lvds = to_intel_lvds(encoder); 410 411 /* 412 * Prior to Ironlake, we must disable the pipe if we want to adjust 413 * the panel fitter. However at all other times we can just reset 414 * the registers regardless. 415 */ 416 if (!HAS_PCH_SPLIT(encoder->dev) && intel_lvds->pfit_dirty) 417 intel_lvds_disable(intel_lvds); 418 } 419 420 static void intel_lvds_commit(struct drm_encoder *encoder) 421 { 422 struct intel_lvds *intel_lvds = to_intel_lvds(encoder); 423 424 /* Always do a full power on as we do not know what state 425 * we were left in. 426 */ 427 intel_lvds_enable(intel_lvds); 428 } 429 430 static void intel_lvds_mode_set(struct drm_encoder *encoder, 431 struct drm_display_mode *mode, 432 struct drm_display_mode *adjusted_mode) 433 { 434 /* 435 * The LVDS pin pair will already have been turned on in the 436 * intel_crtc_mode_set since it has a large impact on the DPLL 437 * settings. 438 */ 439 } 440 441 /** 442 * Detect the LVDS connection. 443 * 444 * Since LVDS doesn't have hotlug, we use the lid as a proxy. Open means 445 * connected and closed means disconnected. We also send hotplug events as 446 * needed, using lid status notification from the input layer. 447 */ 448 static enum drm_connector_status 449 intel_lvds_detect(struct drm_connector *connector, bool force) 450 { 451 struct drm_device *dev = connector->dev; 452 enum drm_connector_status status; 453 454 status = intel_panel_detect(dev); 455 if (status != connector_status_unknown) 456 return status; 457 458 return connector_status_connected; 459 } 460 461 /** 462 * Return the list of DDC modes if available, or the BIOS fixed mode otherwise. 463 */ 464 static int intel_lvds_get_modes(struct drm_connector *connector) 465 { 466 struct intel_lvds *intel_lvds = intel_attached_lvds(connector); 467 struct drm_device *dev = connector->dev; 468 struct drm_display_mode *mode; 469 470 if (intel_lvds->edid) 471 return drm_add_edid_modes(connector, intel_lvds->edid); 472 473 mode = drm_mode_duplicate(dev, intel_lvds->fixed_mode); 474 if (mode == NULL) 475 return 0; 476 477 drm_mode_probed_add(connector, mode); 478 return 1; 479 } 480 481 static int intel_no_modeset_on_lid_dmi_callback(const struct dmi_system_id *id) 482 { 483 DRM_DEBUG_KMS("Skipping forced modeset for %s\n", id->ident); 484 return 1; 485 } 486 487 /* The GPU hangs up on these systems if modeset is performed on LID open */ 488 static const struct dmi_system_id intel_no_modeset_on_lid[] = { 489 { 490 .callback = intel_no_modeset_on_lid_dmi_callback, 491 .ident = "Toshiba Tecra A11", 492 .matches = { 493 DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"), 494 DMI_MATCH(DMI_PRODUCT_NAME, "TECRA A11"), 495 }, 496 }, 497 498 { } /* terminating entry */ 499 }; 500 501 #ifdef NOTYET 502 /* 503 * Lid events. Note the use of 'modeset_on_lid': 504 * - we set it on lid close, and reset it on open 505 * - we use it as a "only once" bit (ie we ignore 506 * duplicate events where it was already properly 507 * set/reset) 508 * - the suspend/resume paths will also set it to 509 * zero, since they restore the mode ("lid open"). 510 */ 511 static int intel_lid_notify(struct notifier_block *nb, unsigned long val, 512 void *unused) 513 { 514 struct drm_i915_private *dev_priv = 515 container_of(nb, struct drm_i915_private, lid_notifier); 516 struct drm_device *dev = dev_priv->dev; 517 struct drm_connector *connector = dev_priv->int_lvds_connector; 518 519 if (dev->switch_power_state != DRM_SWITCH_POWER_ON) 520 return NOTIFY_OK; 521 522 /* 523 * check and update the status of LVDS connector after receiving 524 * the LID nofication event. 525 */ 526 if (connector) 527 connector->status = connector->funcs->detect(connector, 528 false); 529 530 /* Don't force modeset on machines where it causes a GPU lockup */ 531 if (dmi_check_system(intel_no_modeset_on_lid)) 532 return NOTIFY_OK; 533 if (!acpi_lid_open()) { 534 dev_priv->modeset_on_lid = 1; 535 return NOTIFY_OK; 536 } 537 538 if (!dev_priv->modeset_on_lid) 539 return NOTIFY_OK; 540 541 dev_priv->modeset_on_lid = 0; 542 543 mutex_lock(&dev->mode_config.mutex); 544 drm_helper_resume_force_mode(dev); 545 mutex_unlock(&dev->mode_config.mutex); 546 547 return NOTIFY_OK; 548 } 549 #endif 550 551 /** 552 * intel_lvds_destroy - unregister and free LVDS structures 553 * @connector: connector to free 554 * 555 * Unregister the DDC bus for this connector then free the driver private 556 * structure. 557 */ 558 static void intel_lvds_destroy(struct drm_connector *connector) 559 { 560 struct drm_device *dev = connector->dev; 561 #if 0 562 struct drm_i915_private *dev_priv = dev->dev_private; 563 #endif 564 565 intel_panel_destroy_backlight(dev); 566 567 #if 0 568 if (dev_priv->lid_notifier.notifier_call) 569 acpi_lid_notifier_unregister(&dev_priv->lid_notifier); 570 #endif 571 #if 0 572 drm_sysfs_connector_remove(connector); 573 #endif 574 drm_connector_cleanup(connector); 575 drm_free(connector, DRM_MEM_KMS); 576 } 577 578 static int intel_lvds_set_property(struct drm_connector *connector, 579 struct drm_property *property, 580 uint64_t value) 581 { 582 struct intel_lvds *intel_lvds = intel_attached_lvds(connector); 583 struct drm_device *dev = connector->dev; 584 585 if (property == dev->mode_config.scaling_mode_property) { 586 struct drm_crtc *crtc = intel_lvds->base.base.crtc; 587 588 if (value == DRM_MODE_SCALE_NONE) { 589 DRM_DEBUG_KMS("no scaling not supported\n"); 590 return -EINVAL; 591 } 592 593 if (intel_lvds->fitting_mode == value) { 594 /* the LVDS scaling property is not changed */ 595 return 0; 596 } 597 intel_lvds->fitting_mode = value; 598 if (crtc && crtc->enabled) { 599 /* 600 * If the CRTC is enabled, the display will be changed 601 * according to the new panel fitting mode. 602 */ 603 drm_crtc_helper_set_mode(crtc, &crtc->mode, 604 crtc->x, crtc->y, crtc->fb); 605 } 606 } 607 608 return 0; 609 } 610 611 static const struct drm_encoder_helper_funcs intel_lvds_helper_funcs = { 612 .dpms = intel_lvds_dpms, 613 .mode_fixup = intel_lvds_mode_fixup, 614 .prepare = intel_lvds_prepare, 615 .mode_set = intel_lvds_mode_set, 616 .commit = intel_lvds_commit, 617 }; 618 619 static const struct drm_connector_helper_funcs intel_lvds_connector_helper_funcs = { 620 .get_modes = intel_lvds_get_modes, 621 .mode_valid = intel_lvds_mode_valid, 622 .best_encoder = intel_best_encoder, 623 }; 624 625 static const struct drm_connector_funcs intel_lvds_connector_funcs = { 626 .dpms = drm_helper_connector_dpms, 627 .detect = intel_lvds_detect, 628 .fill_modes = drm_helper_probe_single_connector_modes, 629 .set_property = intel_lvds_set_property, 630 .destroy = intel_lvds_destroy, 631 }; 632 633 static const struct drm_encoder_funcs intel_lvds_enc_funcs = { 634 .destroy = intel_encoder_destroy, 635 }; 636 637 static int intel_no_lvds_dmi_callback(const struct dmi_system_id *id) 638 { 639 DRM_DEBUG_KMS("Skipping LVDS initialization for %s\n", id->ident); 640 return 1; 641 } 642 643 /* These systems claim to have LVDS, but really don't */ 644 static const struct dmi_system_id intel_no_lvds[] = { 645 { 646 .callback = intel_no_lvds_dmi_callback, 647 .ident = "Apple Mac Mini (Core series)", 648 .matches = { 649 DMI_MATCH(DMI_SYS_VENDOR, "Apple"), 650 DMI_MATCH(DMI_PRODUCT_NAME, "Macmini1,1"), 651 }, 652 }, 653 { 654 .callback = intel_no_lvds_dmi_callback, 655 .ident = "Apple Mac Mini (Core 2 series)", 656 .matches = { 657 DMI_MATCH(DMI_SYS_VENDOR, "Apple"), 658 DMI_MATCH(DMI_PRODUCT_NAME, "Macmini2,1"), 659 }, 660 }, 661 { 662 .callback = intel_no_lvds_dmi_callback, 663 .ident = "MSI IM-945GSE-A", 664 .matches = { 665 DMI_MATCH(DMI_SYS_VENDOR, "MSI"), 666 DMI_MATCH(DMI_PRODUCT_NAME, "A9830IMS"), 667 }, 668 }, 669 { 670 .callback = intel_no_lvds_dmi_callback, 671 .ident = "Dell Studio Hybrid", 672 .matches = { 673 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), 674 DMI_MATCH(DMI_PRODUCT_NAME, "Studio Hybrid 140g"), 675 }, 676 }, 677 { 678 .callback = intel_no_lvds_dmi_callback, 679 .ident = "Dell OptiPlex FX170", 680 .matches = { 681 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), 682 DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex FX170"), 683 }, 684 }, 685 { 686 .callback = intel_no_lvds_dmi_callback, 687 .ident = "AOpen Mini PC", 688 .matches = { 689 DMI_MATCH(DMI_SYS_VENDOR, "AOpen"), 690 DMI_MATCH(DMI_PRODUCT_NAME, "i965GMx-IF"), 691 }, 692 }, 693 { 694 .callback = intel_no_lvds_dmi_callback, 695 .ident = "AOpen Mini PC MP915", 696 .matches = { 697 DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"), 698 DMI_MATCH(DMI_BOARD_NAME, "i915GMx-F"), 699 }, 700 }, 701 { 702 .callback = intel_no_lvds_dmi_callback, 703 .ident = "AOpen i915GMm-HFS", 704 .matches = { 705 DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"), 706 DMI_MATCH(DMI_BOARD_NAME, "i915GMm-HFS"), 707 }, 708 }, 709 { 710 .callback = intel_no_lvds_dmi_callback, 711 .ident = "AOpen i45GMx-I", 712 .matches = { 713 DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"), 714 DMI_MATCH(DMI_BOARD_NAME, "i45GMx-I"), 715 }, 716 }, 717 { 718 .callback = intel_no_lvds_dmi_callback, 719 .ident = "Aopen i945GTt-VFA", 720 .matches = { 721 DMI_MATCH(DMI_PRODUCT_VERSION, "AO00001JW"), 722 }, 723 }, 724 { 725 .callback = intel_no_lvds_dmi_callback, 726 .ident = "Clientron U800", 727 .matches = { 728 DMI_MATCH(DMI_SYS_VENDOR, "Clientron"), 729 DMI_MATCH(DMI_PRODUCT_NAME, "U800"), 730 }, 731 }, 732 { 733 .callback = intel_no_lvds_dmi_callback, 734 .ident = "Clientron E830", 735 .matches = { 736 DMI_MATCH(DMI_SYS_VENDOR, "Clientron"), 737 DMI_MATCH(DMI_PRODUCT_NAME, "E830"), 738 }, 739 }, 740 { 741 .callback = intel_no_lvds_dmi_callback, 742 .ident = "Asus EeeBox PC EB1007", 743 .matches = { 744 DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK Computer INC."), 745 DMI_MATCH(DMI_PRODUCT_NAME, "EB1007"), 746 }, 747 }, 748 { 749 .callback = intel_no_lvds_dmi_callback, 750 .ident = "Asus AT5NM10T-I", 751 .matches = { 752 DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."), 753 DMI_MATCH(DMI_BOARD_NAME, "AT5NM10T-I"), 754 }, 755 }, 756 { 757 .callback = intel_no_lvds_dmi_callback, 758 .ident = "Hewlett-Packard t5745", 759 .matches = { 760 DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"), 761 DMI_MATCH(DMI_PRODUCT_NAME, "hp t5745"), 762 }, 763 }, 764 { 765 .callback = intel_no_lvds_dmi_callback, 766 .ident = "Hewlett-Packard st5747", 767 .matches = { 768 DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"), 769 DMI_MATCH(DMI_PRODUCT_NAME, "hp st5747"), 770 }, 771 }, 772 { 773 .callback = intel_no_lvds_dmi_callback, 774 .ident = "MSI Wind Box DC500", 775 .matches = { 776 DMI_MATCH(DMI_BOARD_VENDOR, "MICRO-STAR INTERNATIONAL CO., LTD"), 777 DMI_MATCH(DMI_BOARD_NAME, "MS-7469"), 778 }, 779 }, 780 { 781 .callback = intel_no_lvds_dmi_callback, 782 .ident = "Supermicro X7SPA-H", 783 .matches = { 784 DMI_MATCH(DMI_SYS_VENDOR, "Supermicro"), 785 DMI_MATCH(DMI_PRODUCT_NAME, "X7SPA-H"), 786 }, 787 }, 788 789 { } /* terminating entry */ 790 }; 791 792 /** 793 * intel_find_lvds_downclock - find the reduced downclock for LVDS in EDID 794 * @dev: drm device 795 * @connector: LVDS connector 796 * 797 * Find the reduced downclock for LVDS in EDID. 798 */ 799 static void intel_find_lvds_downclock(struct drm_device *dev, 800 struct drm_display_mode *fixed_mode, 801 struct drm_connector *connector) 802 { 803 struct drm_i915_private *dev_priv = dev->dev_private; 804 struct drm_display_mode *scan; 805 int temp_downclock; 806 807 temp_downclock = fixed_mode->clock; 808 list_for_each_entry(scan, &connector->probed_modes, head) { 809 /* 810 * If one mode has the same resolution with the fixed_panel 811 * mode while they have the different refresh rate, it means 812 * that the reduced downclock is found for the LVDS. In such 813 * case we can set the different FPx0/1 to dynamically select 814 * between low and high frequency. 815 */ 816 if (scan->hdisplay == fixed_mode->hdisplay && 817 scan->hsync_start == fixed_mode->hsync_start && 818 scan->hsync_end == fixed_mode->hsync_end && 819 scan->htotal == fixed_mode->htotal && 820 scan->vdisplay == fixed_mode->vdisplay && 821 scan->vsync_start == fixed_mode->vsync_start && 822 scan->vsync_end == fixed_mode->vsync_end && 823 scan->vtotal == fixed_mode->vtotal) { 824 if (scan->clock < temp_downclock) { 825 /* 826 * The downclock is already found. But we 827 * expect to find the lower downclock. 828 */ 829 temp_downclock = scan->clock; 830 } 831 } 832 } 833 if (temp_downclock < fixed_mode->clock && i915_lvds_downclock) { 834 /* We found the downclock for LVDS. */ 835 dev_priv->lvds_downclock_avail = 1; 836 dev_priv->lvds_downclock = temp_downclock; 837 DRM_DEBUG_KMS("LVDS downclock is found in EDID. " 838 "Normal clock %dKhz, downclock %dKhz\n", 839 fixed_mode->clock, temp_downclock); 840 } 841 } 842 843 /* 844 * Enumerate the child dev array parsed from VBT to check whether 845 * the LVDS is present. 846 * If it is present, return 1. 847 * If it is not present, return false. 848 * If no child dev is parsed from VBT, it assumes that the LVDS is present. 849 */ 850 static bool lvds_is_present_in_vbt(struct drm_device *dev, 851 u8 *i2c_pin) 852 { 853 struct drm_i915_private *dev_priv = dev->dev_private; 854 int i; 855 856 if (!dev_priv->child_dev_num) 857 return true; 858 859 for (i = 0; i < dev_priv->child_dev_num; i++) { 860 struct child_device_config *child = dev_priv->child_dev + i; 861 862 /* If the device type is not LFP, continue. 863 * We have to check both the new identifiers as well as the 864 * old for compatibility with some BIOSes. 865 */ 866 if (child->device_type != DEVICE_TYPE_INT_LFP && 867 child->device_type != DEVICE_TYPE_LFP) 868 continue; 869 870 if (child->i2c_pin) 871 *i2c_pin = child->i2c_pin; 872 873 /* However, we cannot trust the BIOS writers to populate 874 * the VBT correctly. Since LVDS requires additional 875 * information from AIM blocks, a non-zero addin offset is 876 * a good indicator that the LVDS is actually present. 877 */ 878 if (child->addin_offset) 879 return true; 880 881 /* But even then some BIOS writers perform some black magic 882 * and instantiate the device without reference to any 883 * additional data. Trust that if the VBT was written into 884 * the OpRegion then they have validated the LVDS's existence. 885 */ 886 if (dev_priv->opregion.vbt) 887 return true; 888 } 889 890 return false; 891 } 892 893 static bool intel_lvds_supported(struct drm_device *dev) 894 { 895 /* With the introduction of the PCH we gained a dedicated 896 * LVDS presence pin, use it. */ 897 if (HAS_PCH_SPLIT(dev)) 898 return true; 899 900 /* Otherwise LVDS was only attached to mobile products, 901 * except for the inglorious 830gm */ 902 return IS_MOBILE(dev) && !IS_I830(dev); 903 } 904 905 /** 906 * intel_lvds_init - setup LVDS connectors on this device 907 * @dev: drm device 908 * 909 * Create the connector, register the LVDS DDC bus, and try to figure out what 910 * modes we can display on the LVDS panel (if present). 911 */ 912 bool intel_lvds_init(struct drm_device *dev) 913 { 914 struct drm_i915_private *dev_priv = dev->dev_private; 915 struct intel_lvds *intel_lvds; 916 struct intel_encoder *intel_encoder; 917 struct intel_connector *intel_connector; 918 struct drm_connector *connector; 919 struct drm_encoder *encoder; 920 struct drm_display_mode *scan; /* *modes, *bios_mode; */ 921 struct drm_crtc *crtc; 922 u32 lvds; 923 int pipe; 924 u8 pin; 925 926 if (!intel_lvds_supported(dev)) 927 return false; 928 929 /* Skip init on machines we know falsely report LVDS */ 930 if (dmi_check_system(intel_no_lvds)) 931 return false; 932 933 pin = GMBUS_PORT_PANEL; 934 if (!lvds_is_present_in_vbt(dev, &pin)) { 935 DRM_DEBUG_KMS("LVDS is not present in VBT\n"); 936 return false; 937 } 938 939 if (HAS_PCH_SPLIT(dev)) { 940 if ((I915_READ(PCH_LVDS) & LVDS_DETECTED) == 0) 941 return false; 942 if (dev_priv->edp.support) { 943 DRM_DEBUG_KMS("disable LVDS for eDP support\n"); 944 return false; 945 } 946 } 947 948 intel_lvds = kmalloc(sizeof(struct intel_lvds), DRM_MEM_KMS, 949 M_WAITOK | M_ZERO); 950 intel_connector = kmalloc(sizeof(struct intel_connector), DRM_MEM_KMS, 951 M_WAITOK | M_ZERO); 952 953 if (!HAS_PCH_SPLIT(dev)) { 954 intel_lvds->pfit_control = I915_READ(PFIT_CONTROL); 955 } 956 957 intel_encoder = &intel_lvds->base; 958 encoder = &intel_encoder->base; 959 connector = &intel_connector->base; 960 drm_connector_init(dev, &intel_connector->base, &intel_lvds_connector_funcs, 961 DRM_MODE_CONNECTOR_LVDS); 962 963 drm_encoder_init(dev, &intel_encoder->base, &intel_lvds_enc_funcs, 964 DRM_MODE_ENCODER_LVDS); 965 966 intel_connector_attach_encoder(intel_connector, intel_encoder); 967 intel_encoder->type = INTEL_OUTPUT_LVDS; 968 969 intel_encoder->clone_mask = (1 << INTEL_LVDS_CLONE_BIT); 970 if (HAS_PCH_SPLIT(dev)) 971 intel_encoder->crtc_mask = (1 << 0) | (1 << 1) | (1 << 2); 972 else 973 intel_encoder->crtc_mask = (1 << 1); 974 975 drm_encoder_helper_add(encoder, &intel_lvds_helper_funcs); 976 drm_connector_helper_add(connector, &intel_lvds_connector_helper_funcs); 977 connector->display_info.subpixel_order = SubPixelHorizontalRGB; 978 connector->interlace_allowed = false; 979 connector->doublescan_allowed = false; 980 981 /* create the scaling mode property */ 982 drm_mode_create_scaling_mode_property(dev); 983 /* 984 * the initial panel fitting mode will be FULL_SCREEN. 985 */ 986 987 drm_connector_attach_property(&intel_connector->base, 988 dev->mode_config.scaling_mode_property, 989 DRM_MODE_SCALE_ASPECT); 990 intel_lvds->fitting_mode = DRM_MODE_SCALE_ASPECT; 991 /* 992 * LVDS discovery: 993 * 1) check for EDID on DDC 994 * 2) check for VBT data 995 * 3) check to see if LVDS is already on 996 * if none of the above, no panel 997 * 4) make sure lid is open 998 * if closed, act like it's not there for now 999 */ 1000 1001 /* 1002 * Attempt to get the fixed panel mode from DDC. Assume that the 1003 * preferred mode is the right one. 1004 */ 1005 intel_lvds->edid = drm_get_edid(connector, dev_priv->gmbus[pin]); 1006 if (intel_lvds->edid) { 1007 if (drm_add_edid_modes(connector, 1008 intel_lvds->edid)) { 1009 drm_mode_connector_update_edid_property(connector, 1010 intel_lvds->edid); 1011 } else { 1012 drm_free(intel_lvds->edid, DRM_MEM_KMS); 1013 intel_lvds->edid = NULL; 1014 } 1015 } 1016 if (!intel_lvds->edid) { 1017 /* Didn't get an EDID, so 1018 * Set wide sync ranges so we get all modes 1019 * handed to valid_mode for checking 1020 */ 1021 connector->display_info.min_vfreq = 0; 1022 connector->display_info.max_vfreq = 200; 1023 connector->display_info.min_hfreq = 0; 1024 connector->display_info.max_hfreq = 200; 1025 } 1026 1027 list_for_each_entry(scan, &connector->probed_modes, head) { 1028 if (scan->type & DRM_MODE_TYPE_PREFERRED) { 1029 intel_lvds->fixed_mode = 1030 drm_mode_duplicate(dev, scan); 1031 intel_find_lvds_downclock(dev, 1032 intel_lvds->fixed_mode, 1033 connector); 1034 goto out; 1035 } 1036 } 1037 1038 /* Failed to get EDID, what about VBT? */ 1039 if (dev_priv->lfp_lvds_vbt_mode) { 1040 intel_lvds->fixed_mode = 1041 drm_mode_duplicate(dev, dev_priv->lfp_lvds_vbt_mode); 1042 if (intel_lvds->fixed_mode) { 1043 intel_lvds->fixed_mode->type |= 1044 DRM_MODE_TYPE_PREFERRED; 1045 goto out; 1046 } 1047 } 1048 1049 /* 1050 * If we didn't get EDID, try checking if the panel is already turned 1051 * on. If so, assume that whatever is currently programmed is the 1052 * correct mode. 1053 */ 1054 1055 /* Ironlake: FIXME if still fail, not try pipe mode now */ 1056 if (HAS_PCH_SPLIT(dev)) 1057 goto failed; 1058 1059 lvds = I915_READ(LVDS); 1060 pipe = (lvds & LVDS_PIPEB_SELECT) ? 1 : 0; 1061 crtc = intel_get_crtc_for_pipe(dev, pipe); 1062 1063 if (crtc && (lvds & LVDS_PORT_EN)) { 1064 intel_lvds->fixed_mode = intel_crtc_mode_get(dev, crtc); 1065 if (intel_lvds->fixed_mode) { 1066 intel_lvds->fixed_mode->type |= 1067 DRM_MODE_TYPE_PREFERRED; 1068 goto out; 1069 } 1070 } 1071 1072 /* If we still don't have a mode after all that, give up. */ 1073 if (!intel_lvds->fixed_mode) 1074 goto failed; 1075 1076 out: 1077 if (HAS_PCH_SPLIT(dev)) { 1078 u32 pwm; 1079 1080 pipe = (I915_READ(PCH_LVDS) & LVDS_PIPEB_SELECT) ? 1 : 0; 1081 1082 /* make sure PWM is enabled and locked to the LVDS pipe */ 1083 pwm = I915_READ(BLC_PWM_CPU_CTL2); 1084 if (pipe == 0 && (pwm & PWM_PIPE_B)) 1085 I915_WRITE(BLC_PWM_CPU_CTL2, pwm & ~PWM_ENABLE); 1086 if (pipe) 1087 pwm |= PWM_PIPE_B; 1088 else 1089 pwm &= ~PWM_PIPE_B; 1090 I915_WRITE(BLC_PWM_CPU_CTL2, pwm | PWM_ENABLE); 1091 1092 pwm = I915_READ(BLC_PWM_PCH_CTL1); 1093 pwm |= PWM_PCH_ENABLE; 1094 I915_WRITE(BLC_PWM_PCH_CTL1, pwm); 1095 /* 1096 * Unlock registers and just 1097 * leave them unlocked 1098 */ 1099 I915_WRITE(PCH_PP_CONTROL, 1100 I915_READ(PCH_PP_CONTROL) | PANEL_UNLOCK_REGS); 1101 } else { 1102 /* 1103 * Unlock registers and just 1104 * leave them unlocked 1105 */ 1106 I915_WRITE(PP_CONTROL, 1107 I915_READ(PP_CONTROL) | PANEL_UNLOCK_REGS); 1108 } 1109 #ifdef NOTYET 1110 dev_priv->lid_notifier.notifier_call = intel_lid_notify; 1111 if (acpi_lid_notifier_register(&dev_priv->lid_notifier)) { 1112 DRM_DEBUG_KMS("lid notifier registration failed\n"); 1113 dev_priv->lid_notifier.notifier_call = NULL; 1114 } 1115 #endif 1116 /* keep the LVDS connector */ 1117 dev_priv->int_lvds_connector = connector; 1118 #if 0 1119 drm_sysfs_connector_add(connector); 1120 #endif 1121 intel_panel_setup_backlight(dev); 1122 return true; 1123 1124 failed: 1125 DRM_DEBUG_KMS("No LVDS modes found, disabling.\n"); 1126 drm_connector_cleanup(connector); 1127 drm_encoder_cleanup(encoder); 1128 drm_free(intel_lvds, DRM_MEM_KMS); 1129 drm_free(intel_connector, DRM_MEM_KMS); 1130 return false; 1131 } 1132