1ba55f2f5SFrançois Tigeot /* 2ba55f2f5SFrançois Tigeot * Copyright 2006 Dave Airlie <airlied@linux.ie> 3ba55f2f5SFrançois Tigeot * Copyright © 2006-2007 Intel Corporation 4ba55f2f5SFrançois Tigeot * 5ba55f2f5SFrançois Tigeot * Permission is hereby granted, free of charge, to any person obtaining a 6ba55f2f5SFrançois Tigeot * copy of this software and associated documentation files (the "Software"), 7ba55f2f5SFrançois Tigeot * to deal in the Software without restriction, including without limitation 8ba55f2f5SFrançois Tigeot * the rights to use, copy, modify, merge, publish, distribute, sublicense, 9ba55f2f5SFrançois Tigeot * and/or sell copies of the Software, and to permit persons to whom the 10ba55f2f5SFrançois Tigeot * Software is furnished to do so, subject to the following conditions: 11ba55f2f5SFrançois Tigeot * 12ba55f2f5SFrançois Tigeot * The above copyright notice and this permission notice (including the next 13ba55f2f5SFrançois Tigeot * paragraph) shall be included in all copies or substantial portions of the 14ba55f2f5SFrançois Tigeot * Software. 15ba55f2f5SFrançois Tigeot * 16ba55f2f5SFrançois Tigeot * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17ba55f2f5SFrançois Tigeot * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18ba55f2f5SFrançois Tigeot * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19ba55f2f5SFrançois Tigeot * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 20ba55f2f5SFrançois Tigeot * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 21ba55f2f5SFrançois Tigeot * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 22ba55f2f5SFrançois Tigeot * DEALINGS IN THE SOFTWARE. 23ba55f2f5SFrançois Tigeot * 24ba55f2f5SFrançois Tigeot * Authors: 25ba55f2f5SFrançois Tigeot * Eric Anholt <eric@anholt.net> 26ba55f2f5SFrançois Tigeot */ 27ba55f2f5SFrançois Tigeot #include <linux/i2c.h> 28ba55f2f5SFrançois Tigeot #include <drm/drmP.h> 29ba55f2f5SFrançois Tigeot #include <drm/drm_crtc.h> 30ba55f2f5SFrançois Tigeot #include "intel_drv.h" 31ba55f2f5SFrançois Tigeot #include <drm/i915_drm.h> 32ba55f2f5SFrançois Tigeot #include "i915_drv.h" 33ba55f2f5SFrançois Tigeot #include "dvo.h" 34ba55f2f5SFrançois Tigeot 35ba55f2f5SFrançois Tigeot #define SIL164_ADDR 0x38 36ba55f2f5SFrançois Tigeot #define CH7xxx_ADDR 0x76 37ba55f2f5SFrançois Tigeot #define TFP410_ADDR 0x38 38ba55f2f5SFrançois Tigeot #define NS2501_ADDR 0x38 39ba55f2f5SFrançois Tigeot 40ba55f2f5SFrançois Tigeot static const struct intel_dvo_device intel_dvo_devices[] = { 41ba55f2f5SFrançois Tigeot { 42ba55f2f5SFrançois Tigeot .type = INTEL_DVO_CHIP_TMDS, 43ba55f2f5SFrançois Tigeot .name = "sil164", 44ba55f2f5SFrançois Tigeot .dvo_reg = DVOC, 45ba55f2f5SFrançois Tigeot .slave_addr = SIL164_ADDR, 46ba55f2f5SFrançois Tigeot .dev_ops = &sil164_ops, 47ba55f2f5SFrançois Tigeot }, 48ba55f2f5SFrançois Tigeot { 49ba55f2f5SFrançois Tigeot .type = INTEL_DVO_CHIP_TMDS, 50ba55f2f5SFrançois Tigeot .name = "ch7xxx", 51ba55f2f5SFrançois Tigeot .dvo_reg = DVOC, 52ba55f2f5SFrançois Tigeot .slave_addr = CH7xxx_ADDR, 53ba55f2f5SFrançois Tigeot .dev_ops = &ch7xxx_ops, 54ba55f2f5SFrançois Tigeot }, 55ba55f2f5SFrançois Tigeot { 56ba55f2f5SFrançois Tigeot .type = INTEL_DVO_CHIP_TMDS, 57ba55f2f5SFrançois Tigeot .name = "ch7xxx", 58ba55f2f5SFrançois Tigeot .dvo_reg = DVOC, 59ba55f2f5SFrançois Tigeot .slave_addr = 0x75, /* For some ch7010 */ 60ba55f2f5SFrançois Tigeot .dev_ops = &ch7xxx_ops, 61ba55f2f5SFrançois Tigeot }, 62ba55f2f5SFrançois Tigeot { 63ba55f2f5SFrançois Tigeot .type = INTEL_DVO_CHIP_LVDS, 64ba55f2f5SFrançois Tigeot .name = "ivch", 65ba55f2f5SFrançois Tigeot .dvo_reg = DVOA, 66ba55f2f5SFrançois Tigeot .slave_addr = 0x02, /* Might also be 0x44, 0x84, 0xc4 */ 67ba55f2f5SFrançois Tigeot .dev_ops = &ivch_ops, 68ba55f2f5SFrançois Tigeot }, 69ba55f2f5SFrançois Tigeot { 70ba55f2f5SFrançois Tigeot .type = INTEL_DVO_CHIP_TMDS, 71ba55f2f5SFrançois Tigeot .name = "tfp410", 72ba55f2f5SFrançois Tigeot .dvo_reg = DVOC, 73ba55f2f5SFrançois Tigeot .slave_addr = TFP410_ADDR, 74ba55f2f5SFrançois Tigeot .dev_ops = &tfp410_ops, 75ba55f2f5SFrançois Tigeot }, 76ba55f2f5SFrançois Tigeot { 77ba55f2f5SFrançois Tigeot .type = INTEL_DVO_CHIP_LVDS, 78ba55f2f5SFrançois Tigeot .name = "ch7017", 79ba55f2f5SFrançois Tigeot .dvo_reg = DVOC, 80ba55f2f5SFrançois Tigeot .slave_addr = 0x75, 81ba55f2f5SFrançois Tigeot .gpio = GMBUS_PORT_DPB, 82ba55f2f5SFrançois Tigeot .dev_ops = &ch7017_ops, 83ba55f2f5SFrançois Tigeot }, 84ba55f2f5SFrançois Tigeot { 85ba55f2f5SFrançois Tigeot .type = INTEL_DVO_CHIP_TMDS, 86ba55f2f5SFrançois Tigeot .name = "ns2501", 87ba55f2f5SFrançois Tigeot .dvo_reg = DVOC, 88ba55f2f5SFrançois Tigeot .slave_addr = NS2501_ADDR, 89ba55f2f5SFrançois Tigeot .dev_ops = &ns2501_ops, 90ba55f2f5SFrançois Tigeot } 91ba55f2f5SFrançois Tigeot }; 92ba55f2f5SFrançois Tigeot 93ba55f2f5SFrançois Tigeot struct intel_dvo { 94ba55f2f5SFrançois Tigeot struct intel_encoder base; 95ba55f2f5SFrançois Tigeot 96ba55f2f5SFrançois Tigeot struct intel_dvo_device dev; 97ba55f2f5SFrançois Tigeot 98ba55f2f5SFrançois Tigeot struct drm_display_mode *panel_fixed_mode; 99ba55f2f5SFrançois Tigeot bool panel_wants_dither; 100ba55f2f5SFrançois Tigeot }; 101ba55f2f5SFrançois Tigeot 102ba55f2f5SFrançois Tigeot static struct intel_dvo *enc_to_dvo(struct intel_encoder *encoder) 103ba55f2f5SFrançois Tigeot { 104ba55f2f5SFrançois Tigeot return container_of(encoder, struct intel_dvo, base); 105ba55f2f5SFrançois Tigeot } 106ba55f2f5SFrançois Tigeot 107ba55f2f5SFrançois Tigeot static struct intel_dvo *intel_attached_dvo(struct drm_connector *connector) 108ba55f2f5SFrançois Tigeot { 109ba55f2f5SFrançois Tigeot return enc_to_dvo(intel_attached_encoder(connector)); 110ba55f2f5SFrançois Tigeot } 111ba55f2f5SFrançois Tigeot 112ba55f2f5SFrançois Tigeot static bool intel_dvo_connector_get_hw_state(struct intel_connector *connector) 113ba55f2f5SFrançois Tigeot { 114*24edb884SFrançois Tigeot struct drm_device *dev = connector->base.dev; 115*24edb884SFrançois Tigeot struct drm_i915_private *dev_priv = dev->dev_private; 116ba55f2f5SFrançois Tigeot struct intel_dvo *intel_dvo = intel_attached_dvo(&connector->base); 117*24edb884SFrançois Tigeot u32 tmp; 118*24edb884SFrançois Tigeot 119*24edb884SFrançois Tigeot tmp = I915_READ(intel_dvo->dev.dvo_reg); 120*24edb884SFrançois Tigeot 121*24edb884SFrançois Tigeot if (!(tmp & DVO_ENABLE)) 122*24edb884SFrançois Tigeot return false; 123ba55f2f5SFrançois Tigeot 124ba55f2f5SFrançois Tigeot return intel_dvo->dev.dev_ops->get_hw_state(&intel_dvo->dev); 125ba55f2f5SFrançois Tigeot } 126ba55f2f5SFrançois Tigeot 127ba55f2f5SFrançois Tigeot static bool intel_dvo_get_hw_state(struct intel_encoder *encoder, 128ba55f2f5SFrançois Tigeot enum i915_pipe *pipe) 129ba55f2f5SFrançois Tigeot { 130ba55f2f5SFrançois Tigeot struct drm_device *dev = encoder->base.dev; 131ba55f2f5SFrançois Tigeot struct drm_i915_private *dev_priv = dev->dev_private; 132ba55f2f5SFrançois Tigeot struct intel_dvo *intel_dvo = enc_to_dvo(encoder); 133ba55f2f5SFrançois Tigeot u32 tmp; 134ba55f2f5SFrançois Tigeot 135ba55f2f5SFrançois Tigeot tmp = I915_READ(intel_dvo->dev.dvo_reg); 136ba55f2f5SFrançois Tigeot 137ba55f2f5SFrançois Tigeot if (!(tmp & DVO_ENABLE)) 138ba55f2f5SFrançois Tigeot return false; 139ba55f2f5SFrançois Tigeot 140ba55f2f5SFrançois Tigeot *pipe = PORT_TO_PIPE(tmp); 141ba55f2f5SFrançois Tigeot 142ba55f2f5SFrançois Tigeot return true; 143ba55f2f5SFrançois Tigeot } 144ba55f2f5SFrançois Tigeot 145ba55f2f5SFrançois Tigeot static void intel_dvo_get_config(struct intel_encoder *encoder, 146ba55f2f5SFrançois Tigeot struct intel_crtc_config *pipe_config) 147ba55f2f5SFrançois Tigeot { 148ba55f2f5SFrançois Tigeot struct drm_i915_private *dev_priv = encoder->base.dev->dev_private; 149ba55f2f5SFrançois Tigeot struct intel_dvo *intel_dvo = enc_to_dvo(encoder); 150ba55f2f5SFrançois Tigeot u32 tmp, flags = 0; 151ba55f2f5SFrançois Tigeot 152ba55f2f5SFrançois Tigeot tmp = I915_READ(intel_dvo->dev.dvo_reg); 153ba55f2f5SFrançois Tigeot if (tmp & DVO_HSYNC_ACTIVE_HIGH) 154ba55f2f5SFrançois Tigeot flags |= DRM_MODE_FLAG_PHSYNC; 155ba55f2f5SFrançois Tigeot else 156ba55f2f5SFrançois Tigeot flags |= DRM_MODE_FLAG_NHSYNC; 157ba55f2f5SFrançois Tigeot if (tmp & DVO_VSYNC_ACTIVE_HIGH) 158ba55f2f5SFrançois Tigeot flags |= DRM_MODE_FLAG_PVSYNC; 159ba55f2f5SFrançois Tigeot else 160ba55f2f5SFrançois Tigeot flags |= DRM_MODE_FLAG_NVSYNC; 161ba55f2f5SFrançois Tigeot 162ba55f2f5SFrançois Tigeot pipe_config->adjusted_mode.flags |= flags; 163ba55f2f5SFrançois Tigeot 164ba55f2f5SFrançois Tigeot pipe_config->adjusted_mode.crtc_clock = pipe_config->port_clock; 165ba55f2f5SFrançois Tigeot } 166ba55f2f5SFrançois Tigeot 167ba55f2f5SFrançois Tigeot static void intel_disable_dvo(struct intel_encoder *encoder) 168ba55f2f5SFrançois Tigeot { 169ba55f2f5SFrançois Tigeot struct drm_i915_private *dev_priv = encoder->base.dev->dev_private; 170ba55f2f5SFrançois Tigeot struct intel_dvo *intel_dvo = enc_to_dvo(encoder); 171ba55f2f5SFrançois Tigeot u32 dvo_reg = intel_dvo->dev.dvo_reg; 172ba55f2f5SFrançois Tigeot u32 temp = I915_READ(dvo_reg); 173ba55f2f5SFrançois Tigeot 174ba55f2f5SFrançois Tigeot intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, false); 175ba55f2f5SFrançois Tigeot I915_WRITE(dvo_reg, temp & ~DVO_ENABLE); 176ba55f2f5SFrançois Tigeot I915_READ(dvo_reg); 177ba55f2f5SFrançois Tigeot } 178ba55f2f5SFrançois Tigeot 179ba55f2f5SFrançois Tigeot static void intel_enable_dvo(struct intel_encoder *encoder) 180ba55f2f5SFrançois Tigeot { 181ba55f2f5SFrançois Tigeot struct drm_i915_private *dev_priv = encoder->base.dev->dev_private; 182ba55f2f5SFrançois Tigeot struct intel_dvo *intel_dvo = enc_to_dvo(encoder); 183ba55f2f5SFrançois Tigeot struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc); 184ba55f2f5SFrançois Tigeot u32 dvo_reg = intel_dvo->dev.dvo_reg; 185ba55f2f5SFrançois Tigeot u32 temp = I915_READ(dvo_reg); 186ba55f2f5SFrançois Tigeot 187ba55f2f5SFrançois Tigeot I915_WRITE(dvo_reg, temp | DVO_ENABLE); 188ba55f2f5SFrançois Tigeot I915_READ(dvo_reg); 189ba55f2f5SFrançois Tigeot intel_dvo->dev.dev_ops->mode_set(&intel_dvo->dev, 190ba55f2f5SFrançois Tigeot &crtc->config.requested_mode, 191ba55f2f5SFrançois Tigeot &crtc->config.adjusted_mode); 192ba55f2f5SFrançois Tigeot 193ba55f2f5SFrançois Tigeot intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, true); 194ba55f2f5SFrançois Tigeot } 195ba55f2f5SFrançois Tigeot 196ba55f2f5SFrançois Tigeot /* Special dpms function to support cloning between dvo/sdvo/crt. */ 197ba55f2f5SFrançois Tigeot static void intel_dvo_dpms(struct drm_connector *connector, int mode) 198ba55f2f5SFrançois Tigeot { 199ba55f2f5SFrançois Tigeot struct intel_dvo *intel_dvo = intel_attached_dvo(connector); 200ba55f2f5SFrançois Tigeot struct drm_crtc *crtc; 201ba55f2f5SFrançois Tigeot struct intel_crtc_config *config; 202ba55f2f5SFrançois Tigeot 203ba55f2f5SFrançois Tigeot /* dvo supports only 2 dpms states. */ 204ba55f2f5SFrançois Tigeot if (mode != DRM_MODE_DPMS_ON) 205ba55f2f5SFrançois Tigeot mode = DRM_MODE_DPMS_OFF; 206ba55f2f5SFrançois Tigeot 207ba55f2f5SFrançois Tigeot if (mode == connector->dpms) 208ba55f2f5SFrançois Tigeot return; 209ba55f2f5SFrançois Tigeot 210ba55f2f5SFrançois Tigeot connector->dpms = mode; 211ba55f2f5SFrançois Tigeot 212ba55f2f5SFrançois Tigeot /* Only need to change hw state when actually enabled */ 213ba55f2f5SFrançois Tigeot crtc = intel_dvo->base.base.crtc; 214ba55f2f5SFrançois Tigeot if (!crtc) { 215ba55f2f5SFrançois Tigeot intel_dvo->base.connectors_active = false; 216ba55f2f5SFrançois Tigeot return; 217ba55f2f5SFrançois Tigeot } 218ba55f2f5SFrançois Tigeot 219ba55f2f5SFrançois Tigeot /* We call connector dpms manually below in case pipe dpms doesn't 220ba55f2f5SFrançois Tigeot * change due to cloning. */ 221ba55f2f5SFrançois Tigeot if (mode == DRM_MODE_DPMS_ON) { 222ba55f2f5SFrançois Tigeot config = &to_intel_crtc(crtc)->config; 223ba55f2f5SFrançois Tigeot 224ba55f2f5SFrançois Tigeot intel_dvo->base.connectors_active = true; 225ba55f2f5SFrançois Tigeot 226ba55f2f5SFrançois Tigeot intel_crtc_update_dpms(crtc); 227ba55f2f5SFrançois Tigeot 228ba55f2f5SFrançois Tigeot intel_dvo->dev.dev_ops->mode_set(&intel_dvo->dev, 229ba55f2f5SFrançois Tigeot &config->requested_mode, 230ba55f2f5SFrançois Tigeot &config->adjusted_mode); 231ba55f2f5SFrançois Tigeot 232ba55f2f5SFrançois Tigeot intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, true); 233ba55f2f5SFrançois Tigeot } else { 234ba55f2f5SFrançois Tigeot intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, false); 235ba55f2f5SFrançois Tigeot 236ba55f2f5SFrançois Tigeot intel_dvo->base.connectors_active = false; 237ba55f2f5SFrançois Tigeot 238ba55f2f5SFrançois Tigeot intel_crtc_update_dpms(crtc); 239ba55f2f5SFrançois Tigeot } 240ba55f2f5SFrançois Tigeot 241ba55f2f5SFrançois Tigeot intel_modeset_check_state(connector->dev); 242ba55f2f5SFrançois Tigeot } 243ba55f2f5SFrançois Tigeot 244ba55f2f5SFrançois Tigeot static enum drm_mode_status 245ba55f2f5SFrançois Tigeot intel_dvo_mode_valid(struct drm_connector *connector, 246ba55f2f5SFrançois Tigeot struct drm_display_mode *mode) 247ba55f2f5SFrançois Tigeot { 248ba55f2f5SFrançois Tigeot struct intel_dvo *intel_dvo = intel_attached_dvo(connector); 249ba55f2f5SFrançois Tigeot 250ba55f2f5SFrançois Tigeot if (mode->flags & DRM_MODE_FLAG_DBLSCAN) 251ba55f2f5SFrançois Tigeot return MODE_NO_DBLESCAN; 252ba55f2f5SFrançois Tigeot 253ba55f2f5SFrançois Tigeot /* XXX: Validate clock range */ 254ba55f2f5SFrançois Tigeot 255ba55f2f5SFrançois Tigeot if (intel_dvo->panel_fixed_mode) { 256ba55f2f5SFrançois Tigeot if (mode->hdisplay > intel_dvo->panel_fixed_mode->hdisplay) 257ba55f2f5SFrançois Tigeot return MODE_PANEL; 258ba55f2f5SFrançois Tigeot if (mode->vdisplay > intel_dvo->panel_fixed_mode->vdisplay) 259ba55f2f5SFrançois Tigeot return MODE_PANEL; 260ba55f2f5SFrançois Tigeot } 261ba55f2f5SFrançois Tigeot 262ba55f2f5SFrançois Tigeot return intel_dvo->dev.dev_ops->mode_valid(&intel_dvo->dev, mode); 263ba55f2f5SFrançois Tigeot } 264ba55f2f5SFrançois Tigeot 265ba55f2f5SFrançois Tigeot static bool intel_dvo_compute_config(struct intel_encoder *encoder, 266ba55f2f5SFrançois Tigeot struct intel_crtc_config *pipe_config) 267ba55f2f5SFrançois Tigeot { 268ba55f2f5SFrançois Tigeot struct intel_dvo *intel_dvo = enc_to_dvo(encoder); 269ba55f2f5SFrançois Tigeot struct drm_display_mode *adjusted_mode = &pipe_config->adjusted_mode; 270ba55f2f5SFrançois Tigeot 271ba55f2f5SFrançois Tigeot /* If we have timings from the BIOS for the panel, put them in 272ba55f2f5SFrançois Tigeot * to the adjusted mode. The CRTC will be set up for this mode, 273ba55f2f5SFrançois Tigeot * with the panel scaling set up to source from the H/VDisplay 274ba55f2f5SFrançois Tigeot * of the original mode. 275ba55f2f5SFrançois Tigeot */ 276ba55f2f5SFrançois Tigeot if (intel_dvo->panel_fixed_mode != NULL) { 277ba55f2f5SFrançois Tigeot #define C(x) adjusted_mode->x = intel_dvo->panel_fixed_mode->x 278ba55f2f5SFrançois Tigeot C(hdisplay); 279ba55f2f5SFrançois Tigeot C(hsync_start); 280ba55f2f5SFrançois Tigeot C(hsync_end); 281ba55f2f5SFrançois Tigeot C(htotal); 282ba55f2f5SFrançois Tigeot C(vdisplay); 283ba55f2f5SFrançois Tigeot C(vsync_start); 284ba55f2f5SFrançois Tigeot C(vsync_end); 285ba55f2f5SFrançois Tigeot C(vtotal); 286ba55f2f5SFrançois Tigeot C(clock); 287ba55f2f5SFrançois Tigeot #undef C 288ba55f2f5SFrançois Tigeot 289ba55f2f5SFrançois Tigeot drm_mode_set_crtcinfo(adjusted_mode, 0); 290ba55f2f5SFrançois Tigeot } 291ba55f2f5SFrançois Tigeot 292ba55f2f5SFrançois Tigeot return true; 293ba55f2f5SFrançois Tigeot } 294ba55f2f5SFrançois Tigeot 295ba55f2f5SFrançois Tigeot static void intel_dvo_pre_enable(struct intel_encoder *encoder) 296ba55f2f5SFrançois Tigeot { 297ba55f2f5SFrançois Tigeot struct drm_device *dev = encoder->base.dev; 298ba55f2f5SFrançois Tigeot struct drm_i915_private *dev_priv = dev->dev_private; 299ba55f2f5SFrançois Tigeot struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc); 300ba55f2f5SFrançois Tigeot struct drm_display_mode *adjusted_mode = &crtc->config.adjusted_mode; 301ba55f2f5SFrançois Tigeot struct intel_dvo *intel_dvo = enc_to_dvo(encoder); 302ba55f2f5SFrançois Tigeot int pipe = crtc->pipe; 303ba55f2f5SFrançois Tigeot u32 dvo_val; 304ba55f2f5SFrançois Tigeot u32 dvo_reg = intel_dvo->dev.dvo_reg, dvo_srcdim_reg; 305ba55f2f5SFrançois Tigeot 306ba55f2f5SFrançois Tigeot switch (dvo_reg) { 307ba55f2f5SFrançois Tigeot case DVOA: 308ba55f2f5SFrançois Tigeot default: 309ba55f2f5SFrançois Tigeot dvo_srcdim_reg = DVOA_SRCDIM; 310ba55f2f5SFrançois Tigeot break; 311ba55f2f5SFrançois Tigeot case DVOB: 312ba55f2f5SFrançois Tigeot dvo_srcdim_reg = DVOB_SRCDIM; 313ba55f2f5SFrançois Tigeot break; 314ba55f2f5SFrançois Tigeot case DVOC: 315ba55f2f5SFrançois Tigeot dvo_srcdim_reg = DVOC_SRCDIM; 316ba55f2f5SFrançois Tigeot break; 317ba55f2f5SFrançois Tigeot } 318ba55f2f5SFrançois Tigeot 319ba55f2f5SFrançois Tigeot /* Save the data order, since I don't know what it should be set to. */ 320ba55f2f5SFrançois Tigeot dvo_val = I915_READ(dvo_reg) & 321ba55f2f5SFrançois Tigeot (DVO_PRESERVE_MASK | DVO_DATA_ORDER_GBRG); 322ba55f2f5SFrançois Tigeot dvo_val |= DVO_DATA_ORDER_FP | DVO_BORDER_ENABLE | 323ba55f2f5SFrançois Tigeot DVO_BLANK_ACTIVE_HIGH; 324ba55f2f5SFrançois Tigeot 325ba55f2f5SFrançois Tigeot if (pipe == 1) 326ba55f2f5SFrançois Tigeot dvo_val |= DVO_PIPE_B_SELECT; 327ba55f2f5SFrançois Tigeot dvo_val |= DVO_PIPE_STALL; 328ba55f2f5SFrançois Tigeot if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC) 329ba55f2f5SFrançois Tigeot dvo_val |= DVO_HSYNC_ACTIVE_HIGH; 330ba55f2f5SFrançois Tigeot if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC) 331ba55f2f5SFrançois Tigeot dvo_val |= DVO_VSYNC_ACTIVE_HIGH; 332ba55f2f5SFrançois Tigeot 333ba55f2f5SFrançois Tigeot /*I915_WRITE(DVOB_SRCDIM, 334ba55f2f5SFrançois Tigeot (adjusted_mode->hdisplay << DVO_SRCDIM_HORIZONTAL_SHIFT) | 335ba55f2f5SFrançois Tigeot (adjusted_mode->VDisplay << DVO_SRCDIM_VERTICAL_SHIFT));*/ 336ba55f2f5SFrançois Tigeot I915_WRITE(dvo_srcdim_reg, 337ba55f2f5SFrançois Tigeot (adjusted_mode->hdisplay << DVO_SRCDIM_HORIZONTAL_SHIFT) | 338ba55f2f5SFrançois Tigeot (adjusted_mode->vdisplay << DVO_SRCDIM_VERTICAL_SHIFT)); 339ba55f2f5SFrançois Tigeot /*I915_WRITE(DVOB, dvo_val);*/ 340ba55f2f5SFrançois Tigeot I915_WRITE(dvo_reg, dvo_val); 341ba55f2f5SFrançois Tigeot } 342ba55f2f5SFrançois Tigeot 343ba55f2f5SFrançois Tigeot /** 344ba55f2f5SFrançois Tigeot * Detect the output connection on our DVO device. 345ba55f2f5SFrançois Tigeot * 346ba55f2f5SFrançois Tigeot * Unimplemented. 347ba55f2f5SFrançois Tigeot */ 348ba55f2f5SFrançois Tigeot static enum drm_connector_status 349ba55f2f5SFrançois Tigeot intel_dvo_detect(struct drm_connector *connector, bool force) 350ba55f2f5SFrançois Tigeot { 351ba55f2f5SFrançois Tigeot struct intel_dvo *intel_dvo = intel_attached_dvo(connector); 352ba55f2f5SFrançois Tigeot DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n", 353ba55f2f5SFrançois Tigeot connector->base.id, connector->name); 354ba55f2f5SFrançois Tigeot return intel_dvo->dev.dev_ops->detect(&intel_dvo->dev); 355ba55f2f5SFrançois Tigeot } 356ba55f2f5SFrançois Tigeot 357ba55f2f5SFrançois Tigeot static int intel_dvo_get_modes(struct drm_connector *connector) 358ba55f2f5SFrançois Tigeot { 359ba55f2f5SFrançois Tigeot struct intel_dvo *intel_dvo = intel_attached_dvo(connector); 360ba55f2f5SFrançois Tigeot struct drm_i915_private *dev_priv = connector->dev->dev_private; 361ba55f2f5SFrançois Tigeot 362ba55f2f5SFrançois Tigeot /* We should probably have an i2c driver get_modes function for those 363ba55f2f5SFrançois Tigeot * devices which will have a fixed set of modes determined by the chip 364ba55f2f5SFrançois Tigeot * (TV-out, for example), but for now with just TMDS and LVDS, 365ba55f2f5SFrançois Tigeot * that's not the case. 366ba55f2f5SFrançois Tigeot */ 367ba55f2f5SFrançois Tigeot intel_ddc_get_modes(connector, 368ba55f2f5SFrançois Tigeot intel_gmbus_get_adapter(dev_priv, GMBUS_PORT_DPC)); 369ba55f2f5SFrançois Tigeot if (!list_empty(&connector->probed_modes)) 370ba55f2f5SFrançois Tigeot return 1; 371ba55f2f5SFrançois Tigeot 372ba55f2f5SFrançois Tigeot if (intel_dvo->panel_fixed_mode != NULL) { 373ba55f2f5SFrançois Tigeot struct drm_display_mode *mode; 374ba55f2f5SFrançois Tigeot mode = drm_mode_duplicate(connector->dev, intel_dvo->panel_fixed_mode); 375ba55f2f5SFrançois Tigeot if (mode) { 376ba55f2f5SFrançois Tigeot drm_mode_probed_add(connector, mode); 377ba55f2f5SFrançois Tigeot return 1; 378ba55f2f5SFrançois Tigeot } 379ba55f2f5SFrançois Tigeot } 380ba55f2f5SFrançois Tigeot 381ba55f2f5SFrançois Tigeot return 0; 382ba55f2f5SFrançois Tigeot } 383ba55f2f5SFrançois Tigeot 384ba55f2f5SFrançois Tigeot static void intel_dvo_destroy(struct drm_connector *connector) 385ba55f2f5SFrançois Tigeot { 386ba55f2f5SFrançois Tigeot drm_connector_cleanup(connector); 387ba55f2f5SFrançois Tigeot kfree(connector); 388ba55f2f5SFrançois Tigeot } 389ba55f2f5SFrançois Tigeot 390ba55f2f5SFrançois Tigeot static const struct drm_connector_funcs intel_dvo_connector_funcs = { 391ba55f2f5SFrançois Tigeot .dpms = intel_dvo_dpms, 392ba55f2f5SFrançois Tigeot .detect = intel_dvo_detect, 393ba55f2f5SFrançois Tigeot .destroy = intel_dvo_destroy, 394ba55f2f5SFrançois Tigeot .fill_modes = drm_helper_probe_single_connector_modes, 395ba55f2f5SFrançois Tigeot }; 396ba55f2f5SFrançois Tigeot 397ba55f2f5SFrançois Tigeot static const struct drm_connector_helper_funcs intel_dvo_connector_helper_funcs = { 398ba55f2f5SFrançois Tigeot .mode_valid = intel_dvo_mode_valid, 399ba55f2f5SFrançois Tigeot .get_modes = intel_dvo_get_modes, 400ba55f2f5SFrançois Tigeot .best_encoder = intel_best_encoder, 401ba55f2f5SFrançois Tigeot }; 402ba55f2f5SFrançois Tigeot 403ba55f2f5SFrançois Tigeot static void intel_dvo_enc_destroy(struct drm_encoder *encoder) 404ba55f2f5SFrançois Tigeot { 405ba55f2f5SFrançois Tigeot struct intel_dvo *intel_dvo = enc_to_dvo(to_intel_encoder(encoder)); 406ba55f2f5SFrançois Tigeot 407ba55f2f5SFrançois Tigeot if (intel_dvo->dev.dev_ops->destroy) 408ba55f2f5SFrançois Tigeot intel_dvo->dev.dev_ops->destroy(&intel_dvo->dev); 409ba55f2f5SFrançois Tigeot 410ba55f2f5SFrançois Tigeot kfree(intel_dvo->panel_fixed_mode); 411ba55f2f5SFrançois Tigeot 412ba55f2f5SFrançois Tigeot intel_encoder_destroy(encoder); 413ba55f2f5SFrançois Tigeot } 414ba55f2f5SFrançois Tigeot 415ba55f2f5SFrançois Tigeot static const struct drm_encoder_funcs intel_dvo_enc_funcs = { 416ba55f2f5SFrançois Tigeot .destroy = intel_dvo_enc_destroy, 417ba55f2f5SFrançois Tigeot }; 418ba55f2f5SFrançois Tigeot 419ba55f2f5SFrançois Tigeot /** 420ba55f2f5SFrançois Tigeot * Attempts to get a fixed panel timing for LVDS (currently only the i830). 421ba55f2f5SFrançois Tigeot * 422ba55f2f5SFrançois Tigeot * Other chips with DVO LVDS will need to extend this to deal with the LVDS 423ba55f2f5SFrançois Tigeot * chip being on DVOB/C and having multiple pipes. 424ba55f2f5SFrançois Tigeot */ 425ba55f2f5SFrançois Tigeot static struct drm_display_mode * 426ba55f2f5SFrançois Tigeot intel_dvo_get_current_mode(struct drm_connector *connector) 427ba55f2f5SFrançois Tigeot { 428ba55f2f5SFrançois Tigeot struct drm_device *dev = connector->dev; 429ba55f2f5SFrançois Tigeot struct drm_i915_private *dev_priv = dev->dev_private; 430ba55f2f5SFrançois Tigeot struct intel_dvo *intel_dvo = intel_attached_dvo(connector); 431ba55f2f5SFrançois Tigeot uint32_t dvo_val = I915_READ(intel_dvo->dev.dvo_reg); 432ba55f2f5SFrançois Tigeot struct drm_display_mode *mode = NULL; 433ba55f2f5SFrançois Tigeot 434ba55f2f5SFrançois Tigeot /* If the DVO port is active, that'll be the LVDS, so we can pull out 435ba55f2f5SFrançois Tigeot * its timings to get how the BIOS set up the panel. 436ba55f2f5SFrançois Tigeot */ 437ba55f2f5SFrançois Tigeot if (dvo_val & DVO_ENABLE) { 438ba55f2f5SFrançois Tigeot struct drm_crtc *crtc; 439ba55f2f5SFrançois Tigeot int pipe = (dvo_val & DVO_PIPE_B_SELECT) ? 1 : 0; 440ba55f2f5SFrançois Tigeot 441ba55f2f5SFrançois Tigeot crtc = intel_get_crtc_for_pipe(dev, pipe); 442ba55f2f5SFrançois Tigeot if (crtc) { 443ba55f2f5SFrançois Tigeot mode = intel_crtc_mode_get(dev, crtc); 444ba55f2f5SFrançois Tigeot if (mode) { 445ba55f2f5SFrançois Tigeot mode->type |= DRM_MODE_TYPE_PREFERRED; 446ba55f2f5SFrançois Tigeot if (dvo_val & DVO_HSYNC_ACTIVE_HIGH) 447ba55f2f5SFrançois Tigeot mode->flags |= DRM_MODE_FLAG_PHSYNC; 448ba55f2f5SFrançois Tigeot if (dvo_val & DVO_VSYNC_ACTIVE_HIGH) 449ba55f2f5SFrançois Tigeot mode->flags |= DRM_MODE_FLAG_PVSYNC; 450ba55f2f5SFrançois Tigeot } 451ba55f2f5SFrançois Tigeot } 452ba55f2f5SFrançois Tigeot } 453ba55f2f5SFrançois Tigeot 454ba55f2f5SFrançois Tigeot return mode; 455ba55f2f5SFrançois Tigeot } 456ba55f2f5SFrançois Tigeot 457ba55f2f5SFrançois Tigeot void intel_dvo_init(struct drm_device *dev) 458ba55f2f5SFrançois Tigeot { 459ba55f2f5SFrançois Tigeot struct drm_i915_private *dev_priv = dev->dev_private; 460ba55f2f5SFrançois Tigeot struct intel_encoder *intel_encoder; 461ba55f2f5SFrançois Tigeot struct intel_dvo *intel_dvo; 462ba55f2f5SFrançois Tigeot struct intel_connector *intel_connector; 463ba55f2f5SFrançois Tigeot int i; 464ba55f2f5SFrançois Tigeot int encoder_type = DRM_MODE_ENCODER_NONE; 465ba55f2f5SFrançois Tigeot 466ba55f2f5SFrançois Tigeot intel_dvo = kzalloc(sizeof(*intel_dvo), GFP_KERNEL); 467ba55f2f5SFrançois Tigeot if (!intel_dvo) 468ba55f2f5SFrançois Tigeot return; 469ba55f2f5SFrançois Tigeot 470ba55f2f5SFrançois Tigeot intel_connector = kzalloc(sizeof(*intel_connector), GFP_KERNEL); 471ba55f2f5SFrançois Tigeot if (!intel_connector) { 472ba55f2f5SFrançois Tigeot kfree(intel_dvo); 473ba55f2f5SFrançois Tigeot return; 474ba55f2f5SFrançois Tigeot } 475ba55f2f5SFrançois Tigeot 476ba55f2f5SFrançois Tigeot intel_encoder = &intel_dvo->base; 477ba55f2f5SFrançois Tigeot drm_encoder_init(dev, &intel_encoder->base, 478ba55f2f5SFrançois Tigeot &intel_dvo_enc_funcs, encoder_type); 479ba55f2f5SFrançois Tigeot 480ba55f2f5SFrançois Tigeot intel_encoder->disable = intel_disable_dvo; 481ba55f2f5SFrançois Tigeot intel_encoder->enable = intel_enable_dvo; 482ba55f2f5SFrançois Tigeot intel_encoder->get_hw_state = intel_dvo_get_hw_state; 483ba55f2f5SFrançois Tigeot intel_encoder->get_config = intel_dvo_get_config; 484ba55f2f5SFrançois Tigeot intel_encoder->compute_config = intel_dvo_compute_config; 485ba55f2f5SFrançois Tigeot intel_encoder->pre_enable = intel_dvo_pre_enable; 486ba55f2f5SFrançois Tigeot intel_connector->get_hw_state = intel_dvo_connector_get_hw_state; 487ba55f2f5SFrançois Tigeot intel_connector->unregister = intel_connector_unregister; 488ba55f2f5SFrançois Tigeot 489ba55f2f5SFrançois Tigeot /* Now, try to find a controller */ 490ba55f2f5SFrançois Tigeot for (i = 0; i < ARRAY_SIZE(intel_dvo_devices); i++) { 491ba55f2f5SFrançois Tigeot struct drm_connector *connector = &intel_connector->base; 492ba55f2f5SFrançois Tigeot const struct intel_dvo_device *dvo = &intel_dvo_devices[i]; 493ba55f2f5SFrançois Tigeot struct device *i2c; 494ba55f2f5SFrançois Tigeot int gpio; 495ba55f2f5SFrançois Tigeot bool dvoinit; 496ba55f2f5SFrançois Tigeot 497ba55f2f5SFrançois Tigeot /* Allow the I2C driver info to specify the GPIO to be used in 498ba55f2f5SFrançois Tigeot * special cases, but otherwise default to what's defined 499ba55f2f5SFrançois Tigeot * in the spec. 500ba55f2f5SFrançois Tigeot */ 501ba55f2f5SFrançois Tigeot if (intel_gmbus_is_port_valid(dvo->gpio)) 502ba55f2f5SFrançois Tigeot gpio = dvo->gpio; 503ba55f2f5SFrançois Tigeot else if (dvo->type == INTEL_DVO_CHIP_LVDS) 504ba55f2f5SFrançois Tigeot gpio = GMBUS_PORT_SSC; 505ba55f2f5SFrançois Tigeot else 506ba55f2f5SFrançois Tigeot gpio = GMBUS_PORT_DPB; 507ba55f2f5SFrançois Tigeot 508ba55f2f5SFrançois Tigeot /* Set up the I2C bus necessary for the chip we're probing. 509ba55f2f5SFrançois Tigeot * It appears that everything is on GPIOE except for panels 510ba55f2f5SFrançois Tigeot * on i830 laptops, which are on GPIOB (DVOA). 511ba55f2f5SFrançois Tigeot */ 512ba55f2f5SFrançois Tigeot i2c = intel_gmbus_get_adapter(dev_priv, gpio); 513ba55f2f5SFrançois Tigeot 514ba55f2f5SFrançois Tigeot intel_dvo->dev = *dvo; 515ba55f2f5SFrançois Tigeot 516ba55f2f5SFrançois Tigeot /* GMBUS NAK handling seems to be unstable, hence let the 517ba55f2f5SFrançois Tigeot * transmitter detection run in bit banging mode for now. 518ba55f2f5SFrançois Tigeot */ 519ba55f2f5SFrançois Tigeot intel_gmbus_force_bit(i2c, true); 520ba55f2f5SFrançois Tigeot 521ba55f2f5SFrançois Tigeot dvoinit = dvo->dev_ops->init(&intel_dvo->dev, i2c); 522ba55f2f5SFrançois Tigeot 523ba55f2f5SFrançois Tigeot intel_gmbus_force_bit(i2c, false); 524ba55f2f5SFrançois Tigeot 525ba55f2f5SFrançois Tigeot if (!dvoinit) 526ba55f2f5SFrançois Tigeot continue; 527ba55f2f5SFrançois Tigeot 528ba55f2f5SFrançois Tigeot intel_encoder->type = INTEL_OUTPUT_DVO; 529ba55f2f5SFrançois Tigeot intel_encoder->crtc_mask = (1 << 0) | (1 << 1); 530ba55f2f5SFrançois Tigeot switch (dvo->type) { 531ba55f2f5SFrançois Tigeot case INTEL_DVO_CHIP_TMDS: 532ba55f2f5SFrançois Tigeot intel_encoder->cloneable = (1 << INTEL_OUTPUT_ANALOG) | 533ba55f2f5SFrançois Tigeot (1 << INTEL_OUTPUT_DVO); 534ba55f2f5SFrançois Tigeot drm_connector_init(dev, connector, 535ba55f2f5SFrançois Tigeot &intel_dvo_connector_funcs, 536ba55f2f5SFrançois Tigeot DRM_MODE_CONNECTOR_DVII); 537ba55f2f5SFrançois Tigeot encoder_type = DRM_MODE_ENCODER_TMDS; 538ba55f2f5SFrançois Tigeot break; 539ba55f2f5SFrançois Tigeot case INTEL_DVO_CHIP_LVDS: 540ba55f2f5SFrançois Tigeot intel_encoder->cloneable = 0; 541ba55f2f5SFrançois Tigeot drm_connector_init(dev, connector, 542ba55f2f5SFrançois Tigeot &intel_dvo_connector_funcs, 543ba55f2f5SFrançois Tigeot DRM_MODE_CONNECTOR_LVDS); 544ba55f2f5SFrançois Tigeot encoder_type = DRM_MODE_ENCODER_LVDS; 545ba55f2f5SFrançois Tigeot break; 546ba55f2f5SFrançois Tigeot } 547ba55f2f5SFrançois Tigeot 548ba55f2f5SFrançois Tigeot drm_connector_helper_add(connector, 549ba55f2f5SFrançois Tigeot &intel_dvo_connector_helper_funcs); 550ba55f2f5SFrançois Tigeot connector->display_info.subpixel_order = SubPixelHorizontalRGB; 551ba55f2f5SFrançois Tigeot connector->interlace_allowed = false; 552ba55f2f5SFrançois Tigeot connector->doublescan_allowed = false; 553ba55f2f5SFrançois Tigeot 554ba55f2f5SFrançois Tigeot intel_connector_attach_encoder(intel_connector, intel_encoder); 555ba55f2f5SFrançois Tigeot if (dvo->type == INTEL_DVO_CHIP_LVDS) { 556ba55f2f5SFrançois Tigeot /* For our LVDS chipsets, we should hopefully be able 557ba55f2f5SFrançois Tigeot * to dig the fixed panel mode out of the BIOS data. 558ba55f2f5SFrançois Tigeot * However, it's in a different format from the BIOS 559ba55f2f5SFrançois Tigeot * data on chipsets with integrated LVDS (stored in AIM 560ba55f2f5SFrançois Tigeot * headers, likely), so for now, just get the current 561ba55f2f5SFrançois Tigeot * mode being output through DVO. 562ba55f2f5SFrançois Tigeot */ 563ba55f2f5SFrançois Tigeot intel_dvo->panel_fixed_mode = 564ba55f2f5SFrançois Tigeot intel_dvo_get_current_mode(connector); 565ba55f2f5SFrançois Tigeot intel_dvo->panel_wants_dither = true; 566ba55f2f5SFrançois Tigeot } 567ba55f2f5SFrançois Tigeot 568c6f73aabSFrançois Tigeot drm_connector_register(connector); 569ba55f2f5SFrançois Tigeot return; 570ba55f2f5SFrançois Tigeot } 571ba55f2f5SFrançois Tigeot 572ba55f2f5SFrançois Tigeot drm_encoder_cleanup(&intel_encoder->base); 573ba55f2f5SFrançois Tigeot kfree(intel_dvo); 574ba55f2f5SFrançois Tigeot kfree(intel_connector); 575ba55f2f5SFrançois Tigeot } 576