xref: /dflybsd-src/sys/dev/drm/i915/intel_dsi.h (revision 9edbd4a07c3138f5c4f076f77de5d722fcc606cc)
1*9edbd4a0SFrançois Tigeot /*
2*9edbd4a0SFrançois Tigeot  * Copyright © 2013 Intel Corporation
3*9edbd4a0SFrançois Tigeot  *
4*9edbd4a0SFrançois Tigeot  * Permission is hereby granted, free of charge, to any person obtaining a
5*9edbd4a0SFrançois Tigeot  * copy of this software and associated documentation files (the "Software"),
6*9edbd4a0SFrançois Tigeot  * to deal in the Software without restriction, including without limitation
7*9edbd4a0SFrançois Tigeot  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8*9edbd4a0SFrançois Tigeot  * and/or sell copies of the Software, and to permit persons to whom the
9*9edbd4a0SFrançois Tigeot  * Software is furnished to do so, subject to the following conditions:
10*9edbd4a0SFrançois Tigeot  *
11*9edbd4a0SFrançois Tigeot  * The above copyright notice and this permission notice (including the next
12*9edbd4a0SFrançois Tigeot  * paragraph) shall be included in all copies or substantial portions of the
13*9edbd4a0SFrançois Tigeot  * Software.
14*9edbd4a0SFrançois Tigeot  *
15*9edbd4a0SFrançois Tigeot  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16*9edbd4a0SFrançois Tigeot  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17*9edbd4a0SFrançois Tigeot  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
18*9edbd4a0SFrançois Tigeot  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19*9edbd4a0SFrançois Tigeot  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20*9edbd4a0SFrançois Tigeot  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21*9edbd4a0SFrançois Tigeot  * DEALINGS IN THE SOFTWARE.
22*9edbd4a0SFrançois Tigeot  */
23*9edbd4a0SFrançois Tigeot 
24*9edbd4a0SFrançois Tigeot #ifndef _INTEL_DSI_H
25*9edbd4a0SFrançois Tigeot #define _INTEL_DSI_H
26*9edbd4a0SFrançois Tigeot 
27*9edbd4a0SFrançois Tigeot #include <drm/drmP.h>
28*9edbd4a0SFrançois Tigeot #include <drm/drm_crtc.h>
29*9edbd4a0SFrançois Tigeot #include "intel_drv.h"
30*9edbd4a0SFrançois Tigeot 
31*9edbd4a0SFrançois Tigeot struct intel_dsi_device {
32*9edbd4a0SFrançois Tigeot 	unsigned int panel_id;
33*9edbd4a0SFrançois Tigeot 	const char *name;
34*9edbd4a0SFrançois Tigeot 	int type;
35*9edbd4a0SFrançois Tigeot 	const struct intel_dsi_dev_ops *dev_ops;
36*9edbd4a0SFrançois Tigeot 	void *dev_priv;
37*9edbd4a0SFrançois Tigeot };
38*9edbd4a0SFrançois Tigeot 
39*9edbd4a0SFrançois Tigeot struct intel_dsi_dev_ops {
40*9edbd4a0SFrançois Tigeot 	bool (*init)(struct intel_dsi_device *dsi);
41*9edbd4a0SFrançois Tigeot 
42*9edbd4a0SFrançois Tigeot 	void (*panel_reset)(struct intel_dsi_device *dsi);
43*9edbd4a0SFrançois Tigeot 
44*9edbd4a0SFrançois Tigeot 	void (*disable_panel_power)(struct intel_dsi_device *dsi);
45*9edbd4a0SFrançois Tigeot 
46*9edbd4a0SFrançois Tigeot 	/* one time programmable commands if needed */
47*9edbd4a0SFrançois Tigeot 	void (*send_otp_cmds)(struct intel_dsi_device *dsi);
48*9edbd4a0SFrançois Tigeot 
49*9edbd4a0SFrançois Tigeot 	/* This callback must be able to assume DSI commands can be sent */
50*9edbd4a0SFrançois Tigeot 	void (*enable)(struct intel_dsi_device *dsi);
51*9edbd4a0SFrançois Tigeot 
52*9edbd4a0SFrançois Tigeot 	/* This callback must be able to assume DSI commands can be sent */
53*9edbd4a0SFrançois Tigeot 	void (*disable)(struct intel_dsi_device *dsi);
54*9edbd4a0SFrançois Tigeot 
55*9edbd4a0SFrançois Tigeot 	int (*mode_valid)(struct intel_dsi_device *dsi,
56*9edbd4a0SFrançois Tigeot 			  struct drm_display_mode *mode);
57*9edbd4a0SFrançois Tigeot 
58*9edbd4a0SFrançois Tigeot 	bool (*mode_fixup)(struct intel_dsi_device *dsi,
59*9edbd4a0SFrançois Tigeot 			   const struct drm_display_mode *mode,
60*9edbd4a0SFrançois Tigeot 			   struct drm_display_mode *adjusted_mode);
61*9edbd4a0SFrançois Tigeot 
62*9edbd4a0SFrançois Tigeot 	void (*mode_set)(struct intel_dsi_device *dsi,
63*9edbd4a0SFrançois Tigeot 			 struct drm_display_mode *mode,
64*9edbd4a0SFrançois Tigeot 			 struct drm_display_mode *adjusted_mode);
65*9edbd4a0SFrançois Tigeot 
66*9edbd4a0SFrançois Tigeot 	enum drm_connector_status (*detect)(struct intel_dsi_device *dsi);
67*9edbd4a0SFrançois Tigeot 
68*9edbd4a0SFrançois Tigeot 	bool (*get_hw_state)(struct intel_dsi_device *dev);
69*9edbd4a0SFrançois Tigeot 
70*9edbd4a0SFrançois Tigeot 	struct drm_display_mode *(*get_modes)(struct intel_dsi_device *dsi);
71*9edbd4a0SFrançois Tigeot 
72*9edbd4a0SFrançois Tigeot 	void (*destroy) (struct intel_dsi_device *dsi);
73*9edbd4a0SFrançois Tigeot };
74*9edbd4a0SFrançois Tigeot 
75*9edbd4a0SFrançois Tigeot struct intel_dsi {
76*9edbd4a0SFrançois Tigeot 	struct intel_encoder base;
77*9edbd4a0SFrançois Tigeot 
78*9edbd4a0SFrançois Tigeot 	struct intel_dsi_device dev;
79*9edbd4a0SFrançois Tigeot 
80*9edbd4a0SFrançois Tigeot 	struct intel_connector *attached_connector;
81*9edbd4a0SFrançois Tigeot 
82*9edbd4a0SFrançois Tigeot 	/* if true, use HS mode, otherwise LP */
83*9edbd4a0SFrançois Tigeot 	bool hs;
84*9edbd4a0SFrançois Tigeot 
85*9edbd4a0SFrançois Tigeot 	/* virtual channel */
86*9edbd4a0SFrançois Tigeot 	int channel;
87*9edbd4a0SFrançois Tigeot 
88*9edbd4a0SFrançois Tigeot 	/* number of DSI lanes */
89*9edbd4a0SFrançois Tigeot 	unsigned int lane_count;
90*9edbd4a0SFrançois Tigeot 
91*9edbd4a0SFrançois Tigeot 	/* video mode pixel format for MIPI_DSI_FUNC_PRG register */
92*9edbd4a0SFrançois Tigeot 	u32 pixel_format;
93*9edbd4a0SFrançois Tigeot 
94*9edbd4a0SFrançois Tigeot 	/* video mode format for MIPI_VIDEO_MODE_FORMAT register */
95*9edbd4a0SFrançois Tigeot 	u32 video_mode_format;
96*9edbd4a0SFrançois Tigeot 
97*9edbd4a0SFrançois Tigeot 	/* eot for MIPI_EOT_DISABLE register */
98*9edbd4a0SFrançois Tigeot 	u32 eot_disable;
99*9edbd4a0SFrançois Tigeot 
100*9edbd4a0SFrançois Tigeot 	u32 port_bits;
101*9edbd4a0SFrançois Tigeot 	u32 bw_timer;
102*9edbd4a0SFrançois Tigeot 	u32 dphy_reg;
103*9edbd4a0SFrançois Tigeot 	u32 video_frmt_cfg_bits;
104*9edbd4a0SFrançois Tigeot 	u16 lp_byte_clk;
105*9edbd4a0SFrançois Tigeot 
106*9edbd4a0SFrançois Tigeot 	/* timeouts in byte clocks */
107*9edbd4a0SFrançois Tigeot 	u16 lp_rx_timeout;
108*9edbd4a0SFrançois Tigeot 	u16 turn_arnd_val;
109*9edbd4a0SFrançois Tigeot 	u16 rst_timer_val;
110*9edbd4a0SFrançois Tigeot 	u16 hs_to_lp_count;
111*9edbd4a0SFrançois Tigeot 	u16 clk_lp_to_hs_count;
112*9edbd4a0SFrançois Tigeot 	u16 clk_hs_to_lp_count;
113*9edbd4a0SFrançois Tigeot };
114*9edbd4a0SFrançois Tigeot 
115*9edbd4a0SFrançois Tigeot static inline struct intel_dsi *enc_to_intel_dsi(struct drm_encoder *encoder)
116*9edbd4a0SFrançois Tigeot {
117*9edbd4a0SFrançois Tigeot 	return container_of(encoder, struct intel_dsi, base.base);
118*9edbd4a0SFrançois Tigeot }
119*9edbd4a0SFrançois Tigeot 
120*9edbd4a0SFrançois Tigeot extern void vlv_enable_dsi_pll(struct intel_encoder *encoder);
121*9edbd4a0SFrançois Tigeot extern void vlv_disable_dsi_pll(struct intel_encoder *encoder);
122*9edbd4a0SFrançois Tigeot 
123*9edbd4a0SFrançois Tigeot #endif /* _INTEL_DSI_H */
124