1 /* 2 * Copyright (c) 2006 Dave Airlie <airlied@linux.ie> 3 * Copyright (c) 2007-2008 Intel Corporation 4 * Jesse Barnes <jesse.barnes@intel.com> 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a 7 * copy of this software and associated documentation files (the "Software"), 8 * to deal in the Software without restriction, including without limitation 9 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 10 * and/or sell copies of the Software, and to permit persons to whom the 11 * Software is furnished to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice (including the next 14 * paragraph) shall be included in all copies or substantial portions of the 15 * Software. 16 * 17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 22 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS 23 * IN THE SOFTWARE. 24 * 25 * $FreeBSD: src/sys/dev/drm2/i915/intel_drv.h,v 1.1 2012/05/22 11:07:44 kib Exp $ 26 */ 27 28 #ifndef DRM_INTEL_DRV_H 29 #define DRM_INTEL_DRV_H 30 31 #include <drm/i915_drm.h> 32 #include "i915_drv.h" 33 #include <drm/drm_crtc.h> 34 #include <drm/drm_crtc_helper.h> 35 #include <drm/drm_fb_helper.h> 36 #include <drm/drm_dp_helper.h> 37 38 #define _intel_wait_for(DEV, COND, MS, W, WMSG) \ 39 ({ \ 40 int end, ret; \ 41 \ 42 end = ticks + (MS) * hz / 1000; \ 43 ret = 0; \ 44 \ 45 while (!(COND)) { \ 46 if (time_after(ticks, end)) { \ 47 ret = -ETIMEDOUT; \ 48 break; \ 49 } \ 50 DELAY(1000); \ 51 } \ 52 \ 53 ret; \ 54 }) 55 56 #define KHz(x) (1000*x) 57 #define MHz(x) KHz(1000*x) 58 59 /* store information about an Ixxx DVO */ 60 /* The i830->i865 use multiple DVOs with multiple i2cs */ 61 /* the i915, i945 have a single sDVO i2c bus - which is different */ 62 #define MAX_OUTPUTS 6 63 /* maximum connectors per crtcs in the mode set */ 64 #define INTELFB_CONN_LIMIT 4 65 66 #define INTEL_I2C_BUS_DVO 1 67 #define INTEL_I2C_BUS_SDVO 2 68 69 /* these are outputs from the chip - integrated only 70 external chips are via DVO or SDVO output */ 71 #define INTEL_OUTPUT_UNUSED 0 72 #define INTEL_OUTPUT_ANALOG 1 73 #define INTEL_OUTPUT_DVO 2 74 #define INTEL_OUTPUT_SDVO 3 75 #define INTEL_OUTPUT_LVDS 4 76 #define INTEL_OUTPUT_TVOUT 5 77 #define INTEL_OUTPUT_HDMI 6 78 #define INTEL_OUTPUT_DISPLAYPORT 7 79 #define INTEL_OUTPUT_EDP 8 80 81 /* Intel Pipe Clone Bit */ 82 #define INTEL_HDMIB_CLONE_BIT 1 83 #define INTEL_HDMIC_CLONE_BIT 2 84 #define INTEL_HDMID_CLONE_BIT 3 85 #define INTEL_HDMIE_CLONE_BIT 4 86 #define INTEL_HDMIF_CLONE_BIT 5 87 #define INTEL_SDVO_NON_TV_CLONE_BIT 6 88 #define INTEL_SDVO_TV_CLONE_BIT 7 89 #define INTEL_SDVO_LVDS_CLONE_BIT 8 90 #define INTEL_ANALOG_CLONE_BIT 9 91 #define INTEL_TV_CLONE_BIT 10 92 #define INTEL_DP_B_CLONE_BIT 11 93 #define INTEL_DP_C_CLONE_BIT 12 94 #define INTEL_DP_D_CLONE_BIT 13 95 #define INTEL_LVDS_CLONE_BIT 14 96 #define INTEL_DVO_TMDS_CLONE_BIT 15 97 #define INTEL_DVO_LVDS_CLONE_BIT 16 98 #define INTEL_EDP_CLONE_BIT 17 99 100 #define INTEL_DVO_CHIP_NONE 0 101 #define INTEL_DVO_CHIP_LVDS 1 102 #define INTEL_DVO_CHIP_TMDS 2 103 #define INTEL_DVO_CHIP_TVOUT 4 104 105 /* drm_display_mode->private_flags */ 106 #define INTEL_MODE_PIXEL_MULTIPLIER_SHIFT (0x0) 107 #define INTEL_MODE_PIXEL_MULTIPLIER_MASK (0xf << INTEL_MODE_PIXEL_MULTIPLIER_SHIFT) 108 #define INTEL_MODE_DP_FORCE_6BPC (0x10) 109 /* This flag must be set by the encoder's mode_fixup if it changes the crtc 110 * timings in the mode to prevent the crtc fixup from overwriting them. 111 * Currently only lvds needs that. */ 112 #define INTEL_MODE_CRTC_TIMINGS_SET (0x20) 113 114 static inline void 115 intel_mode_set_pixel_multiplier(struct drm_display_mode *mode, 116 int multiplier) 117 { 118 mode->clock *= multiplier; 119 mode->private_flags |= multiplier; 120 } 121 122 static inline int 123 intel_mode_get_pixel_multiplier(const struct drm_display_mode *mode) 124 { 125 return (mode->private_flags & INTEL_MODE_PIXEL_MULTIPLIER_MASK) >> INTEL_MODE_PIXEL_MULTIPLIER_SHIFT; 126 } 127 128 struct intel_framebuffer { 129 struct drm_framebuffer base; 130 struct drm_i915_gem_object *obj; 131 }; 132 133 struct intel_fbdev { 134 struct drm_fb_helper helper; 135 struct intel_framebuffer ifb; 136 struct list_head fbdev_list; 137 struct drm_display_mode *our_mode; 138 }; 139 140 struct intel_encoder { 141 struct drm_encoder base; 142 int type; 143 bool needs_tv_clock; 144 void (*hot_plug)(struct intel_encoder *); 145 int crtc_mask; 146 int clone_mask; 147 }; 148 149 struct intel_connector { 150 struct drm_connector base; 151 struct intel_encoder *encoder; 152 }; 153 154 struct intel_crtc { 155 struct drm_crtc base; 156 enum i915_pipe pipe; 157 enum plane plane; 158 u8 lut_r[256], lut_g[256], lut_b[256]; 159 int dpms_mode; 160 bool active; /* is the crtc on? independent of the dpms mode */ 161 bool busy; /* is scanout buffer being updated frequently? */ 162 struct callout idle_callout; 163 bool lowfreq_avail; 164 struct intel_overlay *overlay; 165 struct intel_unpin_work *unpin_work; 166 int fdi_lanes; 167 168 struct drm_i915_gem_object *cursor_bo; 169 uint32_t cursor_addr; 170 int16_t cursor_x, cursor_y; 171 int16_t cursor_width, cursor_height; 172 bool cursor_visible; 173 unsigned int bpp; 174 175 bool no_pll; /* tertiary pipe for IVB */ 176 bool use_pll_a; 177 }; 178 179 struct intel_plane { 180 struct drm_plane base; 181 enum i915_pipe pipe; 182 struct drm_i915_gem_object *obj; 183 bool primary_disabled; 184 int max_downscale; 185 u32 lut_r[1024], lut_g[1024], lut_b[1024]; 186 void (*update_plane)(struct drm_plane *plane, 187 struct drm_framebuffer *fb, 188 struct drm_i915_gem_object *obj, 189 int crtc_x, int crtc_y, 190 unsigned int crtc_w, unsigned int crtc_h, 191 uint32_t x, uint32_t y, 192 uint32_t src_w, uint32_t src_h); 193 void (*disable_plane)(struct drm_plane *plane); 194 int (*update_colorkey)(struct drm_plane *plane, 195 struct drm_intel_sprite_colorkey *key); 196 void (*get_colorkey)(struct drm_plane *plane, 197 struct drm_intel_sprite_colorkey *key); 198 }; 199 200 struct intel_watermark_params { 201 unsigned long fifo_size; 202 unsigned long max_wm; 203 unsigned long default_wm; 204 unsigned long guard_size; 205 unsigned long cacheline_size; 206 }; 207 208 #define to_intel_crtc(x) container_of(x, struct intel_crtc, base) 209 #define to_intel_connector(x) container_of(x, struct intel_connector, base) 210 #define to_intel_encoder(x) container_of(x, struct intel_encoder, base) 211 #define to_intel_framebuffer(x) container_of(x, struct intel_framebuffer, base) 212 #define to_intel_plane(x) container_of(x, struct intel_plane, base) 213 214 #define DIP_HEADER_SIZE 5 215 216 #define DIP_TYPE_AVI 0x82 217 #define DIP_VERSION_AVI 0x2 218 #define DIP_LEN_AVI 13 219 220 #define DIP_TYPE_SPD 0x83 221 #define DIP_VERSION_SPD 0x1 222 #define DIP_LEN_SPD 25 223 #define DIP_SPD_UNKNOWN 0 224 #define DIP_SPD_DSTB 0x1 225 #define DIP_SPD_DVDP 0x2 226 #define DIP_SPD_DVHS 0x3 227 #define DIP_SPD_HDDVR 0x4 228 #define DIP_SPD_DVC 0x5 229 #define DIP_SPD_DSC 0x6 230 #define DIP_SPD_VCD 0x7 231 #define DIP_SPD_GAME 0x8 232 #define DIP_SPD_PC 0x9 233 #define DIP_SPD_BD 0xa 234 #define DIP_SPD_SCD 0xb 235 236 struct dip_infoframe { 237 uint8_t type; /* HB0 */ 238 uint8_t ver; /* HB1 */ 239 uint8_t len; /* HB2 - body len, not including checksum */ 240 uint8_t ecc; /* Header ECC */ 241 uint8_t checksum; /* PB0 */ 242 union { 243 struct { 244 /* PB1 - Y 6:5, A 4:4, B 3:2, S 1:0 */ 245 uint8_t Y_A_B_S; 246 /* PB2 - C 7:6, M 5:4, R 3:0 */ 247 uint8_t C_M_R; 248 /* PB3 - ITC 7:7, EC 6:4, Q 3:2, SC 1:0 */ 249 uint8_t ITC_EC_Q_SC; 250 /* PB4 - VIC 6:0 */ 251 uint8_t VIC; 252 /* PB5 - PR 3:0 */ 253 uint8_t PR; 254 /* PB6 to PB13 */ 255 uint16_t top_bar_end; 256 uint16_t bottom_bar_start; 257 uint16_t left_bar_end; 258 uint16_t right_bar_start; 259 } avi; 260 struct { 261 uint8_t vn[8]; 262 uint8_t pd[16]; 263 uint8_t sdi; 264 } spd; 265 uint8_t payload[27]; 266 } __attribute__ ((packed)) body; 267 } __attribute__((packed)); 268 269 static inline struct drm_crtc * 270 intel_get_crtc_for_pipe(struct drm_device *dev, int pipe) 271 { 272 struct drm_i915_private *dev_priv = dev->dev_private; 273 return dev_priv->pipe_to_crtc_mapping[pipe]; 274 } 275 276 static inline struct drm_crtc * 277 intel_get_crtc_for_plane(struct drm_device *dev, int plane) 278 { 279 struct drm_i915_private *dev_priv = dev->dev_private; 280 return dev_priv->plane_to_crtc_mapping[plane]; 281 } 282 283 struct intel_unpin_work { 284 struct task task; 285 struct drm_device *dev; 286 struct drm_i915_gem_object *old_fb_obj; 287 struct drm_i915_gem_object *pending_flip_obj; 288 struct drm_pending_vblank_event *event; 289 int pending; 290 bool enable_stall_check; 291 }; 292 293 struct intel_fbc_work { 294 struct timeout_task task; 295 struct drm_crtc *crtc; 296 struct drm_framebuffer *fb; 297 int interval; 298 }; 299 300 int intel_ddc_get_modes(struct drm_connector *c, device_t adapter); 301 extern bool intel_ddc_probe(struct intel_encoder *intel_encoder, int ddc_bus); 302 303 extern void intel_attach_force_audio_property(struct drm_connector *connector); 304 extern void intel_attach_broadcast_rgb_property(struct drm_connector *connector); 305 306 extern void intel_crt_init(struct drm_device *dev); 307 extern void intel_hdmi_init(struct drm_device *dev, int sdvox_reg); 308 void intel_dip_infoframe_csum(struct dip_infoframe *avi_if); 309 extern bool intel_sdvo_init(struct drm_device *dev, int output_device); 310 extern void intel_dvo_init(struct drm_device *dev); 311 extern void intel_tv_init(struct drm_device *dev); 312 extern void intel_mark_busy(struct drm_device *dev, 313 struct drm_i915_gem_object *obj); 314 extern bool intel_lvds_init(struct drm_device *dev); 315 extern void intel_dp_init(struct drm_device *dev, int dp_reg); 316 void 317 intel_dp_set_m_n(struct drm_crtc *crtc, struct drm_display_mode *mode, 318 struct drm_display_mode *adjusted_mode); 319 extern bool intel_dpd_is_edp(struct drm_device *dev); 320 extern void intel_edp_link_config(struct intel_encoder *, int *, int *); 321 extern bool intel_encoder_is_pch_edp(struct drm_encoder *encoder); 322 extern int intel_plane_init(struct drm_device *dev, enum i915_pipe pipe); 323 extern void intel_flush_display_plane(struct drm_i915_private *dev_priv, 324 enum plane plane); 325 326 /* intel_panel.c */ 327 extern void intel_fixed_panel_mode(struct drm_display_mode *fixed_mode, 328 struct drm_display_mode *adjusted_mode); 329 extern void intel_pch_panel_fitting(struct drm_device *dev, 330 int fitting_mode, 331 const struct drm_display_mode *mode, 332 struct drm_display_mode *adjusted_mode); 333 extern u32 intel_panel_get_max_backlight(struct drm_device *dev); 334 extern u32 intel_panel_get_backlight(struct drm_device *dev); 335 extern void intel_panel_set_backlight(struct drm_device *dev, u32 level); 336 extern int intel_panel_setup_backlight(struct drm_device *dev); 337 extern void intel_panel_enable_backlight(struct drm_device *dev); 338 extern void intel_panel_disable_backlight(struct drm_device *dev); 339 extern void intel_panel_destroy_backlight(struct drm_device *dev); 340 extern enum drm_connector_status intel_panel_detect(struct drm_device *dev); 341 342 extern void intel_crtc_load_lut(struct drm_crtc *crtc); 343 extern void intel_encoder_prepare(struct drm_encoder *encoder); 344 extern void intel_encoder_commit(struct drm_encoder *encoder); 345 extern void intel_encoder_destroy(struct drm_encoder *encoder); 346 347 static inline struct intel_encoder *intel_attached_encoder(struct drm_connector *connector) 348 { 349 return to_intel_connector(connector)->encoder; 350 } 351 352 extern void intel_connector_attach_encoder(struct intel_connector *connector, 353 struct intel_encoder *encoder); 354 extern struct drm_encoder *intel_best_encoder(struct drm_connector *connector); 355 356 extern struct drm_display_mode *intel_crtc_mode_get(struct drm_device *dev, 357 struct drm_crtc *crtc); 358 int intel_get_pipe_from_crtc_id(struct drm_device *dev, void *data, 359 struct drm_file *file_priv); 360 extern void intel_wait_for_vblank(struct drm_device *dev, int pipe); 361 extern void intel_wait_for_pipe_off(struct drm_device *dev, int pipe); 362 363 struct intel_load_detect_pipe { 364 struct drm_framebuffer *release_fb; 365 bool load_detect_temp; 366 int dpms_mode; 367 }; 368 extern bool intel_get_load_detect_pipe(struct intel_encoder *intel_encoder, 369 struct drm_connector *connector, 370 struct drm_display_mode *mode, 371 struct intel_load_detect_pipe *old); 372 extern void intel_release_load_detect_pipe(struct intel_encoder *intel_encoder, 373 struct drm_connector *connector, 374 struct intel_load_detect_pipe *old); 375 376 extern void intel_crtc_fb_gamma_set(struct drm_crtc *crtc, u16 red, u16 green, 377 u16 blue, int regno); 378 extern void intel_crtc_fb_gamma_get(struct drm_crtc *crtc, u16 *red, u16 *green, 379 u16 *blue, int regno); 380 extern void intel_enable_clock_gating(struct drm_device *dev); 381 extern void ironlake_disable_rc6(struct drm_device *dev); 382 extern void ironlake_enable_drps(struct drm_device *dev); 383 extern void ironlake_disable_drps(struct drm_device *dev); 384 extern void gen6_enable_rps(struct drm_i915_private *dev_priv); 385 extern void gen6_update_ring_freq(struct drm_i915_private *dev_priv); 386 extern void gen6_disable_rps(struct drm_device *dev); 387 extern void intel_init_emon(struct drm_device *dev); 388 389 extern int intel_pin_and_fence_fb_obj(struct drm_device *dev, 390 struct drm_i915_gem_object *obj, 391 struct intel_ring_buffer *pipelined); 392 extern void intel_unpin_fb_obj(struct drm_i915_gem_object *obj); 393 394 extern int intel_framebuffer_init(struct drm_device *dev, 395 struct intel_framebuffer *ifb, 396 struct drm_mode_fb_cmd2 *mode_cmd, 397 struct drm_i915_gem_object *obj); 398 extern int intel_fbdev_init(struct drm_device *dev); 399 extern void intel_fbdev_fini(struct drm_device *dev); 400 401 extern void intel_prepare_page_flip(struct drm_device *dev, int plane); 402 extern void intel_finish_page_flip(struct drm_device *dev, int pipe); 403 extern void intel_finish_page_flip_plane(struct drm_device *dev, int plane); 404 405 extern void intel_setup_overlay(struct drm_device *dev); 406 extern void intel_cleanup_overlay(struct drm_device *dev); 407 extern int intel_overlay_switch_off(struct intel_overlay *overlay); 408 extern int intel_overlay_put_image(struct drm_device *dev, void *data, 409 struct drm_file *file_priv); 410 extern int intel_overlay_attrs(struct drm_device *dev, void *data, 411 struct drm_file *file_priv); 412 413 extern void intel_fb_output_poll_changed(struct drm_device *dev); 414 extern void intel_fb_restore_mode(struct drm_device *dev); 415 416 extern void assert_pipe(struct drm_i915_private *dev_priv, enum i915_pipe pipe, 417 bool state); 418 #define assert_pipe_enabled(d, p) assert_pipe(d, p, true) 419 #define assert_pipe_disabled(d, p) assert_pipe(d, p, false) 420 421 extern void intel_init_clock_gating(struct drm_device *dev); 422 extern void intel_write_eld(struct drm_encoder *encoder, 423 struct drm_display_mode *mode); 424 extern void intel_cpt_verify_modeset(struct drm_device *dev, int pipe); 425 426 /* For use by IVB LP watermark workaround in intel_sprite.c */ 427 extern void intel_update_watermarks(struct drm_device *dev); 428 extern void intel_update_sprite_watermarks(struct drm_device *dev, int pipe, 429 uint32_t sprite_width, 430 int pixel_size); 431 extern int intel_sprite_set_colorkey(struct drm_device *dev, void *data, 432 struct drm_file *file_priv); 433 extern int intel_sprite_get_colorkey(struct drm_device *dev, void *data, 434 struct drm_file *file_priv); 435 436 /* Power-related functions, located in intel_pm.c */ 437 /* FBC */ 438 extern void i8xx_disable_fbc(struct drm_device *dev); 439 extern void i8xx_enable_fbc(struct drm_crtc *crtc, unsigned long interval); 440 extern bool i8xx_fbc_enabled(struct drm_device *dev); 441 extern void g4x_enable_fbc(struct drm_crtc *crtc, unsigned long interval); 442 extern void g4x_disable_fbc(struct drm_device *dev); 443 extern bool g4x_fbc_enabled(struct drm_device *dev); 444 extern void ironlake_enable_fbc(struct drm_crtc *crtc, unsigned long interval); 445 extern void ironlake_disable_fbc(struct drm_device *dev); 446 extern bool ironlake_fbc_enabled(struct drm_device *dev); 447 extern bool intel_fbc_enabled(struct drm_device *dev); 448 extern void intel_enable_fbc(struct drm_crtc *crtc, unsigned long interval); 449 extern void intel_update_fbc(struct drm_device *dev); 450 451 /* Watermarks */ 452 extern void pineview_update_wm(struct drm_device *dev); 453 extern void valleyview_update_wm(struct drm_device *dev); 454 extern void g4x_update_wm(struct drm_device *dev); 455 extern void i965_update_wm(struct drm_device *dev); 456 extern void i9xx_update_wm(struct drm_device *dev); 457 extern void i830_update_wm(struct drm_device *dev); 458 extern void ironlake_update_wm(struct drm_device *dev); 459 extern void sandybridge_update_wm(struct drm_device *dev); 460 extern void sandybridge_update_sprite_wm(struct drm_device *dev, int pipe, 461 uint32_t sprite_width, int pixel_size); 462 extern const struct cxsr_latency *intel_get_cxsr_latency(int is_desktop, 463 int is_ddr3, 464 int fsb, 465 int mem); 466 extern void pineview_disable_cxsr(struct drm_device *dev); 467 extern int i9xx_get_fifo_size(struct drm_device *dev, int plane); 468 extern int i85x_get_fifo_size(struct drm_device *dev, int plane); 469 extern int i845_get_fifo_size(struct drm_device *dev, int plane); 470 extern int i830_get_fifo_size(struct drm_device *dev, int plane); 471 472 /* Clock gating */ 473 extern void ironlake_init_clock_gating(struct drm_device *dev); 474 extern void gen6_init_clock_gating(struct drm_device *dev); 475 extern void ivybridge_init_clock_gating(struct drm_device *dev); 476 extern void valleyview_init_clock_gating(struct drm_device *dev); 477 extern void g4x_init_clock_gating(struct drm_device *dev); 478 extern void crestline_init_clock_gating(struct drm_device *dev); 479 extern void broadwater_init_clock_gating(struct drm_device *dev); 480 extern void gen3_init_clock_gating(struct drm_device *dev); 481 extern void i85x_init_clock_gating(struct drm_device *dev); 482 extern void i830_init_clock_gating(struct drm_device *dev); 483 extern void ibx_init_clock_gating(struct drm_device *dev); 484 extern void cpt_init_clock_gating(struct drm_device *dev); 485 486 #endif 487