1 /* 2 * Copyright © 2008 Intel Corporation 3 * 2014 Red Hat Inc. 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining a 6 * copy of this software and associated documentation files (the "Software"), 7 * to deal in the Software without restriction, including without limitation 8 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 9 * and/or sell copies of the Software, and to permit persons to whom the 10 * Software is furnished to do so, subject to the following conditions: 11 * 12 * The above copyright notice and this permission notice (including the next 13 * paragraph) shall be included in all copies or substantial portions of the 14 * Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS 22 * IN THE SOFTWARE. 23 * 24 */ 25 26 #include <drm/drmP.h> 27 #include "i915_drv.h" 28 #include "intel_drv.h" 29 #include <drm/drm_atomic_helper.h> 30 #include <drm/drm_crtc_helper.h> 31 #include <drm/drm_edid.h> 32 33 #if 0 34 static bool intel_dp_mst_compute_config(struct intel_encoder *encoder, 35 struct intel_crtc_state *pipe_config) 36 { 37 struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base); 38 struct intel_digital_port *intel_dig_port = intel_mst->primary; 39 struct intel_dp *intel_dp = &intel_dig_port->dp; 40 struct drm_atomic_state *state; 41 int bpp, i; 42 int lane_count, slots, rate; 43 struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode; 44 struct intel_connector *found = NULL; 45 int mst_pbn; 46 47 pipe_config->dp_encoder_is_mst = true; 48 pipe_config->has_pch_encoder = false; 49 pipe_config->has_dp_encoder = true; 50 bpp = 24; 51 /* 52 * for MST we always configure max link bw - the spec doesn't 53 * seem to suggest we should do otherwise. 54 */ 55 lane_count = drm_dp_max_lane_count(intel_dp->dpcd); 56 57 rate = intel_dp_max_link_rate(intel_dp); 58 59 if (intel_dp->num_sink_rates) { 60 intel_dp->link_bw = 0; 61 intel_dp->rate_select = intel_dp_rate_select(intel_dp, rate); 62 } else { 63 intel_dp->link_bw = drm_dp_link_rate_to_bw_code(rate); 64 intel_dp->rate_select = 0; 65 } 66 67 intel_dp->lane_count = lane_count; 68 69 pipe_config->pipe_bpp = 24; 70 pipe_config->port_clock = rate; 71 72 state = pipe_config->base.state; 73 74 for (i = 0; i < state->num_connector; i++) { 75 if (!state->connectors[i]) 76 continue; 77 78 if (state->connector_states[i]->best_encoder == &encoder->base) { 79 found = to_intel_connector(state->connectors[i]); 80 break; 81 } 82 } 83 84 if (!found) { 85 DRM_ERROR("can't find connector\n"); 86 return false; 87 } 88 89 mst_pbn = drm_dp_calc_pbn_mode(adjusted_mode->clock, bpp); 90 91 pipe_config->pbn = mst_pbn; 92 slots = drm_dp_find_vcpi_slots(&intel_dp->mst_mgr, mst_pbn); 93 94 intel_link_compute_m_n(bpp, lane_count, 95 adjusted_mode->crtc_clock, 96 pipe_config->port_clock, 97 &pipe_config->dp_m_n); 98 99 pipe_config->dp_m_n.tu = slots; 100 return true; 101 102 } 103 104 static void intel_mst_disable_dp(struct intel_encoder *encoder) 105 { 106 struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base); 107 struct intel_digital_port *intel_dig_port = intel_mst->primary; 108 struct intel_dp *intel_dp = &intel_dig_port->dp; 109 int ret; 110 111 DRM_DEBUG_KMS("%d\n", intel_dp->active_mst_links); 112 113 drm_dp_mst_reset_vcpi_slots(&intel_dp->mst_mgr, intel_mst->port); 114 115 ret = drm_dp_update_payload_part1(&intel_dp->mst_mgr); 116 if (ret) { 117 DRM_ERROR("failed to update payload %d\n", ret); 118 } 119 } 120 121 static void intel_mst_post_disable_dp(struct intel_encoder *encoder) 122 { 123 struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base); 124 struct intel_digital_port *intel_dig_port = intel_mst->primary; 125 struct intel_dp *intel_dp = &intel_dig_port->dp; 126 127 DRM_DEBUG_KMS("%d\n", intel_dp->active_mst_links); 128 129 /* this can fail */ 130 drm_dp_check_act_status(&intel_dp->mst_mgr); 131 /* and this can also fail */ 132 drm_dp_update_payload_part2(&intel_dp->mst_mgr); 133 134 drm_dp_mst_deallocate_vcpi(&intel_dp->mst_mgr, intel_mst->port); 135 136 intel_dp->active_mst_links--; 137 intel_mst->port = NULL; 138 if (intel_dp->active_mst_links == 0) { 139 intel_dig_port->base.post_disable(&intel_dig_port->base); 140 intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_OFF); 141 } 142 } 143 144 static void intel_mst_pre_enable_dp(struct intel_encoder *encoder) 145 { 146 struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base); 147 struct intel_digital_port *intel_dig_port = intel_mst->primary; 148 struct intel_dp *intel_dp = &intel_dig_port->dp; 149 struct drm_device *dev = encoder->base.dev; 150 struct drm_i915_private *dev_priv = dev->dev_private; 151 enum port port = intel_dig_port->port; 152 int ret; 153 uint32_t temp; 154 struct intel_connector *found = NULL, *intel_connector; 155 int slots; 156 struct drm_crtc *crtc = encoder->base.crtc; 157 struct intel_crtc *intel_crtc = to_intel_crtc(crtc); 158 159 for_each_intel_connector(dev, intel_connector) { 160 if (intel_connector->new_encoder == encoder) { 161 found = intel_connector; 162 break; 163 } 164 } 165 166 if (!found) { 167 DRM_ERROR("can't find connector\n"); 168 return; 169 } 170 171 DRM_DEBUG_KMS("%d\n", intel_dp->active_mst_links); 172 intel_mst->port = found->port; 173 174 if (intel_dp->active_mst_links == 0) { 175 enum port port = intel_ddi_get_encoder_port(encoder); 176 177 I915_WRITE(PORT_CLK_SEL(port), 178 intel_crtc->config->ddi_pll_sel); 179 180 intel_ddi_init_dp_buf_reg(&intel_dig_port->base); 181 182 intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_ON); 183 184 185 intel_dp_start_link_train(intel_dp); 186 intel_dp_complete_link_train(intel_dp); 187 intel_dp_stop_link_train(intel_dp); 188 } 189 190 ret = drm_dp_mst_allocate_vcpi(&intel_dp->mst_mgr, 191 intel_mst->port, 192 intel_crtc->config->pbn, &slots); 193 if (ret == false) { 194 DRM_ERROR("failed to allocate vcpi\n"); 195 return; 196 } 197 198 199 intel_dp->active_mst_links++; 200 temp = I915_READ(DP_TP_STATUS(port)); 201 I915_WRITE(DP_TP_STATUS(port), temp); 202 203 ret = drm_dp_update_payload_part1(&intel_dp->mst_mgr); 204 } 205 206 static void intel_mst_enable_dp(struct intel_encoder *encoder) 207 { 208 struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base); 209 struct intel_digital_port *intel_dig_port = intel_mst->primary; 210 struct intel_dp *intel_dp = &intel_dig_port->dp; 211 struct drm_device *dev = intel_dig_port->base.base.dev; 212 struct drm_i915_private *dev_priv = dev->dev_private; 213 enum port port = intel_dig_port->port; 214 int ret; 215 216 DRM_DEBUG_KMS("%d\n", intel_dp->active_mst_links); 217 218 if (wait_for((I915_READ(DP_TP_STATUS(port)) & DP_TP_STATUS_ACT_SENT), 219 1)) 220 DRM_ERROR("Timed out waiting for ACT sent\n"); 221 222 ret = drm_dp_check_act_status(&intel_dp->mst_mgr); 223 224 ret = drm_dp_update_payload_part2(&intel_dp->mst_mgr); 225 } 226 227 static bool intel_dp_mst_enc_get_hw_state(struct intel_encoder *encoder, 228 enum pipe *pipe) 229 { 230 struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base); 231 *pipe = intel_mst->pipe; 232 if (intel_mst->port) 233 return true; 234 return false; 235 } 236 237 static void intel_dp_mst_enc_get_config(struct intel_encoder *encoder, 238 struct intel_crtc_state *pipe_config) 239 { 240 struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base); 241 struct intel_digital_port *intel_dig_port = intel_mst->primary; 242 struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc); 243 struct drm_device *dev = encoder->base.dev; 244 struct drm_i915_private *dev_priv = dev->dev_private; 245 enum transcoder cpu_transcoder = pipe_config->cpu_transcoder; 246 u32 temp, flags = 0; 247 248 pipe_config->has_dp_encoder = true; 249 250 temp = I915_READ(TRANS_DDI_FUNC_CTL(cpu_transcoder)); 251 if (temp & TRANS_DDI_PHSYNC) 252 flags |= DRM_MODE_FLAG_PHSYNC; 253 else 254 flags |= DRM_MODE_FLAG_NHSYNC; 255 if (temp & TRANS_DDI_PVSYNC) 256 flags |= DRM_MODE_FLAG_PVSYNC; 257 else 258 flags |= DRM_MODE_FLAG_NVSYNC; 259 260 switch (temp & TRANS_DDI_BPC_MASK) { 261 case TRANS_DDI_BPC_6: 262 pipe_config->pipe_bpp = 18; 263 break; 264 case TRANS_DDI_BPC_8: 265 pipe_config->pipe_bpp = 24; 266 break; 267 case TRANS_DDI_BPC_10: 268 pipe_config->pipe_bpp = 30; 269 break; 270 case TRANS_DDI_BPC_12: 271 pipe_config->pipe_bpp = 36; 272 break; 273 default: 274 break; 275 } 276 pipe_config->base.adjusted_mode.flags |= flags; 277 intel_dp_get_m_n(crtc, pipe_config); 278 279 intel_ddi_clock_get(&intel_dig_port->base, pipe_config); 280 } 281 282 static int intel_dp_mst_get_ddc_modes(struct drm_connector *connector) 283 { 284 struct intel_connector *intel_connector = to_intel_connector(connector); 285 struct intel_dp *intel_dp = intel_connector->mst_port; 286 struct edid *edid; 287 int ret; 288 289 edid = drm_dp_mst_get_edid(connector, &intel_dp->mst_mgr, intel_connector->port); 290 if (!edid) 291 return 0; 292 293 ret = intel_connector_update_modes(connector, edid); 294 kfree(edid); 295 296 return ret; 297 } 298 299 static enum drm_connector_status 300 intel_dp_mst_detect(struct drm_connector *connector, bool force) 301 { 302 struct intel_connector *intel_connector = to_intel_connector(connector); 303 struct intel_dp *intel_dp = intel_connector->mst_port; 304 305 return drm_dp_mst_detect_port(connector, &intel_dp->mst_mgr, intel_connector->port); 306 } 307 308 static int 309 intel_dp_mst_set_property(struct drm_connector *connector, 310 struct drm_property *property, 311 uint64_t val) 312 { 313 return 0; 314 } 315 316 static void 317 intel_dp_mst_connector_destroy(struct drm_connector *connector) 318 { 319 struct intel_connector *intel_connector = to_intel_connector(connector); 320 321 if (!IS_ERR_OR_NULL(intel_connector->edid)) 322 kfree(intel_connector->edid); 323 324 drm_connector_cleanup(connector); 325 kfree(connector); 326 } 327 328 static const struct drm_connector_funcs intel_dp_mst_connector_funcs = { 329 .dpms = intel_connector_dpms, 330 .detect = intel_dp_mst_detect, 331 .fill_modes = drm_helper_probe_single_connector_modes, 332 .set_property = intel_dp_mst_set_property, 333 .atomic_get_property = intel_connector_atomic_get_property, 334 .destroy = intel_dp_mst_connector_destroy, 335 .atomic_destroy_state = drm_atomic_helper_connector_destroy_state, 336 .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state, 337 }; 338 339 static int intel_dp_mst_get_modes(struct drm_connector *connector) 340 { 341 return intel_dp_mst_get_ddc_modes(connector); 342 } 343 344 static enum drm_mode_status 345 intel_dp_mst_mode_valid(struct drm_connector *connector, 346 struct drm_display_mode *mode) 347 { 348 /* TODO - validate mode against available PBN for link */ 349 if (mode->clock < 10000) 350 return MODE_CLOCK_LOW; 351 352 if (mode->flags & DRM_MODE_FLAG_DBLCLK) 353 return MODE_H_ILLEGAL; 354 355 return MODE_OK; 356 } 357 358 static struct drm_encoder *intel_mst_best_encoder(struct drm_connector *connector) 359 { 360 struct intel_connector *intel_connector = to_intel_connector(connector); 361 struct intel_dp *intel_dp = intel_connector->mst_port; 362 return &intel_dp->mst_encoders[0]->base.base; 363 } 364 365 static const struct drm_connector_helper_funcs intel_dp_mst_connector_helper_funcs = { 366 .get_modes = intel_dp_mst_get_modes, 367 .mode_valid = intel_dp_mst_mode_valid, 368 .best_encoder = intel_mst_best_encoder, 369 }; 370 #endif 371 372 static void intel_dp_mst_encoder_destroy(struct drm_encoder *encoder) 373 { 374 struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder); 375 376 drm_encoder_cleanup(encoder); 377 kfree(intel_mst); 378 } 379 380 static const struct drm_encoder_funcs intel_dp_mst_enc_funcs = { 381 .destroy = intel_dp_mst_encoder_destroy, 382 }; 383 384 #if 0 385 static bool intel_dp_mst_get_hw_state(struct intel_connector *connector) 386 { 387 if (connector->encoder) { 388 enum pipe pipe; 389 if (!connector->encoder->get_hw_state(connector->encoder, &pipe)) 390 return false; 391 return true; 392 } 393 return false; 394 } 395 396 static void intel_connector_add_to_fbdev(struct intel_connector *connector) 397 { 398 #ifdef CONFIG_DRM_I915_FBDEV 399 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 400 drm_fb_helper_add_one_connector(&dev_priv->fbdev->helper, &connector->base); 401 #endif 402 } 403 404 static void intel_connector_remove_from_fbdev(struct intel_connector *connector) 405 { 406 #ifdef CONFIG_DRM_I915_FBDEV 407 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 408 drm_fb_helper_remove_one_connector(&dev_priv->fbdev->helper, &connector->base); 409 #endif 410 } 411 412 static struct drm_connector *intel_dp_add_mst_connector(struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_port *port, const char *pathprop) 413 { 414 struct intel_dp *intel_dp = container_of(mgr, struct intel_dp, mst_mgr); 415 struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); 416 struct drm_device *dev = intel_dig_port->base.base.dev; 417 struct intel_connector *intel_connector; 418 struct drm_connector *connector; 419 int i; 420 421 intel_connector = intel_connector_alloc(); 422 if (!intel_connector) 423 return NULL; 424 425 connector = &intel_connector->base; 426 drm_connector_init(dev, connector, &intel_dp_mst_connector_funcs, DRM_MODE_CONNECTOR_DisplayPort); 427 drm_connector_helper_add(connector, &intel_dp_mst_connector_helper_funcs); 428 429 intel_connector->unregister = intel_connector_unregister; 430 intel_connector->get_hw_state = intel_dp_mst_get_hw_state; 431 intel_connector->mst_port = intel_dp; 432 intel_connector->port = port; 433 434 for (i = PIPE_A; i <= PIPE_C; i++) { 435 drm_mode_connector_attach_encoder(&intel_connector->base, 436 &intel_dp->mst_encoders[i]->base.base); 437 } 438 intel_dp_add_properties(intel_dp, connector); 439 440 drm_object_attach_property(&connector->base, dev->mode_config.path_property, 0); 441 drm_object_attach_property(&connector->base, dev->mode_config.tile_property, 0); 442 443 drm_mode_connector_set_path_property(connector, pathprop); 444 drm_reinit_primary_mode_group(dev); 445 mutex_lock(&dev->mode_config.mutex); 446 intel_connector_add_to_fbdev(intel_connector); 447 mutex_unlock(&dev->mode_config.mutex); 448 drm_connector_register(&intel_connector->base); 449 return connector; 450 } 451 452 static void intel_dp_destroy_mst_connector(struct drm_dp_mst_topology_mgr *mgr, 453 struct drm_connector *connector) 454 { 455 struct intel_connector *intel_connector = to_intel_connector(connector); 456 struct drm_device *dev = connector->dev; 457 /* need to nuke the connector */ 458 mutex_lock(&dev->mode_config.mutex); 459 intel_connector_dpms(connector, DRM_MODE_DPMS_OFF); 460 mutex_unlock(&dev->mode_config.mutex); 461 462 intel_connector->unregister(intel_connector); 463 464 mutex_lock(&dev->mode_config.mutex); 465 intel_connector_remove_from_fbdev(intel_connector); 466 drm_connector_cleanup(connector); 467 mutex_unlock(&dev->mode_config.mutex); 468 469 drm_reinit_primary_mode_group(dev); 470 471 kfree(intel_connector); 472 DRM_DEBUG_KMS("\n"); 473 } 474 475 static void intel_dp_mst_hotplug(struct drm_dp_mst_topology_mgr *mgr) 476 { 477 struct intel_dp *intel_dp = container_of(mgr, struct intel_dp, mst_mgr); 478 struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); 479 struct drm_device *dev = intel_dig_port->base.base.dev; 480 481 drm_kms_helper_hotplug_event(dev); 482 } 483 484 static struct drm_dp_mst_topology_cbs mst_cbs = { 485 .add_connector = intel_dp_add_mst_connector, 486 .destroy_connector = intel_dp_destroy_mst_connector, 487 .hotplug = intel_dp_mst_hotplug, 488 }; 489 490 static struct intel_dp_mst_encoder * 491 intel_dp_create_fake_mst_encoder(struct intel_digital_port *intel_dig_port, enum pipe pipe) 492 { 493 struct intel_dp_mst_encoder *intel_mst; 494 struct intel_encoder *intel_encoder; 495 struct drm_device *dev = intel_dig_port->base.base.dev; 496 497 intel_mst = kzalloc(sizeof(*intel_mst), GFP_KERNEL); 498 499 if (!intel_mst) 500 return NULL; 501 502 intel_mst->pipe = pipe; 503 intel_encoder = &intel_mst->base; 504 intel_mst->primary = intel_dig_port; 505 506 drm_encoder_init(dev, &intel_encoder->base, &intel_dp_mst_enc_funcs, 507 DRM_MODE_ENCODER_DPMST); 508 509 intel_encoder->type = INTEL_OUTPUT_DP_MST; 510 intel_encoder->crtc_mask = 0x7; 511 intel_encoder->cloneable = 0; 512 513 intel_encoder->compute_config = intel_dp_mst_compute_config; 514 intel_encoder->disable = intel_mst_disable_dp; 515 intel_encoder->post_disable = intel_mst_post_disable_dp; 516 intel_encoder->pre_enable = intel_mst_pre_enable_dp; 517 intel_encoder->enable = intel_mst_enable_dp; 518 intel_encoder->get_hw_state = intel_dp_mst_enc_get_hw_state; 519 intel_encoder->get_config = intel_dp_mst_enc_get_config; 520 521 return intel_mst; 522 523 } 524 525 static bool 526 intel_dp_create_fake_mst_encoders(struct intel_digital_port *intel_dig_port) 527 { 528 int i; 529 struct intel_dp *intel_dp = &intel_dig_port->dp; 530 531 for (i = PIPE_A; i <= PIPE_C; i++) 532 intel_dp->mst_encoders[i] = intel_dp_create_fake_mst_encoder(intel_dig_port, i); 533 return true; 534 } 535 #endif 536 537 int 538 intel_dp_mst_encoder_init(struct intel_digital_port *intel_dig_port, int conn_base_id) 539 { 540 struct intel_dp *intel_dp = &intel_dig_port->dp; 541 #if 0 542 struct drm_device *dev = intel_dig_port->base.base.dev; 543 int ret; 544 545 intel_dp->can_mst = true; 546 intel_dp->mst_mgr.cbs = &mst_cbs; 547 548 /* create encoders */ 549 intel_dp_create_fake_mst_encoders(intel_dig_port); 550 ret = drm_dp_mst_topology_mgr_init(&intel_dp->mst_mgr, dev->dev, &intel_dp->aux, 16, 3, conn_base_id); 551 if (ret) { 552 intel_dp->can_mst = false; 553 return ret; 554 } 555 #endif 556 intel_dp->can_mst = false; 557 return 0; 558 } 559 560 void 561 intel_dp_mst_encoder_cleanup(struct intel_digital_port *intel_dig_port) 562 { 563 struct intel_dp *intel_dp = &intel_dig_port->dp; 564 565 if (!intel_dp->can_mst) 566 return; 567 568 #if 0 569 drm_dp_mst_topology_mgr_destroy(&intel_dp->mst_mgr); 570 #endif 571 /* encoders will get killed by normal cleanup */ 572 } 573