1 /* 2 * Copyright © 2006-2007 Intel Corporation 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice (including the next 12 * paragraph) shall be included in all copies or substantial portions of the 13 * Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 21 * DEALINGS IN THE SOFTWARE. 22 * 23 * Authors: 24 * Eric Anholt <eric@anholt.net> 25 * 26 * $FreeBSD: src/sys/dev/drm2/i915/intel_crt.c,v 1.1 2012/05/22 11:07:44 kib Exp $ 27 */ 28 29 #include <drm/drmP.h> 30 #include <drm/drm_crtc.h> 31 #include <drm/drm_crtc_helper.h> 32 #include <drm/drm_edid.h> 33 #include "intel_drv.h" 34 #include <drm/i915_drm.h> 35 #include "i915_drv.h" 36 37 /* Here's the desired hotplug mode */ 38 #define ADPA_HOTPLUG_BITS (ADPA_CRT_HOTPLUG_PERIOD_128 | \ 39 ADPA_CRT_HOTPLUG_WARMUP_10MS | \ 40 ADPA_CRT_HOTPLUG_SAMPLE_4S | \ 41 ADPA_CRT_HOTPLUG_VOLTAGE_50 | \ 42 ADPA_CRT_HOTPLUG_VOLREF_325MV | \ 43 ADPA_CRT_HOTPLUG_ENABLE) 44 45 struct intel_crt { 46 struct intel_encoder base; 47 /* DPMS state is stored in the connector, which we need in the 48 * encoder's enable/disable callbacks */ 49 struct intel_connector *connector; 50 bool force_hotplug_required; 51 u32 adpa_reg; 52 }; 53 54 static struct intel_crt *intel_attached_crt(struct drm_connector *connector) 55 { 56 return container_of(intel_attached_encoder(connector), 57 struct intel_crt, base); 58 } 59 60 static void intel_crt_dpms(struct drm_encoder *encoder, int mode) 61 { 62 struct drm_device *dev = encoder->dev; 63 struct drm_i915_private *dev_priv = dev->dev_private; 64 u32 temp, reg; 65 66 if (HAS_PCH_SPLIT(dev)) 67 reg = PCH_ADPA; 68 else 69 reg = ADPA; 70 71 temp = I915_READ(reg); 72 temp &= ~(ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE); 73 temp &= ~ADPA_DAC_ENABLE; 74 75 switch (mode) { 76 case DRM_MODE_DPMS_ON: 77 temp |= ADPA_DAC_ENABLE; 78 break; 79 case DRM_MODE_DPMS_STANDBY: 80 temp |= ADPA_DAC_ENABLE | ADPA_HSYNC_CNTL_DISABLE; 81 break; 82 case DRM_MODE_DPMS_SUSPEND: 83 temp |= ADPA_DAC_ENABLE | ADPA_VSYNC_CNTL_DISABLE; 84 break; 85 case DRM_MODE_DPMS_OFF: 86 temp |= ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE; 87 break; 88 } 89 90 I915_WRITE(reg, temp); 91 } 92 93 static int intel_crt_mode_valid(struct drm_connector *connector, 94 struct drm_display_mode *mode) 95 { 96 struct drm_device *dev = connector->dev; 97 98 int max_clock = 0; 99 if (mode->flags & DRM_MODE_FLAG_DBLSCAN) 100 return MODE_NO_DBLESCAN; 101 102 if (mode->clock < 25000) 103 return MODE_CLOCK_LOW; 104 105 if (IS_GEN2(dev)) 106 max_clock = 350000; 107 else 108 max_clock = 400000; 109 if (mode->clock > max_clock) 110 return MODE_CLOCK_HIGH; 111 112 return MODE_OK; 113 } 114 115 static bool intel_crt_mode_fixup(struct drm_encoder *encoder, 116 const struct drm_display_mode *mode, 117 struct drm_display_mode *adjusted_mode) 118 { 119 return true; 120 } 121 122 static void intel_crt_mode_set(struct drm_encoder *encoder, 123 struct drm_display_mode *mode, 124 struct drm_display_mode *adjusted_mode) 125 { 126 127 struct drm_device *dev = encoder->dev; 128 struct drm_crtc *crtc = encoder->crtc; 129 struct intel_crtc *intel_crtc = to_intel_crtc(crtc); 130 struct drm_i915_private *dev_priv = dev->dev_private; 131 int dpll_md_reg; 132 u32 adpa, dpll_md; 133 u32 adpa_reg; 134 135 dpll_md_reg = DPLL_MD(intel_crtc->pipe); 136 137 if (HAS_PCH_SPLIT(dev)) 138 adpa_reg = PCH_ADPA; 139 else 140 adpa_reg = ADPA; 141 142 /* 143 * Disable separate mode multiplier used when cloning SDVO to CRT 144 * XXX this needs to be adjusted when we really are cloning 145 */ 146 if (INTEL_INFO(dev)->gen >= 4 && !HAS_PCH_SPLIT(dev)) { 147 dpll_md = I915_READ(dpll_md_reg); 148 I915_WRITE(dpll_md_reg, 149 dpll_md & ~DPLL_MD_UDI_MULTIPLIER_MASK); 150 } 151 152 adpa = ADPA_HOTPLUG_BITS; 153 if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC) 154 adpa |= ADPA_HSYNC_ACTIVE_HIGH; 155 if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC) 156 adpa |= ADPA_VSYNC_ACTIVE_HIGH; 157 158 /* For CPT allow 3 pipe config, for others just use A or B */ 159 if (HAS_PCH_CPT(dev)) 160 adpa |= PORT_TRANS_SEL_CPT(intel_crtc->pipe); 161 else if (intel_crtc->pipe == 0) 162 adpa |= ADPA_PIPE_A_SELECT; 163 else 164 adpa |= ADPA_PIPE_B_SELECT; 165 166 if (!HAS_PCH_SPLIT(dev)) 167 I915_WRITE(BCLRPAT(intel_crtc->pipe), 0); 168 169 I915_WRITE(adpa_reg, adpa); 170 } 171 172 static bool intel_ironlake_crt_detect_hotplug(struct drm_connector *connector) 173 { 174 struct drm_device *dev = connector->dev; 175 struct intel_crt *crt = intel_attached_crt(connector); 176 struct drm_i915_private *dev_priv = dev->dev_private; 177 u32 adpa; 178 bool ret; 179 180 /* The first time through, trigger an explicit detection cycle */ 181 if (crt->force_hotplug_required) { 182 bool turn_off_dac = HAS_PCH_SPLIT(dev); 183 u32 save_adpa; 184 185 crt->force_hotplug_required = 0; 186 187 save_adpa = adpa = I915_READ(PCH_ADPA); 188 DRM_DEBUG_KMS("trigger hotplug detect cycle: adpa=0x%x\n", adpa); 189 190 adpa |= ADPA_CRT_HOTPLUG_FORCE_TRIGGER; 191 if (turn_off_dac) 192 adpa &= ~ADPA_DAC_ENABLE; 193 194 I915_WRITE(PCH_ADPA, adpa); 195 196 if (_intel_wait_for(dev, 197 (I915_READ(PCH_ADPA) & ADPA_CRT_HOTPLUG_FORCE_TRIGGER) == 0, 198 1000, 1, "915crt")) 199 DRM_DEBUG_KMS("timed out waiting for FORCE_TRIGGER\n"); 200 201 if (turn_off_dac) { 202 I915_WRITE(PCH_ADPA, save_adpa); 203 POSTING_READ(PCH_ADPA); 204 } 205 } 206 207 /* Check the status to see if both blue and green are on now */ 208 adpa = I915_READ(PCH_ADPA); 209 if ((adpa & ADPA_CRT_HOTPLUG_MONITOR_MASK) != 0) 210 ret = true; 211 else 212 ret = false; 213 DRM_DEBUG_KMS("ironlake hotplug adpa=0x%x, result %d\n", adpa, ret); 214 215 return ret; 216 } 217 218 /** 219 * Uses CRT_HOTPLUG_EN and CRT_HOTPLUG_STAT to detect CRT presence. 220 * 221 * Not for i915G/i915GM 222 * 223 * \return true if CRT is connected. 224 * \return false if CRT is disconnected. 225 */ 226 static bool intel_crt_detect_hotplug(struct drm_connector *connector) 227 { 228 struct drm_device *dev = connector->dev; 229 struct drm_i915_private *dev_priv = dev->dev_private; 230 u32 hotplug_en, orig, stat; 231 bool ret = false; 232 int i, tries = 0; 233 234 if (HAS_PCH_SPLIT(dev)) 235 return intel_ironlake_crt_detect_hotplug(connector); 236 237 /* 238 * On 4 series desktop, CRT detect sequence need to be done twice 239 * to get a reliable result. 240 */ 241 242 if (IS_G4X(dev) && !IS_GM45(dev)) 243 tries = 2; 244 else 245 tries = 1; 246 hotplug_en = orig = I915_READ(PORT_HOTPLUG_EN); 247 hotplug_en |= CRT_HOTPLUG_FORCE_DETECT; 248 249 for (i = 0; i < tries ; i++) { 250 /* turn on the FORCE_DETECT */ 251 I915_WRITE(PORT_HOTPLUG_EN, hotplug_en); 252 /* wait for FORCE_DETECT to go off */ 253 if (_intel_wait_for(dev, 254 (I915_READ(PORT_HOTPLUG_EN) & CRT_HOTPLUG_FORCE_DETECT) == 0, 255 1000, 1, "915cr2")) 256 DRM_DEBUG_KMS("timed out waiting for FORCE_DETECT to go off"); 257 } 258 259 stat = I915_READ(PORT_HOTPLUG_STAT); 260 if ((stat & CRT_HOTPLUG_MONITOR_MASK) != CRT_HOTPLUG_MONITOR_NONE) 261 ret = true; 262 263 /* clear the interrupt we just generated, if any */ 264 I915_WRITE(PORT_HOTPLUG_STAT, CRT_HOTPLUG_INT_STATUS); 265 266 /* and put the bits back */ 267 I915_WRITE(PORT_HOTPLUG_EN, orig); 268 269 return ret; 270 } 271 272 static bool intel_crt_detect_ddc(struct drm_connector *connector) 273 { 274 struct intel_crt *crt = intel_attached_crt(connector); 275 struct drm_i915_private *dev_priv = crt->base.base.dev->dev_private; 276 277 /* CRT should always be at 0, but check anyway */ 278 if (crt->base.type != INTEL_OUTPUT_ANALOG) 279 return false; 280 281 if (intel_ddc_probe(&crt->base, dev_priv->crt_ddc_pin)) { 282 struct edid *edid; 283 bool is_digital = false; 284 285 edid = drm_get_edid(connector, 286 dev_priv->gmbus[dev_priv->crt_ddc_pin]); 287 /* 288 * This may be a DVI-I connector with a shared DDC 289 * link between analog and digital outputs, so we 290 * have to check the EDID input spec of the attached device. 291 * 292 * On the other hand, what should we do if it is a broken EDID? 293 */ 294 if (edid != NULL) { 295 is_digital = edid->input & DRM_EDID_INPUT_DIGITAL; 296 drm_free(edid, DRM_MEM_KMS); 297 } 298 299 if (!is_digital) { 300 DRM_DEBUG_KMS("CRT detected via DDC:0x50 [EDID]\n"); 301 return true; 302 } else { 303 DRM_DEBUG_KMS("CRT not detected via DDC:0x50 [EDID reports a digital panel]\n"); 304 } 305 } 306 307 return false; 308 } 309 310 static enum drm_connector_status 311 intel_crt_load_detect(struct intel_crt *crt) 312 { 313 struct drm_device *dev = crt->base.base.dev; 314 struct drm_i915_private *dev_priv = dev->dev_private; 315 uint32_t pipe = to_intel_crtc(crt->base.base.crtc)->pipe; 316 uint32_t save_bclrpat; 317 uint32_t save_vtotal; 318 uint32_t vtotal, vactive; 319 uint32_t vsample; 320 uint32_t vblank, vblank_start, vblank_end; 321 uint32_t dsl; 322 uint32_t bclrpat_reg; 323 uint32_t vtotal_reg; 324 uint32_t vblank_reg; 325 uint32_t vsync_reg; 326 uint32_t pipeconf_reg; 327 uint32_t pipe_dsl_reg; 328 uint8_t st00; 329 enum drm_connector_status status; 330 331 DRM_DEBUG_KMS("starting load-detect on CRT\n"); 332 333 bclrpat_reg = BCLRPAT(pipe); 334 vtotal_reg = VTOTAL(pipe); 335 vblank_reg = VBLANK(pipe); 336 vsync_reg = VSYNC(pipe); 337 pipeconf_reg = PIPECONF(pipe); 338 pipe_dsl_reg = PIPEDSL(pipe); 339 340 save_bclrpat = I915_READ(bclrpat_reg); 341 save_vtotal = I915_READ(vtotal_reg); 342 vblank = I915_READ(vblank_reg); 343 344 vtotal = ((save_vtotal >> 16) & 0xfff) + 1; 345 vactive = (save_vtotal & 0x7ff) + 1; 346 347 vblank_start = (vblank & 0xfff) + 1; 348 vblank_end = ((vblank >> 16) & 0xfff) + 1; 349 350 /* Set the border color to purple. */ 351 I915_WRITE(bclrpat_reg, 0x500050); 352 353 if (!IS_GEN2(dev)) { 354 uint32_t pipeconf = I915_READ(pipeconf_reg); 355 I915_WRITE(pipeconf_reg, pipeconf | PIPECONF_FORCE_BORDER); 356 POSTING_READ(pipeconf_reg); 357 /* Wait for next Vblank to substitue 358 * border color for Color info */ 359 intel_wait_for_vblank(dev, pipe); 360 st00 = I915_READ8(VGA_MSR_WRITE); 361 status = ((st00 & (1 << 4)) != 0) ? 362 connector_status_connected : 363 connector_status_disconnected; 364 365 I915_WRITE(pipeconf_reg, pipeconf); 366 } else { 367 bool restore_vblank = false; 368 int count, detect; 369 370 /* 371 * If there isn't any border, add some. 372 * Yes, this will flicker 373 */ 374 if (vblank_start <= vactive && vblank_end >= vtotal) { 375 uint32_t vsync = I915_READ(vsync_reg); 376 uint32_t vsync_start = (vsync & 0xffff) + 1; 377 378 vblank_start = vsync_start; 379 I915_WRITE(vblank_reg, 380 (vblank_start - 1) | 381 ((vblank_end - 1) << 16)); 382 restore_vblank = true; 383 } 384 /* sample in the vertical border, selecting the larger one */ 385 if (vblank_start - vactive >= vtotal - vblank_end) 386 vsample = (vblank_start + vactive) >> 1; 387 else 388 vsample = (vtotal + vblank_end) >> 1; 389 390 /* 391 * Wait for the border to be displayed 392 */ 393 while (I915_READ(pipe_dsl_reg) >= vactive) 394 ; 395 while ((dsl = I915_READ(pipe_dsl_reg)) <= vsample) 396 ; 397 /* 398 * Watch ST00 for an entire scanline 399 */ 400 detect = 0; 401 count = 0; 402 do { 403 count++; 404 /* Read the ST00 VGA status register */ 405 st00 = I915_READ8(VGA_MSR_WRITE); 406 if (st00 & (1 << 4)) 407 detect++; 408 } while ((I915_READ(pipe_dsl_reg) == dsl)); 409 410 /* restore vblank if necessary */ 411 if (restore_vblank) 412 I915_WRITE(vblank_reg, vblank); 413 /* 414 * If more than 3/4 of the scanline detected a monitor, 415 * then it is assumed to be present. This works even on i830, 416 * where there isn't any way to force the border color across 417 * the screen 418 */ 419 status = detect * 4 > count * 3 ? 420 connector_status_connected : 421 connector_status_disconnected; 422 } 423 424 /* Restore previous settings */ 425 I915_WRITE(bclrpat_reg, save_bclrpat); 426 427 return status; 428 } 429 430 static enum drm_connector_status 431 intel_crt_detect(struct drm_connector *connector, bool force) 432 { 433 struct drm_device *dev = connector->dev; 434 struct intel_crt *crt = intel_attached_crt(connector); 435 enum drm_connector_status status; 436 struct intel_load_detect_pipe tmp; 437 438 if (I915_HAS_HOTPLUG(dev)) { 439 if (intel_crt_detect_hotplug(connector)) { 440 DRM_DEBUG_KMS("CRT detected via hotplug\n"); 441 return connector_status_connected; 442 } else { 443 DRM_DEBUG_KMS("CRT not detected via hotplug\n"); 444 return connector_status_disconnected; 445 } 446 } 447 448 if (intel_crt_detect_ddc(connector)) 449 return connector_status_connected; 450 451 if (!force) 452 return connector->status; 453 454 /* for pre-945g platforms use load detect */ 455 if (intel_get_load_detect_pipe(&crt->base, connector, NULL, 456 &tmp)) { 457 if (intel_crt_detect_ddc(connector)) 458 status = connector_status_connected; 459 else 460 status = intel_crt_load_detect(crt); 461 intel_release_load_detect_pipe(&crt->base, connector, 462 &tmp); 463 } else 464 status = connector_status_unknown; 465 466 return status; 467 } 468 469 static void intel_crt_destroy(struct drm_connector *connector) 470 { 471 472 #if 0 473 drm_sysfs_connector_remove(connector); 474 #endif 475 drm_connector_cleanup(connector); 476 drm_free(connector, DRM_MEM_KMS); 477 } 478 479 static int intel_crt_get_modes(struct drm_connector *connector) 480 { 481 struct drm_device *dev = connector->dev; 482 struct drm_i915_private *dev_priv = dev->dev_private; 483 int ret; 484 485 ret = intel_ddc_get_modes(connector, 486 dev_priv->gmbus[dev_priv->crt_ddc_pin]); 487 if (ret || !IS_G4X(dev)) 488 return ret; 489 490 /* Try to probe digital port for output in DVI-I -> VGA mode. */ 491 return (intel_ddc_get_modes(connector, 492 dev_priv->gmbus[GMBUS_PORT_DPB])); 493 } 494 495 static int intel_crt_set_property(struct drm_connector *connector, 496 struct drm_property *property, 497 uint64_t value) 498 { 499 return 0; 500 } 501 502 static void intel_crt_reset(struct drm_connector *connector) 503 { 504 struct drm_device *dev = connector->dev; 505 struct intel_crt *crt = intel_attached_crt(connector); 506 507 if (HAS_PCH_SPLIT(dev)) 508 crt->force_hotplug_required = 1; 509 } 510 511 /* 512 * Routines for controlling stuff on the analog port 513 */ 514 515 static const struct drm_encoder_helper_funcs intel_crt_helper_funcs = { 516 .dpms = intel_crt_dpms, 517 .mode_fixup = intel_crt_mode_fixup, 518 .prepare = intel_encoder_prepare, 519 .commit = intel_encoder_commit, 520 .mode_set = intel_crt_mode_set, 521 }; 522 523 static const struct drm_connector_funcs intel_crt_connector_funcs = { 524 .reset = intel_crt_reset, 525 .dpms = drm_helper_connector_dpms, 526 .detect = intel_crt_detect, 527 .fill_modes = drm_helper_probe_single_connector_modes, 528 .destroy = intel_crt_destroy, 529 .set_property = intel_crt_set_property, 530 }; 531 532 static const struct drm_connector_helper_funcs intel_crt_connector_helper_funcs = { 533 .mode_valid = intel_crt_mode_valid, 534 .get_modes = intel_crt_get_modes, 535 .best_encoder = intel_best_encoder, 536 }; 537 538 static const struct drm_encoder_funcs intel_crt_enc_funcs = { 539 .destroy = intel_encoder_destroy, 540 }; 541 542 static int intel_no_crt_dmi_callback(const struct dmi_system_id *id) 543 { 544 DRM_DEBUG_KMS("Skipping CRT initialization for %s\n", id->ident); 545 return 1; 546 } 547 548 static const struct dmi_system_id intel_no_crt[] = { 549 { 550 .callback = intel_no_crt_dmi_callback, 551 .ident = "ACER ZGB", 552 .matches = { 553 DMI_MATCH(DMI_SYS_VENDOR, "ACER"), 554 DMI_MATCH(DMI_PRODUCT_NAME, "ZGB"), 555 }, 556 }, 557 { } 558 }; 559 560 void intel_crt_init(struct drm_device *dev) 561 { 562 struct drm_connector *connector; 563 struct intel_crt *crt; 564 struct intel_connector *intel_connector; 565 struct drm_i915_private *dev_priv = dev->dev_private; 566 567 /* Skip machines without VGA that falsely report hotplug events */ 568 if (dmi_check_system(intel_no_crt)) 569 return; 570 571 crt = kmalloc(sizeof(struct intel_crt), DRM_MEM_KMS, M_WAITOK | M_ZERO); 572 intel_connector = kmalloc(sizeof(struct intel_connector), DRM_MEM_KMS, 573 M_WAITOK | M_ZERO); 574 575 connector = &intel_connector->base; 576 drm_connector_init(dev, &intel_connector->base, 577 &intel_crt_connector_funcs, DRM_MODE_CONNECTOR_VGA); 578 579 drm_encoder_init(dev, &crt->base.base, &intel_crt_enc_funcs, 580 DRM_MODE_ENCODER_DAC); 581 582 intel_connector_attach_encoder(intel_connector, &crt->base); 583 584 crt->base.type = INTEL_OUTPUT_ANALOG; 585 crt->base.clone_mask = (1 << INTEL_SDVO_NON_TV_CLONE_BIT | 586 1 << INTEL_ANALOG_CLONE_BIT | 587 1 << INTEL_SDVO_LVDS_CLONE_BIT); 588 if (IS_I830(dev)) 589 crt->base.crtc_mask = (1 << 0); 590 else 591 crt->base.crtc_mask = (1 << 0) | (1 << 1) | (1 << 2); 592 593 if (IS_GEN2(dev)) 594 connector->interlace_allowed = 0; 595 else 596 connector->interlace_allowed = 1; 597 connector->doublescan_allowed = 0; 598 599 if (HAS_PCH_SPLIT(dev)) 600 crt->adpa_reg = PCH_ADPA; 601 else if (IS_VALLEYVIEW(dev)) 602 crt->adpa_reg = VLV_ADPA; 603 else 604 crt->adpa_reg = ADPA; 605 606 drm_encoder_helper_add(&crt->base.base, &intel_crt_helper_funcs); 607 drm_connector_helper_add(connector, &intel_crt_connector_helper_funcs); 608 609 #if 0 610 drm_sysfs_connector_add(connector); 611 #endif 612 613 if (I915_HAS_HOTPLUG(dev)) 614 connector->polled = DRM_CONNECTOR_POLL_HPD; 615 else 616 connector->polled = DRM_CONNECTOR_POLL_CONNECT; 617 618 /* 619 * Configure the automatic hotplug detection stuff 620 */ 621 crt->force_hotplug_required = 0; 622 if (HAS_PCH_SPLIT(dev)) { 623 u32 adpa; 624 625 adpa = I915_READ(PCH_ADPA); 626 adpa &= ~ADPA_CRT_HOTPLUG_MASK; 627 adpa |= ADPA_HOTPLUG_BITS; 628 I915_WRITE(PCH_ADPA, adpa); 629 POSTING_READ(PCH_ADPA); 630 631 DRM_DEBUG_KMS("pch crt adpa set to 0x%x\n", adpa); 632 crt->force_hotplug_required = 1; 633 } 634 635 dev_priv->hotplug_supported_mask |= CRT_HOTPLUG_INT_STATUS; 636 } 637