1 /* 2 * Copyright © 2006-2007 Intel Corporation 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice (including the next 12 * paragraph) shall be included in all copies or substantial portions of the 13 * Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 21 * DEALINGS IN THE SOFTWARE. 22 * 23 * Authors: 24 * Eric Anholt <eric@anholt.net> 25 * 26 * $FreeBSD: src/sys/dev/drm2/i915/intel_crt.c,v 1.1 2012/05/22 11:07:44 kib Exp $ 27 */ 28 29 #include <drm/drmP.h> 30 #include <drm/drm_crtc.h> 31 #include <drm/drm_crtc_helper.h> 32 #include <drm/drm_edid.h> 33 #include "intel_drv.h" 34 #include "i915_drm.h" 35 #include "i915_drv.h" 36 37 /* Here's the desired hotplug mode */ 38 #define ADPA_HOTPLUG_BITS (ADPA_CRT_HOTPLUG_PERIOD_128 | \ 39 ADPA_CRT_HOTPLUG_WARMUP_10MS | \ 40 ADPA_CRT_HOTPLUG_SAMPLE_4S | \ 41 ADPA_CRT_HOTPLUG_VOLTAGE_50 | \ 42 ADPA_CRT_HOTPLUG_VOLREF_325MV | \ 43 ADPA_CRT_HOTPLUG_ENABLE) 44 45 struct intel_crt { 46 struct intel_encoder base; 47 bool force_hotplug_required; 48 }; 49 50 static struct intel_crt *intel_attached_crt(struct drm_connector *connector) 51 { 52 return container_of(intel_attached_encoder(connector), 53 struct intel_crt, base); 54 } 55 56 static void intel_crt_dpms(struct drm_encoder *encoder, int mode) 57 { 58 struct drm_device *dev = encoder->dev; 59 struct drm_i915_private *dev_priv = dev->dev_private; 60 u32 temp, reg; 61 62 if (HAS_PCH_SPLIT(dev)) 63 reg = PCH_ADPA; 64 else 65 reg = ADPA; 66 67 temp = I915_READ(reg); 68 temp &= ~(ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE); 69 temp &= ~ADPA_DAC_ENABLE; 70 71 switch (mode) { 72 case DRM_MODE_DPMS_ON: 73 temp |= ADPA_DAC_ENABLE; 74 break; 75 case DRM_MODE_DPMS_STANDBY: 76 temp |= ADPA_DAC_ENABLE | ADPA_HSYNC_CNTL_DISABLE; 77 break; 78 case DRM_MODE_DPMS_SUSPEND: 79 temp |= ADPA_DAC_ENABLE | ADPA_VSYNC_CNTL_DISABLE; 80 break; 81 case DRM_MODE_DPMS_OFF: 82 temp |= ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE; 83 break; 84 } 85 86 I915_WRITE(reg, temp); 87 } 88 89 static int intel_crt_mode_valid(struct drm_connector *connector, 90 struct drm_display_mode *mode) 91 { 92 struct drm_device *dev = connector->dev; 93 94 int max_clock = 0; 95 if (mode->flags & DRM_MODE_FLAG_DBLSCAN) 96 return MODE_NO_DBLESCAN; 97 98 if (mode->clock < 25000) 99 return MODE_CLOCK_LOW; 100 101 if (IS_GEN2(dev)) 102 max_clock = 350000; 103 else 104 max_clock = 400000; 105 if (mode->clock > max_clock) 106 return MODE_CLOCK_HIGH; 107 108 return MODE_OK; 109 } 110 111 static bool intel_crt_mode_fixup(struct drm_encoder *encoder, 112 const struct drm_display_mode *mode, 113 struct drm_display_mode *adjusted_mode) 114 { 115 return true; 116 } 117 118 static void intel_crt_mode_set(struct drm_encoder *encoder, 119 struct drm_display_mode *mode, 120 struct drm_display_mode *adjusted_mode) 121 { 122 123 struct drm_device *dev = encoder->dev; 124 struct drm_crtc *crtc = encoder->crtc; 125 struct intel_crtc *intel_crtc = to_intel_crtc(crtc); 126 struct drm_i915_private *dev_priv = dev->dev_private; 127 int dpll_md_reg; 128 u32 adpa, dpll_md; 129 u32 adpa_reg; 130 131 dpll_md_reg = DPLL_MD(intel_crtc->pipe); 132 133 if (HAS_PCH_SPLIT(dev)) 134 adpa_reg = PCH_ADPA; 135 else 136 adpa_reg = ADPA; 137 138 /* 139 * Disable separate mode multiplier used when cloning SDVO to CRT 140 * XXX this needs to be adjusted when we really are cloning 141 */ 142 if (INTEL_INFO(dev)->gen >= 4 && !HAS_PCH_SPLIT(dev)) { 143 dpll_md = I915_READ(dpll_md_reg); 144 I915_WRITE(dpll_md_reg, 145 dpll_md & ~DPLL_MD_UDI_MULTIPLIER_MASK); 146 } 147 148 adpa = ADPA_HOTPLUG_BITS; 149 if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC) 150 adpa |= ADPA_HSYNC_ACTIVE_HIGH; 151 if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC) 152 adpa |= ADPA_VSYNC_ACTIVE_HIGH; 153 154 /* For CPT allow 3 pipe config, for others just use A or B */ 155 if (HAS_PCH_CPT(dev)) 156 adpa |= PORT_TRANS_SEL_CPT(intel_crtc->pipe); 157 else if (intel_crtc->pipe == 0) 158 adpa |= ADPA_PIPE_A_SELECT; 159 else 160 adpa |= ADPA_PIPE_B_SELECT; 161 162 if (!HAS_PCH_SPLIT(dev)) 163 I915_WRITE(BCLRPAT(intel_crtc->pipe), 0); 164 165 I915_WRITE(adpa_reg, adpa); 166 } 167 168 static bool intel_ironlake_crt_detect_hotplug(struct drm_connector *connector) 169 { 170 struct drm_device *dev = connector->dev; 171 struct intel_crt *crt = intel_attached_crt(connector); 172 struct drm_i915_private *dev_priv = dev->dev_private; 173 u32 adpa; 174 bool ret; 175 176 /* The first time through, trigger an explicit detection cycle */ 177 if (crt->force_hotplug_required) { 178 bool turn_off_dac = HAS_PCH_SPLIT(dev); 179 u32 save_adpa; 180 181 crt->force_hotplug_required = 0; 182 183 save_adpa = adpa = I915_READ(PCH_ADPA); 184 DRM_DEBUG_KMS("trigger hotplug detect cycle: adpa=0x%x\n", adpa); 185 186 adpa |= ADPA_CRT_HOTPLUG_FORCE_TRIGGER; 187 if (turn_off_dac) 188 adpa &= ~ADPA_DAC_ENABLE; 189 190 I915_WRITE(PCH_ADPA, adpa); 191 192 if (_intel_wait_for(dev, 193 (I915_READ(PCH_ADPA) & ADPA_CRT_HOTPLUG_FORCE_TRIGGER) == 0, 194 1000, 1, "915crt")) 195 DRM_DEBUG_KMS("timed out waiting for FORCE_TRIGGER\n"); 196 197 if (turn_off_dac) { 198 I915_WRITE(PCH_ADPA, save_adpa); 199 POSTING_READ(PCH_ADPA); 200 } 201 } 202 203 /* Check the status to see if both blue and green are on now */ 204 adpa = I915_READ(PCH_ADPA); 205 if ((adpa & ADPA_CRT_HOTPLUG_MONITOR_MASK) != 0) 206 ret = true; 207 else 208 ret = false; 209 DRM_DEBUG_KMS("ironlake hotplug adpa=0x%x, result %d\n", adpa, ret); 210 211 return ret; 212 } 213 214 /** 215 * Uses CRT_HOTPLUG_EN and CRT_HOTPLUG_STAT to detect CRT presence. 216 * 217 * Not for i915G/i915GM 218 * 219 * \return true if CRT is connected. 220 * \return false if CRT is disconnected. 221 */ 222 static bool intel_crt_detect_hotplug(struct drm_connector *connector) 223 { 224 struct drm_device *dev = connector->dev; 225 struct drm_i915_private *dev_priv = dev->dev_private; 226 u32 hotplug_en, orig, stat; 227 bool ret = false; 228 int i, tries = 0; 229 230 if (HAS_PCH_SPLIT(dev)) 231 return intel_ironlake_crt_detect_hotplug(connector); 232 233 /* 234 * On 4 series desktop, CRT detect sequence need to be done twice 235 * to get a reliable result. 236 */ 237 238 if (IS_G4X(dev) && !IS_GM45(dev)) 239 tries = 2; 240 else 241 tries = 1; 242 hotplug_en = orig = I915_READ(PORT_HOTPLUG_EN); 243 hotplug_en |= CRT_HOTPLUG_FORCE_DETECT; 244 245 for (i = 0; i < tries ; i++) { 246 /* turn on the FORCE_DETECT */ 247 I915_WRITE(PORT_HOTPLUG_EN, hotplug_en); 248 /* wait for FORCE_DETECT to go off */ 249 if (_intel_wait_for(dev, 250 (I915_READ(PORT_HOTPLUG_EN) & CRT_HOTPLUG_FORCE_DETECT) == 0, 251 1000, 1, "915cr2")) 252 DRM_DEBUG_KMS("timed out waiting for FORCE_DETECT to go off"); 253 } 254 255 stat = I915_READ(PORT_HOTPLUG_STAT); 256 if ((stat & CRT_HOTPLUG_MONITOR_MASK) != CRT_HOTPLUG_MONITOR_NONE) 257 ret = true; 258 259 /* clear the interrupt we just generated, if any */ 260 I915_WRITE(PORT_HOTPLUG_STAT, CRT_HOTPLUG_INT_STATUS); 261 262 /* and put the bits back */ 263 I915_WRITE(PORT_HOTPLUG_EN, orig); 264 265 return ret; 266 } 267 268 static bool intel_crt_detect_ddc(struct drm_connector *connector) 269 { 270 struct intel_crt *crt = intel_attached_crt(connector); 271 struct drm_i915_private *dev_priv = crt->base.base.dev->dev_private; 272 273 /* CRT should always be at 0, but check anyway */ 274 if (crt->base.type != INTEL_OUTPUT_ANALOG) 275 return false; 276 277 if (intel_ddc_probe(&crt->base, dev_priv->crt_ddc_pin)) { 278 struct edid *edid; 279 bool is_digital = false; 280 281 edid = drm_get_edid(connector, 282 dev_priv->gmbus[dev_priv->crt_ddc_pin]); 283 /* 284 * This may be a DVI-I connector with a shared DDC 285 * link between analog and digital outputs, so we 286 * have to check the EDID input spec of the attached device. 287 * 288 * On the other hand, what should we do if it is a broken EDID? 289 */ 290 if (edid != NULL) { 291 is_digital = edid->input & DRM_EDID_INPUT_DIGITAL; 292 connector->display_info.raw_edid = NULL; 293 drm_free(edid, DRM_MEM_KMS); 294 } 295 296 if (!is_digital) { 297 DRM_DEBUG_KMS("CRT detected via DDC:0x50 [EDID]\n"); 298 return true; 299 } else { 300 DRM_DEBUG_KMS("CRT not detected via DDC:0x50 [EDID reports a digital panel]\n"); 301 } 302 } 303 304 return false; 305 } 306 307 static enum drm_connector_status 308 intel_crt_load_detect(struct intel_crt *crt) 309 { 310 struct drm_device *dev = crt->base.base.dev; 311 struct drm_i915_private *dev_priv = dev->dev_private; 312 uint32_t pipe = to_intel_crtc(crt->base.base.crtc)->pipe; 313 uint32_t save_bclrpat; 314 uint32_t save_vtotal; 315 uint32_t vtotal, vactive; 316 uint32_t vsample; 317 uint32_t vblank, vblank_start, vblank_end; 318 uint32_t dsl; 319 uint32_t bclrpat_reg; 320 uint32_t vtotal_reg; 321 uint32_t vblank_reg; 322 uint32_t vsync_reg; 323 uint32_t pipeconf_reg; 324 uint32_t pipe_dsl_reg; 325 uint8_t st00; 326 enum drm_connector_status status; 327 328 DRM_DEBUG_KMS("starting load-detect on CRT\n"); 329 330 bclrpat_reg = BCLRPAT(pipe); 331 vtotal_reg = VTOTAL(pipe); 332 vblank_reg = VBLANK(pipe); 333 vsync_reg = VSYNC(pipe); 334 pipeconf_reg = PIPECONF(pipe); 335 pipe_dsl_reg = PIPEDSL(pipe); 336 337 save_bclrpat = I915_READ(bclrpat_reg); 338 save_vtotal = I915_READ(vtotal_reg); 339 vblank = I915_READ(vblank_reg); 340 341 vtotal = ((save_vtotal >> 16) & 0xfff) + 1; 342 vactive = (save_vtotal & 0x7ff) + 1; 343 344 vblank_start = (vblank & 0xfff) + 1; 345 vblank_end = ((vblank >> 16) & 0xfff) + 1; 346 347 /* Set the border color to purple. */ 348 I915_WRITE(bclrpat_reg, 0x500050); 349 350 if (!IS_GEN2(dev)) { 351 uint32_t pipeconf = I915_READ(pipeconf_reg); 352 I915_WRITE(pipeconf_reg, pipeconf | PIPECONF_FORCE_BORDER); 353 POSTING_READ(pipeconf_reg); 354 /* Wait for next Vblank to substitue 355 * border color for Color info */ 356 intel_wait_for_vblank(dev, pipe); 357 st00 = I915_READ8(VGA_MSR_WRITE); 358 status = ((st00 & (1 << 4)) != 0) ? 359 connector_status_connected : 360 connector_status_disconnected; 361 362 I915_WRITE(pipeconf_reg, pipeconf); 363 } else { 364 bool restore_vblank = false; 365 int count, detect; 366 367 /* 368 * If there isn't any border, add some. 369 * Yes, this will flicker 370 */ 371 if (vblank_start <= vactive && vblank_end >= vtotal) { 372 uint32_t vsync = I915_READ(vsync_reg); 373 uint32_t vsync_start = (vsync & 0xffff) + 1; 374 375 vblank_start = vsync_start; 376 I915_WRITE(vblank_reg, 377 (vblank_start - 1) | 378 ((vblank_end - 1) << 16)); 379 restore_vblank = true; 380 } 381 /* sample in the vertical border, selecting the larger one */ 382 if (vblank_start - vactive >= vtotal - vblank_end) 383 vsample = (vblank_start + vactive) >> 1; 384 else 385 vsample = (vtotal + vblank_end) >> 1; 386 387 /* 388 * Wait for the border to be displayed 389 */ 390 while (I915_READ(pipe_dsl_reg) >= vactive) 391 ; 392 while ((dsl = I915_READ(pipe_dsl_reg)) <= vsample) 393 ; 394 /* 395 * Watch ST00 for an entire scanline 396 */ 397 detect = 0; 398 count = 0; 399 do { 400 count++; 401 /* Read the ST00 VGA status register */ 402 st00 = I915_READ8(VGA_MSR_WRITE); 403 if (st00 & (1 << 4)) 404 detect++; 405 } while ((I915_READ(pipe_dsl_reg) == dsl)); 406 407 /* restore vblank if necessary */ 408 if (restore_vblank) 409 I915_WRITE(vblank_reg, vblank); 410 /* 411 * If more than 3/4 of the scanline detected a monitor, 412 * then it is assumed to be present. This works even on i830, 413 * where there isn't any way to force the border color across 414 * the screen 415 */ 416 status = detect * 4 > count * 3 ? 417 connector_status_connected : 418 connector_status_disconnected; 419 } 420 421 /* Restore previous settings */ 422 I915_WRITE(bclrpat_reg, save_bclrpat); 423 424 return status; 425 } 426 427 static enum drm_connector_status 428 intel_crt_detect(struct drm_connector *connector, bool force) 429 { 430 struct drm_device *dev = connector->dev; 431 struct intel_crt *crt = intel_attached_crt(connector); 432 enum drm_connector_status status; 433 struct intel_load_detect_pipe tmp; 434 435 if (I915_HAS_HOTPLUG(dev)) { 436 if (intel_crt_detect_hotplug(connector)) { 437 DRM_DEBUG_KMS("CRT detected via hotplug\n"); 438 return connector_status_connected; 439 } else { 440 DRM_DEBUG_KMS("CRT not detected via hotplug\n"); 441 return connector_status_disconnected; 442 } 443 } 444 445 if (intel_crt_detect_ddc(connector)) 446 return connector_status_connected; 447 448 if (!force) 449 return connector->status; 450 451 /* for pre-945g platforms use load detect */ 452 if (intel_get_load_detect_pipe(&crt->base, connector, NULL, 453 &tmp)) { 454 if (intel_crt_detect_ddc(connector)) 455 status = connector_status_connected; 456 else 457 status = intel_crt_load_detect(crt); 458 intel_release_load_detect_pipe(&crt->base, connector, 459 &tmp); 460 } else 461 status = connector_status_unknown; 462 463 return status; 464 } 465 466 static void intel_crt_destroy(struct drm_connector *connector) 467 { 468 469 #if 0 470 drm_sysfs_connector_remove(connector); 471 #endif 472 drm_connector_cleanup(connector); 473 drm_free(connector, DRM_MEM_KMS); 474 } 475 476 static int intel_crt_get_modes(struct drm_connector *connector) 477 { 478 struct drm_device *dev = connector->dev; 479 struct drm_i915_private *dev_priv = dev->dev_private; 480 int ret; 481 482 ret = intel_ddc_get_modes(connector, 483 dev_priv->gmbus[dev_priv->crt_ddc_pin]); 484 if (ret || !IS_G4X(dev)) 485 return ret; 486 487 /* Try to probe digital port for output in DVI-I -> VGA mode. */ 488 return (intel_ddc_get_modes(connector, 489 dev_priv->gmbus[GMBUS_PORT_DPB])); 490 } 491 492 static int intel_crt_set_property(struct drm_connector *connector, 493 struct drm_property *property, 494 uint64_t value) 495 { 496 return 0; 497 } 498 499 static void intel_crt_reset(struct drm_connector *connector) 500 { 501 struct drm_device *dev = connector->dev; 502 struct intel_crt *crt = intel_attached_crt(connector); 503 504 if (HAS_PCH_SPLIT(dev)) 505 crt->force_hotplug_required = 1; 506 } 507 508 /* 509 * Routines for controlling stuff on the analog port 510 */ 511 512 static const struct drm_encoder_helper_funcs intel_crt_helper_funcs = { 513 .dpms = intel_crt_dpms, 514 .mode_fixup = intel_crt_mode_fixup, 515 .prepare = intel_encoder_prepare, 516 .commit = intel_encoder_commit, 517 .mode_set = intel_crt_mode_set, 518 }; 519 520 static const struct drm_connector_funcs intel_crt_connector_funcs = { 521 .reset = intel_crt_reset, 522 .dpms = drm_helper_connector_dpms, 523 .detect = intel_crt_detect, 524 .fill_modes = drm_helper_probe_single_connector_modes, 525 .destroy = intel_crt_destroy, 526 .set_property = intel_crt_set_property, 527 }; 528 529 static const struct drm_connector_helper_funcs intel_crt_connector_helper_funcs = { 530 .mode_valid = intel_crt_mode_valid, 531 .get_modes = intel_crt_get_modes, 532 .best_encoder = intel_best_encoder, 533 }; 534 535 static const struct drm_encoder_funcs intel_crt_enc_funcs = { 536 .destroy = intel_encoder_destroy, 537 }; 538 539 static int intel_no_crt_dmi_callback(const struct dmi_system_id *id) 540 { 541 DRM_DEBUG_KMS("Skipping CRT initialization for %s\n", id->ident); 542 return 1; 543 } 544 545 static const struct dmi_system_id intel_no_crt[] = { 546 { 547 .callback = intel_no_crt_dmi_callback, 548 .ident = "ACER ZGB", 549 .matches = { 550 DMI_MATCH(DMI_SYS_VENDOR, "ACER"), 551 DMI_MATCH(DMI_PRODUCT_NAME, "ZGB"), 552 }, 553 }, 554 { } 555 }; 556 557 void intel_crt_init(struct drm_device *dev) 558 { 559 struct drm_connector *connector; 560 struct intel_crt *crt; 561 struct intel_connector *intel_connector; 562 struct drm_i915_private *dev_priv = dev->dev_private; 563 564 /* Skip machines without VGA that falsely report hotplug events */ 565 if (dmi_check_system(intel_no_crt)) 566 return; 567 568 crt = kmalloc(sizeof(struct intel_crt), DRM_MEM_KMS, M_WAITOK | M_ZERO); 569 intel_connector = kmalloc(sizeof(struct intel_connector), DRM_MEM_KMS, 570 M_WAITOK | M_ZERO); 571 572 connector = &intel_connector->base; 573 drm_connector_init(dev, &intel_connector->base, 574 &intel_crt_connector_funcs, DRM_MODE_CONNECTOR_VGA); 575 576 drm_encoder_init(dev, &crt->base.base, &intel_crt_enc_funcs, 577 DRM_MODE_ENCODER_DAC); 578 579 intel_connector_attach_encoder(intel_connector, &crt->base); 580 581 crt->base.type = INTEL_OUTPUT_ANALOG; 582 crt->base.clone_mask = (1 << INTEL_SDVO_NON_TV_CLONE_BIT | 583 1 << INTEL_ANALOG_CLONE_BIT | 584 1 << INTEL_SDVO_LVDS_CLONE_BIT); 585 crt->base.crtc_mask = (1 << 0) | (1 << 1); 586 if (IS_GEN2(dev)) 587 connector->interlace_allowed = 0; 588 else 589 connector->interlace_allowed = 1; 590 connector->doublescan_allowed = 0; 591 592 drm_encoder_helper_add(&crt->base.base, &intel_crt_helper_funcs); 593 drm_connector_helper_add(connector, &intel_crt_connector_helper_funcs); 594 595 #if 0 596 drm_sysfs_connector_add(connector); 597 #endif 598 599 if (I915_HAS_HOTPLUG(dev)) 600 connector->polled = DRM_CONNECTOR_POLL_HPD; 601 else 602 connector->polled = DRM_CONNECTOR_POLL_CONNECT; 603 604 /* 605 * Configure the automatic hotplug detection stuff 606 */ 607 crt->force_hotplug_required = 0; 608 if (HAS_PCH_SPLIT(dev)) { 609 u32 adpa; 610 611 adpa = I915_READ(PCH_ADPA); 612 adpa &= ~ADPA_CRT_HOTPLUG_MASK; 613 adpa |= ADPA_HOTPLUG_BITS; 614 I915_WRITE(PCH_ADPA, adpa); 615 POSTING_READ(PCH_ADPA); 616 617 DRM_DEBUG_KMS("pch crt adpa set to 0x%x\n", adpa); 618 crt->force_hotplug_required = 1; 619 } 620 621 dev_priv->hotplug_supported_mask |= CRT_HOTPLUG_INT_STATUS; 622 } 623