1 /* 2 * Copyright © 2014 Intel Corporation 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the 6 * "Software"), to deal in the Software without restriction, including 7 * without limitation the rights to use, copy, modify, merge, publish, 8 * distribute, sub license, and/or sell copies of the Software, and to 9 * permit persons to whom the Software is furnished to do so, subject to 10 * the following conditions: 11 * 12 * The above copyright notice and this permission notice (including the 13 * next paragraph) shall be included in all copies or substantial portions 14 * of the Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS 22 * IN THE SOFTWARE. 23 */ 24 25 #include "i915_params.h" 26 #include "i915_drv.h" 27 28 struct i915_params i915 __read_mostly = { 29 .modeset = -1, 30 .panel_ignore_lid = 1, 31 .semaphores = -1, 32 .lvds_channel_mode = 0, 33 .panel_use_ssc = -1, 34 .vbt_sdvo_panel_type = -1, 35 .enable_rc6 = -1, 36 .enable_dc = -1, 37 .enable_fbc = -1, 38 .enable_execlists = -1, 39 .enable_hangcheck = true, 40 .enable_ppgtt = -1, 41 .enable_psr = -1, 42 .preliminary_hw_support = IS_ENABLED(CONFIG_DRM_I915_PRELIMINARY_HW_SUPPORT), 43 .disable_power_well = -1, 44 .enable_ips = 1, 45 .fastboot = 0, 46 .prefault_disable = 0, 47 .load_detect_test = 0, 48 .force_reset_modeset_test = 0, 49 .reset = 1, 50 .invert_brightness = 0, 51 .disable_display = 0, 52 .enable_cmd_parser = 1, 53 .use_mmio_flip = 0, 54 .mmio_debug = 0, 55 .verbose_state_checks = 1, 56 .nuclear_pageflip = 0, 57 .edp_vswing = 0, 58 .enable_guc_loading = 0, 59 .enable_guc_submission = 0, 60 .guc_log_level = -1, 61 .enable_dp_mst = true, 62 .inject_load_failure = 0, 63 .enable_dpcd_backlight = false, 64 .enable_gvt = false, 65 }; 66 67 module_param_named(modeset, i915.modeset, int, 0400); 68 TUNABLE_INT("drm.i915.modeset", &i915.modeset); 69 MODULE_PARM_DESC(modeset, 70 "Use kernel modesetting [KMS] (0=disable, " 71 "1=on, -1=force vga console preference [default])"); 72 73 module_param_named_unsafe(panel_ignore_lid, i915.panel_ignore_lid, int, 0600); 74 TUNABLE_INT("drm.i915.panel_ignore_lid", &i915.panel_ignore_lid); 75 MODULE_PARM_DESC(panel_ignore_lid, 76 "Override lid status (0=autodetect, 1=autodetect disabled [default], " 77 "-1=force lid closed, -2=force lid open)"); 78 79 module_param_named_unsafe(semaphores, i915.semaphores, int, 0400); 80 TUNABLE_INT("drm.i915.semaphores", &i915.semaphores); 81 MODULE_PARM_DESC(semaphores, 82 "Use semaphores for inter-ring sync " 83 "(default: -1 (use per-chip defaults))"); 84 85 module_param_named_unsafe(enable_rc6, i915.enable_rc6, int, 0400); 86 TUNABLE_INT("drm.i915.enable_rc6", &i915.enable_rc6); 87 MODULE_PARM_DESC(enable_rc6, 88 "Enable power-saving render C-state 6. " 89 "Different stages can be selected via bitmask values " 90 "(0 = disable; 1 = enable rc6; 2 = enable deep rc6; 4 = enable deepest rc6). " 91 "For example, 3 would enable rc6 and deep rc6, and 7 would enable everything. " 92 "default: -1 (use per-chip default)"); 93 94 module_param_named_unsafe(enable_dc, i915.enable_dc, int, 0400); 95 TUNABLE_INT("drm.i915.enable_dc", &i915.enable_dc); 96 MODULE_PARM_DESC(enable_dc, 97 "Enable power-saving display C-states. " 98 "(-1=auto [default]; 0=disable; 1=up to DC5; 2=up to DC6)"); 99 100 module_param_named_unsafe(enable_fbc, i915.enable_fbc, int, 0600); 101 TUNABLE_INT("drm.i915.enable_fbc", &i915.enable_fbc); 102 MODULE_PARM_DESC(enable_fbc, 103 "Enable frame buffer compression for power savings " 104 "(default: -1 (use per-chip default))"); 105 106 module_param_named_unsafe(lvds_channel_mode, i915.lvds_channel_mode, int, 0400); 107 TUNABLE_INT("drm.i915.lvds_channel_mode", &i915.lvds_channel_mode); 108 MODULE_PARM_DESC(lvds_channel_mode, 109 "Specify LVDS channel mode " 110 "(0=probe BIOS [default], 1=single-channel, 2=dual-channel)"); 111 112 module_param_named_unsafe(lvds_use_ssc, i915.panel_use_ssc, int, 0600); 113 TUNABLE_INT("drm.i915.panel_use_ssc", &i915.panel_use_ssc); 114 MODULE_PARM_DESC(lvds_use_ssc, 115 "Use Spread Spectrum Clock with panels [LVDS/eDP] " 116 "(default: auto from VBT)"); 117 118 module_param_named_unsafe(vbt_sdvo_panel_type, i915.vbt_sdvo_panel_type, int, 0400); 119 TUNABLE_INT("drm.i915.vbt_sdvo_panel_type", &i915.vbt_sdvo_panel_type); 120 MODULE_PARM_DESC(vbt_sdvo_panel_type, 121 "Override/Ignore selection of SDVO panel mode in the VBT " 122 "(-2=ignore, -1=auto [default], index in VBT BIOS table)"); 123 124 module_param_named_unsafe(reset, i915.reset, bool, 0600); 125 TUNABLE_INT("drm.i915.reset", &i915.reset); 126 MODULE_PARM_DESC(reset, "Attempt GPU resets (default: true)"); 127 128 module_param_named_unsafe(enable_hangcheck, i915.enable_hangcheck, bool, 0644); 129 MODULE_PARM_DESC(enable_hangcheck, 130 "Periodically check GPU activity for detecting hangs. " 131 "WARNING: Disabling this can cause system wide hangs. " 132 "(default: true)"); 133 134 module_param_named_unsafe(enable_ppgtt, i915.enable_ppgtt, int, 0400); 135 TUNABLE_INT("drm.i915.enable_ppgtt", &i915.enable_ppgtt); 136 MODULE_PARM_DESC(enable_ppgtt, 137 "Override PPGTT usage. " 138 "(-1=auto [default], 0=disabled, 1=aliasing, 2=full, 3=full with extended address space)"); 139 140 module_param_named_unsafe(enable_execlists, i915.enable_execlists, int, 0400); 141 TUNABLE_INT("drm.i915.enable_execlists", &i915.enable_execlists); 142 MODULE_PARM_DESC(enable_execlists, 143 "Override execlists usage. " 144 "(-1=auto [default], 0=disabled, 1=enabled)"); 145 146 module_param_named_unsafe(enable_psr, i915.enable_psr, int, 0600); 147 TUNABLE_INT("drm.i915.enable_psr", &i915.enable_psr); 148 MODULE_PARM_DESC(enable_psr, "Enable PSR " 149 "(0=disabled, 1=enabled - link mode chosen per-platform, 2=force link-standby mode, 3=force link-off mode) " 150 "Default: -1 (use per-chip default)"); 151 152 module_param_named_unsafe(preliminary_hw_support, i915.preliminary_hw_support, int, 0400); 153 MODULE_PARM_DESC(preliminary_hw_support, 154 "Enable preliminary hardware support."); 155 156 module_param_named_unsafe(disable_power_well, i915.disable_power_well, int, 0400); 157 MODULE_PARM_DESC(disable_power_well, 158 "Disable display power wells when possible " 159 "(-1=auto [default], 0=power wells always on, 1=power wells disabled when possible)"); 160 161 module_param_named_unsafe(enable_ips, i915.enable_ips, int, 0600); 162 MODULE_PARM_DESC(enable_ips, "Enable IPS (default: true)"); 163 164 module_param_named(fastboot, i915.fastboot, bool, 0600); 165 MODULE_PARM_DESC(fastboot, 166 "Try to skip unnecessary mode sets at boot time (default: false)"); 167 168 module_param_named_unsafe(prefault_disable, i915.prefault_disable, bool, 0600); 169 MODULE_PARM_DESC(prefault_disable, 170 "Disable page prefaulting for pread/pwrite/reloc (default:false). " 171 "For developers only."); 172 173 module_param_named_unsafe(load_detect_test, i915.load_detect_test, bool, 0600); 174 MODULE_PARM_DESC(load_detect_test, 175 "Force-enable the VGA load detect code for testing (default:false). " 176 "For developers only."); 177 178 module_param_named_unsafe(force_reset_modeset_test, i915.force_reset_modeset_test, bool, 0600); 179 MODULE_PARM_DESC(force_reset_modeset_test, 180 "Force a modeset during gpu reset for testing (default:false). " 181 "For developers only."); 182 183 module_param_named_unsafe(invert_brightness, i915.invert_brightness, int, 0600); 184 TUNABLE_INT("drm.i915.panel_invert_brightness", &i915.invert_brightness); 185 MODULE_PARM_DESC(invert_brightness, 186 "Invert backlight brightness " 187 "(-1 force normal, 0 machine defaults, 1 force inversion), please " 188 "report PCI device ID, subsystem vendor and subsystem device ID " 189 "to dri-devel@lists.freedesktop.org, if your machine needs it. " 190 "It will then be included in an upcoming module version."); 191 192 module_param_named(disable_display, i915.disable_display, bool, 0400); 193 MODULE_PARM_DESC(disable_display, "Disable display (default: false)"); 194 195 module_param_named_unsafe(enable_cmd_parser, i915.enable_cmd_parser, int, 0600); 196 MODULE_PARM_DESC(enable_cmd_parser, 197 "Enable command parsing (1=enabled [default], 0=disabled)"); 198 199 module_param_named_unsafe(use_mmio_flip, i915.use_mmio_flip, int, 0600); 200 TUNABLE_INT("drm.i915.use_mmio_flip", &i915.use_mmio_flip); 201 MODULE_PARM_DESC(use_mmio_flip, 202 "use MMIO flips (-1=never, 0=driver discretion [default], 1=always)"); 203 204 module_param_named(mmio_debug, i915.mmio_debug, int, 0600); 205 MODULE_PARM_DESC(mmio_debug, 206 "Enable the MMIO debug code for the first N failures (default: off). " 207 "This may negatively affect performance."); 208 209 module_param_named(verbose_state_checks, i915.verbose_state_checks, bool, 0600); 210 MODULE_PARM_DESC(verbose_state_checks, 211 "Enable verbose logs (ie. WARN_ON()) in case of unexpected hw state conditions."); 212 213 module_param_named_unsafe(nuclear_pageflip, i915.nuclear_pageflip, bool, 0600); 214 MODULE_PARM_DESC(nuclear_pageflip, 215 "Force atomic modeset functionality; asynchronous mode is not yet supported. (default: false)."); 216 217 /* WA to get away with the default setting in VBT for early platforms.Will be removed */ 218 module_param_named_unsafe(edp_vswing, i915.edp_vswing, int, 0400); 219 MODULE_PARM_DESC(edp_vswing, 220 "Ignore/Override vswing pre-emph table selection from VBT " 221 "(0=use value from vbt [default], 1=low power swing(200mV)," 222 "2=default swing(400mV))"); 223 224 module_param_named_unsafe(enable_guc_loading, i915.enable_guc_loading, int, 0400); 225 MODULE_PARM_DESC(enable_guc_loading, 226 "Enable GuC firmware loading " 227 "(-1=auto, 0=never [default], 1=if available, 2=required)"); 228 229 module_param_named_unsafe(enable_guc_submission, i915.enable_guc_submission, int, 0400); 230 MODULE_PARM_DESC(enable_guc_submission, 231 "Enable GuC submission " 232 "(-1=auto, 0=never [default], 1=if available, 2=required)"); 233 234 module_param_named(guc_log_level, i915.guc_log_level, int, 0400); 235 MODULE_PARM_DESC(guc_log_level, 236 "GuC firmware logging level (-1:disabled (default), 0-3:enabled)"); 237 238 module_param_named_unsafe(enable_dp_mst, i915.enable_dp_mst, bool, 0600); 239 MODULE_PARM_DESC(enable_dp_mst, 240 "Enable multi-stream transport (MST) for new DisplayPort sinks. (default: true)"); 241 module_param_named_unsafe(inject_load_failure, i915.inject_load_failure, uint, 0400); 242 MODULE_PARM_DESC(inject_load_failure, 243 "Force an error after a number of failure check points (0:disabled (default), N:force failure at the Nth failure check point)"); 244 module_param_named(enable_dpcd_backlight, i915.enable_dpcd_backlight, bool, 0600); 245 MODULE_PARM_DESC(enable_dpcd_backlight, 246 "Enable support for DPCD backlight control (default:false)"); 247 248 module_param_named(enable_gvt, i915.enable_gvt, bool, 0400); 249 MODULE_PARM_DESC(enable_gvt, 250 "Enable support for Intel GVT-g graphics virtualization host support(default:false)"); 251