xref: /dflybsd-src/sys/dev/drm/i915/i915_gem_object.c (revision 3f2dd94a569761201b5b0a18b2f697f97fe1b9dc)
1*3f2dd94aSFrançois Tigeot /*
2*3f2dd94aSFrançois Tigeot  * Copyright © 2017 Intel Corporation
3*3f2dd94aSFrançois Tigeot  *
4*3f2dd94aSFrançois Tigeot  * Permission is hereby granted, free of charge, to any person obtaining a
5*3f2dd94aSFrançois Tigeot  * copy of this software and associated documentation files (the "Software"),
6*3f2dd94aSFrançois Tigeot  * to deal in the Software without restriction, including without limitation
7*3f2dd94aSFrançois Tigeot  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8*3f2dd94aSFrançois Tigeot  * and/or sell copies of the Software, and to permit persons to whom the
9*3f2dd94aSFrançois Tigeot  * Software is furnished to do so, subject to the following conditions:
10*3f2dd94aSFrançois Tigeot  *
11*3f2dd94aSFrançois Tigeot  * The above copyright notice and this permission notice (including the next
12*3f2dd94aSFrançois Tigeot  * paragraph) shall be included in all copies or substantial portions of the
13*3f2dd94aSFrançois Tigeot  * Software.
14*3f2dd94aSFrançois Tigeot  *
15*3f2dd94aSFrançois Tigeot  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16*3f2dd94aSFrançois Tigeot  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17*3f2dd94aSFrançois Tigeot  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
18*3f2dd94aSFrançois Tigeot  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19*3f2dd94aSFrançois Tigeot  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20*3f2dd94aSFrançois Tigeot  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21*3f2dd94aSFrançois Tigeot  * IN THE SOFTWARE.
22*3f2dd94aSFrançois Tigeot  *
23*3f2dd94aSFrançois Tigeot  */
24*3f2dd94aSFrançois Tigeot 
25*3f2dd94aSFrançois Tigeot #include "i915_drv.h"
26*3f2dd94aSFrançois Tigeot #include "i915_gem_object.h"
27*3f2dd94aSFrançois Tigeot 
28*3f2dd94aSFrançois Tigeot /**
29*3f2dd94aSFrançois Tigeot  * Mark up the object's coherency levels for a given cache_level
30*3f2dd94aSFrançois Tigeot  * @obj: #drm_i915_gem_object
31*3f2dd94aSFrançois Tigeot  * @cache_level: cache level
32*3f2dd94aSFrançois Tigeot  */
i915_gem_object_set_cache_coherency(struct drm_i915_gem_object * obj,unsigned int cache_level)33*3f2dd94aSFrançois Tigeot void i915_gem_object_set_cache_coherency(struct drm_i915_gem_object *obj,
34*3f2dd94aSFrançois Tigeot 					 unsigned int cache_level)
35*3f2dd94aSFrançois Tigeot {
36*3f2dd94aSFrançois Tigeot 	obj->cache_level = cache_level;
37*3f2dd94aSFrançois Tigeot 
38*3f2dd94aSFrançois Tigeot 	if (cache_level != I915_CACHE_NONE)
39*3f2dd94aSFrançois Tigeot 		obj->cache_coherent = (I915_BO_CACHE_COHERENT_FOR_READ |
40*3f2dd94aSFrançois Tigeot 				       I915_BO_CACHE_COHERENT_FOR_WRITE);
41*3f2dd94aSFrançois Tigeot 	else if (HAS_LLC(to_i915(obj->base.dev)))
42*3f2dd94aSFrançois Tigeot 		obj->cache_coherent = I915_BO_CACHE_COHERENT_FOR_READ;
43*3f2dd94aSFrançois Tigeot 	else
44*3f2dd94aSFrançois Tigeot 		obj->cache_coherent = 0;
45*3f2dd94aSFrançois Tigeot 
46*3f2dd94aSFrançois Tigeot 	obj->cache_dirty =
47*3f2dd94aSFrançois Tigeot 		!(obj->cache_coherent & I915_BO_CACHE_COHERENT_FOR_WRITE);
48*3f2dd94aSFrançois Tigeot }
49