1 /* 2 * Copyright © 1997-2003 by The XFree86 Project, Inc. 3 * Copyright © 2007 Dave Airlie 4 * Copyright © 2007-2008 Intel Corporation 5 * Jesse Barnes <jesse.barnes@intel.com> 6 * Copyright 2005-2006 Luc Verhaegen 7 * Copyright (c) 2001, Andy Ritger aritger@nvidia.com 8 * 9 * Permission is hereby granted, free of charge, to any person obtaining a 10 * copy of this software and associated documentation files (the "Software"), 11 * to deal in the Software without restriction, including without limitation 12 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 13 * and/or sell copies of the Software, and to permit persons to whom the 14 * Software is furnished to do so, subject to the following conditions: 15 * 16 * The above copyright notice and this permission notice shall be included in 17 * all copies or substantial portions of the Software. 18 * 19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 20 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 21 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 22 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 23 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 24 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 25 * OTHER DEALINGS IN THE SOFTWARE. 26 * 27 * Except as contained in this notice, the name of the copyright holder(s) 28 * and author(s) shall not be used in advertising or otherwise to promote 29 * the sale, use or other dealings in this Software without prior written 30 * authorization from the copyright holder(s) and author(s). 31 */ 32 33 #include <linux/list.h> 34 #include <linux/export.h> 35 #include <drm/drmP.h> 36 #include <drm/drm_crtc.h> 37 38 #define KHZ2PICOS(a) (1000000000UL/(a)) 39 40 /** 41 * drm_mode_debug_printmodeline - debug print a mode 42 * @dev: DRM device 43 * @mode: mode to print 44 * 45 * LOCKING: 46 * None. 47 * 48 * Describe @mode using DRM_DEBUG. 49 */ 50 void drm_mode_debug_printmodeline(const struct drm_display_mode *mode) 51 { 52 DRM_DEBUG_KMS("Modeline %d:\"%s\" %d %d %d %d %d %d %d %d %d %d " 53 "0x%x 0x%x\n", 54 mode->base.id, mode->name, mode->vrefresh, mode->clock, 55 mode->hdisplay, mode->hsync_start, 56 mode->hsync_end, mode->htotal, 57 mode->vdisplay, mode->vsync_start, 58 mode->vsync_end, mode->vtotal, mode->type, mode->flags); 59 } 60 EXPORT_SYMBOL(drm_mode_debug_printmodeline); 61 62 /** 63 * drm_cvt_mode -create a modeline based on CVT algorithm 64 * @dev: DRM device 65 * @hdisplay: hdisplay size 66 * @vdisplay: vdisplay size 67 * @vrefresh : vrefresh rate 68 * @reduced : Whether the GTF calculation is simplified 69 * @interlaced:Whether the interlace is supported 70 * 71 * LOCKING: 72 * none. 73 * 74 * return the modeline based on CVT algorithm 75 * 76 * This function is called to generate the modeline based on CVT algorithm 77 * according to the hdisplay, vdisplay, vrefresh. 78 * It is based from the VESA(TM) Coordinated Video Timing Generator by 79 * Graham Loveridge April 9, 2003 available at 80 * http://www.elo.utfsm.cl/~elo212/docs/CVTd6r1.xls 81 * 82 * And it is copied from xf86CVTmode in xserver/hw/xfree86/modes/xf86cvt.c. 83 * What I have done is to translate it by using integer calculation. 84 */ 85 #define HV_FACTOR 1000 86 struct drm_display_mode *drm_cvt_mode(struct drm_device *dev, int hdisplay, 87 int vdisplay, int vrefresh, 88 bool reduced, bool interlaced, bool margins) 89 { 90 /* 1) top/bottom margin size (% of height) - default: 1.8, */ 91 #define CVT_MARGIN_PERCENTAGE 18 92 /* 2) character cell horizontal granularity (pixels) - default 8 */ 93 #define CVT_H_GRANULARITY 8 94 /* 3) Minimum vertical porch (lines) - default 3 */ 95 #define CVT_MIN_V_PORCH 3 96 /* 4) Minimum number of vertical back porch lines - default 6 */ 97 #define CVT_MIN_V_BPORCH 6 98 /* Pixel Clock step (kHz) */ 99 #define CVT_CLOCK_STEP 250 100 struct drm_display_mode *drm_mode; 101 unsigned int vfieldrate, hperiod; 102 int hdisplay_rnd, hmargin, vdisplay_rnd, vmargin, vsync; 103 int interlace; 104 105 /* allocate the drm_display_mode structure. If failure, we will 106 * return directly 107 */ 108 drm_mode = drm_mode_create(dev); 109 if (!drm_mode) 110 return NULL; 111 112 /* the CVT default refresh rate is 60Hz */ 113 if (!vrefresh) 114 vrefresh = 60; 115 116 /* the required field fresh rate */ 117 if (interlaced) 118 vfieldrate = vrefresh * 2; 119 else 120 vfieldrate = vrefresh; 121 122 /* horizontal pixels */ 123 hdisplay_rnd = hdisplay - (hdisplay % CVT_H_GRANULARITY); 124 125 /* determine the left&right borders */ 126 hmargin = 0; 127 if (margins) { 128 hmargin = hdisplay_rnd * CVT_MARGIN_PERCENTAGE / 1000; 129 hmargin -= hmargin % CVT_H_GRANULARITY; 130 } 131 /* find the total active pixels */ 132 drm_mode->hdisplay = hdisplay_rnd + 2 * hmargin; 133 134 /* find the number of lines per field */ 135 if (interlaced) 136 vdisplay_rnd = vdisplay / 2; 137 else 138 vdisplay_rnd = vdisplay; 139 140 /* find the top & bottom borders */ 141 vmargin = 0; 142 if (margins) 143 vmargin = vdisplay_rnd * CVT_MARGIN_PERCENTAGE / 1000; 144 145 drm_mode->vdisplay = vdisplay + 2 * vmargin; 146 147 /* Interlaced */ 148 if (interlaced) 149 interlace = 1; 150 else 151 interlace = 0; 152 153 /* Determine VSync Width from aspect ratio */ 154 if (!(vdisplay % 3) && ((vdisplay * 4 / 3) == hdisplay)) 155 vsync = 4; 156 else if (!(vdisplay % 9) && ((vdisplay * 16 / 9) == hdisplay)) 157 vsync = 5; 158 else if (!(vdisplay % 10) && ((vdisplay * 16 / 10) == hdisplay)) 159 vsync = 6; 160 else if (!(vdisplay % 4) && ((vdisplay * 5 / 4) == hdisplay)) 161 vsync = 7; 162 else if (!(vdisplay % 9) && ((vdisplay * 15 / 9) == hdisplay)) 163 vsync = 7; 164 else /* custom */ 165 vsync = 10; 166 167 if (!reduced) { 168 /* simplify the GTF calculation */ 169 /* 4) Minimum time of vertical sync + back porch interval (µs) 170 * default 550.0 171 */ 172 int tmp1, tmp2; 173 #define CVT_MIN_VSYNC_BP 550 174 /* 3) Nominal HSync width (% of line period) - default 8 */ 175 #define CVT_HSYNC_PERCENTAGE 8 176 unsigned int hblank_percentage; 177 int vsyncandback_porch, vback_porch, hblank; 178 179 /* estimated the horizontal period */ 180 tmp1 = HV_FACTOR * 1000000 - 181 CVT_MIN_VSYNC_BP * HV_FACTOR * vfieldrate; 182 tmp2 = (vdisplay_rnd + 2 * vmargin + CVT_MIN_V_PORCH) * 2 + 183 interlace; 184 hperiod = tmp1 * 2 / (tmp2 * vfieldrate); 185 186 tmp1 = CVT_MIN_VSYNC_BP * HV_FACTOR / hperiod + 1; 187 /* 9. Find number of lines in sync + backporch */ 188 if (tmp1 < (vsync + CVT_MIN_V_PORCH)) 189 vsyncandback_porch = vsync + CVT_MIN_V_PORCH; 190 else 191 vsyncandback_porch = tmp1; 192 /* 10. Find number of lines in back porch */ 193 vback_porch = vsyncandback_porch - vsync; 194 drm_mode->vtotal = vdisplay_rnd + 2 * vmargin + 195 vsyncandback_porch + CVT_MIN_V_PORCH; 196 /* 5) Definition of Horizontal blanking time limitation */ 197 /* Gradient (%/kHz) - default 600 */ 198 #define CVT_M_FACTOR 600 199 /* Offset (%) - default 40 */ 200 #define CVT_C_FACTOR 40 201 /* Blanking time scaling factor - default 128 */ 202 #define CVT_K_FACTOR 128 203 /* Scaling factor weighting - default 20 */ 204 #define CVT_J_FACTOR 20 205 #define CVT_M_PRIME (CVT_M_FACTOR * CVT_K_FACTOR / 256) 206 #define CVT_C_PRIME ((CVT_C_FACTOR - CVT_J_FACTOR) * CVT_K_FACTOR / 256 + \ 207 CVT_J_FACTOR) 208 /* 12. Find ideal blanking duty cycle from formula */ 209 hblank_percentage = CVT_C_PRIME * HV_FACTOR - CVT_M_PRIME * 210 hperiod / 1000; 211 /* 13. Blanking time */ 212 if (hblank_percentage < 20 * HV_FACTOR) 213 hblank_percentage = 20 * HV_FACTOR; 214 hblank = drm_mode->hdisplay * hblank_percentage / 215 (100 * HV_FACTOR - hblank_percentage); 216 hblank -= hblank % (2 * CVT_H_GRANULARITY); 217 /* 14. find the total pixes per line */ 218 drm_mode->htotal = drm_mode->hdisplay + hblank; 219 drm_mode->hsync_end = drm_mode->hdisplay + hblank / 2; 220 drm_mode->hsync_start = drm_mode->hsync_end - 221 (drm_mode->htotal * CVT_HSYNC_PERCENTAGE) / 100; 222 drm_mode->hsync_start += CVT_H_GRANULARITY - 223 drm_mode->hsync_start % CVT_H_GRANULARITY; 224 /* fill the Vsync values */ 225 drm_mode->vsync_start = drm_mode->vdisplay + CVT_MIN_V_PORCH; 226 drm_mode->vsync_end = drm_mode->vsync_start + vsync; 227 } else { 228 /* Reduced blanking */ 229 /* Minimum vertical blanking interval time (µs)- default 460 */ 230 #define CVT_RB_MIN_VBLANK 460 231 /* Fixed number of clocks for horizontal sync */ 232 #define CVT_RB_H_SYNC 32 233 /* Fixed number of clocks for horizontal blanking */ 234 #define CVT_RB_H_BLANK 160 235 /* Fixed number of lines for vertical front porch - default 3*/ 236 #define CVT_RB_VFPORCH 3 237 int vbilines; 238 int tmp1, tmp2; 239 /* 8. Estimate Horizontal period. */ 240 tmp1 = HV_FACTOR * 1000000 - 241 CVT_RB_MIN_VBLANK * HV_FACTOR * vfieldrate; 242 tmp2 = vdisplay_rnd + 2 * vmargin; 243 hperiod = tmp1 / (tmp2 * vfieldrate); 244 /* 9. Find number of lines in vertical blanking */ 245 vbilines = CVT_RB_MIN_VBLANK * HV_FACTOR / hperiod + 1; 246 /* 10. Check if vertical blanking is sufficient */ 247 if (vbilines < (CVT_RB_VFPORCH + vsync + CVT_MIN_V_BPORCH)) 248 vbilines = CVT_RB_VFPORCH + vsync + CVT_MIN_V_BPORCH; 249 /* 11. Find total number of lines in vertical field */ 250 drm_mode->vtotal = vdisplay_rnd + 2 * vmargin + vbilines; 251 /* 12. Find total number of pixels in a line */ 252 drm_mode->htotal = drm_mode->hdisplay + CVT_RB_H_BLANK; 253 /* Fill in HSync values */ 254 drm_mode->hsync_end = drm_mode->hdisplay + CVT_RB_H_BLANK / 2; 255 drm_mode->hsync_start = drm_mode->hsync_end - CVT_RB_H_SYNC; 256 /* Fill in VSync values */ 257 drm_mode->vsync_start = drm_mode->vdisplay + CVT_RB_VFPORCH; 258 drm_mode->vsync_end = drm_mode->vsync_start + vsync; 259 } 260 /* 15/13. Find pixel clock frequency (kHz for xf86) */ 261 drm_mode->clock = drm_mode->htotal * HV_FACTOR * 1000 / hperiod; 262 drm_mode->clock -= drm_mode->clock % CVT_CLOCK_STEP; 263 /* 18/16. Find actual vertical frame frequency */ 264 /* ignore - just set the mode flag for interlaced */ 265 if (interlaced) { 266 drm_mode->vtotal *= 2; 267 drm_mode->flags |= DRM_MODE_FLAG_INTERLACE; 268 } 269 /* Fill the mode line name */ 270 drm_mode_set_name(drm_mode); 271 if (reduced) 272 drm_mode->flags |= (DRM_MODE_FLAG_PHSYNC | 273 DRM_MODE_FLAG_NVSYNC); 274 else 275 drm_mode->flags |= (DRM_MODE_FLAG_PVSYNC | 276 DRM_MODE_FLAG_NHSYNC); 277 278 return drm_mode; 279 } 280 EXPORT_SYMBOL(drm_cvt_mode); 281 282 /** 283 * drm_gtf_mode_complex - create the modeline based on full GTF algorithm 284 * 285 * @dev :drm device 286 * @hdisplay :hdisplay size 287 * @vdisplay :vdisplay size 288 * @vrefresh :vrefresh rate. 289 * @interlaced :whether the interlace is supported 290 * @margins :desired margin size 291 * @GTF_[MCKJ] :extended GTF formula parameters 292 * 293 * LOCKING. 294 * none. 295 * 296 * return the modeline based on full GTF algorithm. 297 * 298 * GTF feature blocks specify C and J in multiples of 0.5, so we pass them 299 * in here multiplied by two. For a C of 40, pass in 80. 300 */ 301 struct drm_display_mode * 302 drm_gtf_mode_complex(struct drm_device *dev, int hdisplay, int vdisplay, 303 int vrefresh, bool interlaced, int margins, 304 int GTF_M, int GTF_2C, int GTF_K, int GTF_2J) 305 { /* 1) top/bottom margin size (% of height) - default: 1.8, */ 306 #define GTF_MARGIN_PERCENTAGE 18 307 /* 2) character cell horizontal granularity (pixels) - default 8 */ 308 #define GTF_CELL_GRAN 8 309 /* 3) Minimum vertical porch (lines) - default 3 */ 310 #define GTF_MIN_V_PORCH 1 311 /* width of vsync in lines */ 312 #define V_SYNC_RQD 3 313 /* width of hsync as % of total line */ 314 #define H_SYNC_PERCENT 8 315 /* min time of vsync + back porch (microsec) */ 316 #define MIN_VSYNC_PLUS_BP 550 317 /* C' and M' are part of the Blanking Duty Cycle computation */ 318 #define GTF_C_PRIME ((((GTF_2C - GTF_2J) * GTF_K / 256) + GTF_2J) / 2) 319 #define GTF_M_PRIME (GTF_K * GTF_M / 256) 320 struct drm_display_mode *drm_mode; 321 unsigned int hdisplay_rnd, vdisplay_rnd, vfieldrate_rqd; 322 int top_margin, bottom_margin; 323 int interlace; 324 unsigned int hfreq_est; 325 int vsync_plus_bp, vback_porch; 326 unsigned int vtotal_lines, vfieldrate_est, hperiod; 327 unsigned int vfield_rate, vframe_rate; 328 int left_margin, right_margin; 329 unsigned int total_active_pixels, ideal_duty_cycle; 330 unsigned int hblank, total_pixels, pixel_freq; 331 int hsync, hfront_porch, vodd_front_porch_lines; 332 unsigned int tmp1, tmp2; 333 334 drm_mode = drm_mode_create(dev); 335 if (!drm_mode) 336 return NULL; 337 338 /* 1. In order to give correct results, the number of horizontal 339 * pixels requested is first processed to ensure that it is divisible 340 * by the character size, by rounding it to the nearest character 341 * cell boundary: 342 */ 343 hdisplay_rnd = (hdisplay + GTF_CELL_GRAN / 2) / GTF_CELL_GRAN; 344 hdisplay_rnd = hdisplay_rnd * GTF_CELL_GRAN; 345 346 /* 2. If interlace is requested, the number of vertical lines assumed 347 * by the calculation must be halved, as the computation calculates 348 * the number of vertical lines per field. 349 */ 350 if (interlaced) 351 vdisplay_rnd = vdisplay / 2; 352 else 353 vdisplay_rnd = vdisplay; 354 355 /* 3. Find the frame rate required: */ 356 if (interlaced) 357 vfieldrate_rqd = vrefresh * 2; 358 else 359 vfieldrate_rqd = vrefresh; 360 361 /* 4. Find number of lines in Top margin: */ 362 top_margin = 0; 363 if (margins) 364 top_margin = (vdisplay_rnd * GTF_MARGIN_PERCENTAGE + 500) / 365 1000; 366 /* 5. Find number of lines in bottom margin: */ 367 bottom_margin = top_margin; 368 369 /* 6. If interlace is required, then set variable interlace: */ 370 if (interlaced) 371 interlace = 1; 372 else 373 interlace = 0; 374 375 /* 7. Estimate the Horizontal frequency */ 376 { 377 tmp1 = (1000000 - MIN_VSYNC_PLUS_BP * vfieldrate_rqd) / 500; 378 tmp2 = (vdisplay_rnd + 2 * top_margin + GTF_MIN_V_PORCH) * 379 2 + interlace; 380 hfreq_est = (tmp2 * 1000 * vfieldrate_rqd) / tmp1; 381 } 382 383 /* 8. Find the number of lines in V sync + back porch */ 384 /* [V SYNC+BP] = RINT(([MIN VSYNC+BP] * hfreq_est / 1000000)) */ 385 vsync_plus_bp = MIN_VSYNC_PLUS_BP * hfreq_est / 1000; 386 vsync_plus_bp = (vsync_plus_bp + 500) / 1000; 387 /* 9. Find the number of lines in V back porch alone: */ 388 vback_porch = vsync_plus_bp - V_SYNC_RQD; 389 /* 10. Find the total number of lines in Vertical field period: */ 390 vtotal_lines = vdisplay_rnd + top_margin + bottom_margin + 391 vsync_plus_bp + GTF_MIN_V_PORCH; 392 /* 11. Estimate the Vertical field frequency: */ 393 vfieldrate_est = hfreq_est / vtotal_lines; 394 /* 12. Find the actual horizontal period: */ 395 hperiod = 1000000 / (vfieldrate_rqd * vtotal_lines); 396 397 /* 13. Find the actual Vertical field frequency: */ 398 vfield_rate = hfreq_est / vtotal_lines; 399 /* 14. Find the Vertical frame frequency: */ 400 if (interlaced) 401 vframe_rate = vfield_rate / 2; 402 else 403 vframe_rate = vfield_rate; 404 /* 15. Find number of pixels in left margin: */ 405 if (margins) 406 left_margin = (hdisplay_rnd * GTF_MARGIN_PERCENTAGE + 500) / 407 1000; 408 else 409 left_margin = 0; 410 411 /* 16.Find number of pixels in right margin: */ 412 right_margin = left_margin; 413 /* 17.Find total number of active pixels in image and left and right */ 414 total_active_pixels = hdisplay_rnd + left_margin + right_margin; 415 /* 18.Find the ideal blanking duty cycle from blanking duty cycle */ 416 ideal_duty_cycle = GTF_C_PRIME * 1000 - 417 (GTF_M_PRIME * 1000000 / hfreq_est); 418 /* 19.Find the number of pixels in the blanking time to the nearest 419 * double character cell: */ 420 hblank = total_active_pixels * ideal_duty_cycle / 421 (100000 - ideal_duty_cycle); 422 hblank = (hblank + GTF_CELL_GRAN) / (2 * GTF_CELL_GRAN); 423 hblank = hblank * 2 * GTF_CELL_GRAN; 424 /* 20.Find total number of pixels: */ 425 total_pixels = total_active_pixels + hblank; 426 /* 21.Find pixel clock frequency: */ 427 pixel_freq = total_pixels * hfreq_est / 1000; 428 /* Stage 1 computations are now complete; I should really pass 429 * the results to another function and do the Stage 2 computations, 430 * but I only need a few more values so I'll just append the 431 * computations here for now */ 432 /* 17. Find the number of pixels in the horizontal sync period: */ 433 hsync = H_SYNC_PERCENT * total_pixels / 100; 434 hsync = (hsync + GTF_CELL_GRAN / 2) / GTF_CELL_GRAN; 435 hsync = hsync * GTF_CELL_GRAN; 436 /* 18. Find the number of pixels in horizontal front porch period */ 437 hfront_porch = hblank / 2 - hsync; 438 /* 36. Find the number of lines in the odd front porch period: */ 439 vodd_front_porch_lines = GTF_MIN_V_PORCH ; 440 441 /* finally, pack the results in the mode struct */ 442 drm_mode->hdisplay = hdisplay_rnd; 443 drm_mode->hsync_start = hdisplay_rnd + hfront_porch; 444 drm_mode->hsync_end = drm_mode->hsync_start + hsync; 445 drm_mode->htotal = total_pixels; 446 drm_mode->vdisplay = vdisplay_rnd; 447 drm_mode->vsync_start = vdisplay_rnd + vodd_front_porch_lines; 448 drm_mode->vsync_end = drm_mode->vsync_start + V_SYNC_RQD; 449 drm_mode->vtotal = vtotal_lines; 450 451 drm_mode->clock = pixel_freq; 452 453 if (interlaced) { 454 drm_mode->vtotal *= 2; 455 drm_mode->flags |= DRM_MODE_FLAG_INTERLACE; 456 } 457 458 drm_mode_set_name(drm_mode); 459 if (GTF_M == 600 && GTF_2C == 80 && GTF_K == 128 && GTF_2J == 40) 460 drm_mode->flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC; 461 else 462 drm_mode->flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC; 463 464 return drm_mode; 465 } 466 EXPORT_SYMBOL(drm_gtf_mode_complex); 467 468 /** 469 * drm_gtf_mode - create the modeline based on GTF algorithm 470 * 471 * @dev :drm device 472 * @hdisplay :hdisplay size 473 * @vdisplay :vdisplay size 474 * @vrefresh :vrefresh rate. 475 * @interlaced :whether the interlace is supported 476 * @margins :whether the margin is supported 477 * 478 * LOCKING. 479 * none. 480 * 481 * return the modeline based on GTF algorithm 482 * 483 * This function is to create the modeline based on the GTF algorithm. 484 * Generalized Timing Formula is derived from: 485 * GTF Spreadsheet by Andy Morrish (1/5/97) 486 * available at http://www.vesa.org 487 * 488 * And it is copied from the file of xserver/hw/xfree86/modes/xf86gtf.c. 489 * What I have done is to translate it by using integer calculation. 490 * I also refer to the function of fb_get_mode in the file of 491 * drivers/video/fbmon.c 492 * 493 * Standard GTF parameters: 494 * M = 600 495 * C = 40 496 * K = 128 497 * J = 20 498 */ 499 struct drm_display_mode * 500 drm_gtf_mode(struct drm_device *dev, int hdisplay, int vdisplay, int vrefresh, 501 bool lace, int margins) 502 { 503 return drm_gtf_mode_complex(dev, hdisplay, vdisplay, vrefresh, lace, 504 margins, 600, 40 * 2, 128, 20 * 2); 505 } 506 EXPORT_SYMBOL(drm_gtf_mode); 507 508 #if 0 509 #if IS_ENABLED(CONFIG_VIDEOMODE) 510 int drm_display_mode_from_videomode(const struct videomode *vm, 511 struct drm_display_mode *dmode) 512 { 513 dmode->hdisplay = vm->hactive; 514 dmode->hsync_start = dmode->hdisplay + vm->hfront_porch; 515 dmode->hsync_end = dmode->hsync_start + vm->hsync_len; 516 dmode->htotal = dmode->hsync_end + vm->hback_porch; 517 518 dmode->vdisplay = vm->vactive; 519 dmode->vsync_start = dmode->vdisplay + vm->vfront_porch; 520 dmode->vsync_end = dmode->vsync_start + vm->vsync_len; 521 dmode->vtotal = dmode->vsync_end + vm->vback_porch; 522 523 dmode->clock = vm->pixelclock / 1000; 524 525 dmode->flags = 0; 526 if (vm->dmt_flags & VESA_DMT_HSYNC_HIGH) 527 dmode->flags |= DRM_MODE_FLAG_PHSYNC; 528 else if (vm->dmt_flags & VESA_DMT_HSYNC_LOW) 529 dmode->flags |= DRM_MODE_FLAG_NHSYNC; 530 if (vm->dmt_flags & VESA_DMT_VSYNC_HIGH) 531 dmode->flags |= DRM_MODE_FLAG_PVSYNC; 532 else if (vm->dmt_flags & VESA_DMT_VSYNC_LOW) 533 dmode->flags |= DRM_MODE_FLAG_NVSYNC; 534 if (vm->data_flags & DISPLAY_FLAGS_INTERLACED) 535 dmode->flags |= DRM_MODE_FLAG_INTERLACE; 536 if (vm->data_flags & DISPLAY_FLAGS_DOUBLESCAN) 537 dmode->flags |= DRM_MODE_FLAG_DBLSCAN; 538 drm_mode_set_name(dmode); 539 540 return 0; 541 } 542 #endif 543 544 #if IS_ENABLED(CONFIG_OF_VIDEOMODE) 545 /** 546 * of_get_drm_display_mode - get a drm_display_mode from devicetree 547 * @np: device_node with the timing specification 548 * @dmode: will be set to the return value 549 * @index: index into the list of display timings in devicetree 550 * 551 * This function is expensive and should only be used, if only one mode is to be 552 * read from DT. To get multiple modes start with of_get_display_timings and 553 * work with that instead. 554 */ 555 int of_get_drm_display_mode(struct device_node *np, 556 struct drm_display_mode *dmode, int index) 557 { 558 struct videomode vm; 559 int ret; 560 561 ret = of_get_videomode(np, &vm, index); 562 if (ret) 563 return ret; 564 565 drm_display_mode_from_videomode(&vm, dmode); 566 567 pr_debug("%s: got %dx%d display mode from %s\n", 568 of_node_full_name(np), vm.hactive, vm.vactive, np->name); 569 drm_mode_debug_printmodeline(dmode); 570 571 return 0; 572 } 573 #endif 574 #endif 575 576 /** 577 * drm_mode_set_name - set the name on a mode 578 * @mode: name will be set in this mode 579 * 580 * LOCKING: 581 * None. 582 * 583 * Set the name of @mode to a standard format. 584 */ 585 void drm_mode_set_name(struct drm_display_mode *mode) 586 { 587 bool interlaced = !!(mode->flags & DRM_MODE_FLAG_INTERLACE); 588 589 ksnprintf(mode->name, DRM_DISPLAY_MODE_LEN, "%dx%d%s", 590 mode->hdisplay, mode->vdisplay, 591 interlaced ? "i" : ""); 592 } 593 EXPORT_SYMBOL(drm_mode_set_name); 594 595 /** 596 * drm_mode_list_concat - move modes from one list to another 597 * @head: source list 598 * @new: dst list 599 * 600 * LOCKING: 601 * Caller must ensure both lists are locked. 602 * 603 * Move all the modes from @head to @new. 604 */ 605 void drm_mode_list_concat(struct list_head *head, struct list_head *new) 606 { 607 608 struct list_head *entry, *tmp; 609 610 list_for_each_safe(entry, tmp, head) { 611 list_move_tail(entry, new); 612 } 613 } 614 EXPORT_SYMBOL(drm_mode_list_concat); 615 616 /** 617 * drm_mode_width - get the width of a mode 618 * @mode: mode 619 * 620 * LOCKING: 621 * None. 622 * 623 * Return @mode's width (hdisplay) value. 624 * 625 * FIXME: is this needed? 626 * 627 * RETURNS: 628 * @mode->hdisplay 629 */ 630 int drm_mode_width(const struct drm_display_mode *mode) 631 { 632 return mode->hdisplay; 633 634 } 635 EXPORT_SYMBOL(drm_mode_width); 636 637 /** 638 * drm_mode_height - get the height of a mode 639 * @mode: mode 640 * 641 * LOCKING: 642 * None. 643 * 644 * Return @mode's height (vdisplay) value. 645 * 646 * FIXME: is this needed? 647 * 648 * RETURNS: 649 * @mode->vdisplay 650 */ 651 int drm_mode_height(const struct drm_display_mode *mode) 652 { 653 return mode->vdisplay; 654 } 655 EXPORT_SYMBOL(drm_mode_height); 656 657 /** drm_mode_hsync - get the hsync of a mode 658 * @mode: mode 659 * 660 * LOCKING: 661 * None. 662 * 663 * Return @modes's hsync rate in kHz, rounded to the nearest int. 664 */ 665 int drm_mode_hsync(const struct drm_display_mode *mode) 666 { 667 unsigned int calc_val; 668 669 if (mode->hsync) 670 return mode->hsync; 671 672 if (mode->htotal < 0) 673 return 0; 674 675 calc_val = (mode->clock * 1000) / mode->htotal; /* hsync in Hz */ 676 calc_val += 500; /* round to 1000Hz */ 677 calc_val /= 1000; /* truncate to kHz */ 678 679 return calc_val; 680 } 681 EXPORT_SYMBOL(drm_mode_hsync); 682 683 /** 684 * drm_mode_vrefresh - get the vrefresh of a mode 685 * @mode: mode 686 * 687 * LOCKING: 688 * None. 689 * 690 * Return @mode's vrefresh rate in Hz or calculate it if necessary. 691 * 692 * FIXME: why is this needed? shouldn't vrefresh be set already? 693 * 694 * RETURNS: 695 * Vertical refresh rate. It will be the result of actual value plus 0.5. 696 * If it is 70.288, it will return 70Hz. 697 * If it is 59.6, it will return 60Hz. 698 */ 699 int drm_mode_vrefresh(const struct drm_display_mode *mode) 700 { 701 int refresh = 0; 702 unsigned int calc_val; 703 704 if (mode->vrefresh > 0) 705 refresh = mode->vrefresh; 706 else if (mode->htotal > 0 && mode->vtotal > 0) { 707 int vtotal; 708 vtotal = mode->vtotal; 709 /* work out vrefresh the value will be x1000 */ 710 calc_val = (mode->clock * 1000); 711 calc_val /= mode->htotal; 712 refresh = (calc_val + vtotal / 2) / vtotal; 713 714 if (mode->flags & DRM_MODE_FLAG_INTERLACE) 715 refresh *= 2; 716 if (mode->flags & DRM_MODE_FLAG_DBLSCAN) 717 refresh /= 2; 718 if (mode->vscan > 1) 719 refresh /= mode->vscan; 720 } 721 return refresh; 722 } 723 EXPORT_SYMBOL(drm_mode_vrefresh); 724 725 /** 726 * drm_mode_set_crtcinfo - set CRTC modesetting parameters 727 * @p: mode 728 * @adjust_flags: unused? (FIXME) 729 * 730 * LOCKING: 731 * None. 732 * 733 * Setup the CRTC modesetting parameters for @p, adjusting if necessary. 734 */ 735 void drm_mode_set_crtcinfo(struct drm_display_mode *p, int adjust_flags) 736 { 737 if ((p == NULL) || ((p->type & DRM_MODE_TYPE_CRTC_C) == DRM_MODE_TYPE_BUILTIN)) 738 return; 739 740 p->crtc_hdisplay = p->hdisplay; 741 p->crtc_hsync_start = p->hsync_start; 742 p->crtc_hsync_end = p->hsync_end; 743 p->crtc_htotal = p->htotal; 744 p->crtc_hskew = p->hskew; 745 p->crtc_vdisplay = p->vdisplay; 746 p->crtc_vsync_start = p->vsync_start; 747 p->crtc_vsync_end = p->vsync_end; 748 p->crtc_vtotal = p->vtotal; 749 750 if (p->flags & DRM_MODE_FLAG_INTERLACE) { 751 if (adjust_flags & CRTC_INTERLACE_HALVE_V) { 752 p->crtc_vdisplay /= 2; 753 p->crtc_vsync_start /= 2; 754 p->crtc_vsync_end /= 2; 755 p->crtc_vtotal /= 2; 756 } 757 } 758 759 if (p->flags & DRM_MODE_FLAG_DBLSCAN) { 760 p->crtc_vdisplay *= 2; 761 p->crtc_vsync_start *= 2; 762 p->crtc_vsync_end *= 2; 763 p->crtc_vtotal *= 2; 764 } 765 766 if (p->vscan > 1) { 767 p->crtc_vdisplay *= p->vscan; 768 p->crtc_vsync_start *= p->vscan; 769 p->crtc_vsync_end *= p->vscan; 770 p->crtc_vtotal *= p->vscan; 771 } 772 773 p->crtc_vblank_start = min(p->crtc_vsync_start, p->crtc_vdisplay); 774 p->crtc_vblank_end = max(p->crtc_vsync_end, p->crtc_vtotal); 775 p->crtc_hblank_start = min(p->crtc_hsync_start, p->crtc_hdisplay); 776 p->crtc_hblank_end = max(p->crtc_hsync_end, p->crtc_htotal); 777 } 778 EXPORT_SYMBOL(drm_mode_set_crtcinfo); 779 780 781 /** 782 * drm_mode_copy - copy the mode 783 * @dst: mode to overwrite 784 * @src: mode to copy 785 * 786 * LOCKING: 787 * None. 788 * 789 * Copy an existing mode into another mode, preserving the object id 790 * of the destination mode. 791 */ 792 void drm_mode_copy(struct drm_display_mode *dst, const struct drm_display_mode *src) 793 { 794 int id = dst->base.id; 795 796 *dst = *src; 797 dst->base.id = id; 798 INIT_LIST_HEAD(&dst->head); 799 } 800 EXPORT_SYMBOL(drm_mode_copy); 801 802 /** 803 * drm_mode_duplicate - allocate and duplicate an existing mode 804 * @m: mode to duplicate 805 * 806 * LOCKING: 807 * None. 808 * 809 * Just allocate a new mode, copy the existing mode into it, and return 810 * a pointer to it. Used to create new instances of established modes. 811 */ 812 struct drm_display_mode *drm_mode_duplicate(struct drm_device *dev, 813 const struct drm_display_mode *mode) 814 { 815 struct drm_display_mode *nmode; 816 817 nmode = drm_mode_create(dev); 818 if (!nmode) 819 return NULL; 820 821 drm_mode_copy(nmode, mode); 822 823 return nmode; 824 } 825 EXPORT_SYMBOL(drm_mode_duplicate); 826 827 /** 828 * drm_mode_equal - test modes for equality 829 * @mode1: first mode 830 * @mode2: second mode 831 * 832 * LOCKING: 833 * None. 834 * 835 * Check to see if @mode1 and @mode2 are equivalent. 836 * 837 * RETURNS: 838 * True if the modes are equal, false otherwise. 839 */ 840 bool drm_mode_equal(const struct drm_display_mode *mode1, const struct drm_display_mode *mode2) 841 { 842 /* do clock check convert to PICOS so fb modes get matched 843 * the same */ 844 if (mode1->clock && mode2->clock) { 845 if (KHZ2PICOS(mode1->clock) != KHZ2PICOS(mode2->clock)) 846 return false; 847 } else if (mode1->clock != mode2->clock) 848 return false; 849 850 if (mode1->hdisplay == mode2->hdisplay && 851 mode1->hsync_start == mode2->hsync_start && 852 mode1->hsync_end == mode2->hsync_end && 853 mode1->htotal == mode2->htotal && 854 mode1->hskew == mode2->hskew && 855 mode1->vdisplay == mode2->vdisplay && 856 mode1->vsync_start == mode2->vsync_start && 857 mode1->vsync_end == mode2->vsync_end && 858 mode1->vtotal == mode2->vtotal && 859 mode1->vscan == mode2->vscan && 860 mode1->flags == mode2->flags) 861 return true; 862 863 return false; 864 } 865 EXPORT_SYMBOL(drm_mode_equal); 866 867 /** 868 * drm_mode_validate_size - make sure modes adhere to size constraints 869 * @dev: DRM device 870 * @mode_list: list of modes to check 871 * @maxX: maximum width 872 * @maxY: maximum height 873 * @maxPitch: max pitch 874 * 875 * LOCKING: 876 * Caller must hold a lock protecting @mode_list. 877 * 878 * The DRM device (@dev) has size and pitch limits. Here we validate the 879 * modes we probed for @dev against those limits and set their status as 880 * necessary. 881 */ 882 void drm_mode_validate_size(struct drm_device *dev, 883 struct list_head *mode_list, 884 int maxX, int maxY, int maxPitch) 885 { 886 struct drm_display_mode *mode; 887 888 list_for_each_entry(mode, mode_list, head) { 889 if (maxPitch > 0 && mode->hdisplay > maxPitch) 890 mode->status = MODE_BAD_WIDTH; 891 892 if (maxX > 0 && mode->hdisplay > maxX) 893 mode->status = MODE_VIRTUAL_X; 894 895 if (maxY > 0 && mode->vdisplay > maxY) 896 mode->status = MODE_VIRTUAL_Y; 897 } 898 } 899 EXPORT_SYMBOL(drm_mode_validate_size); 900 901 /** 902 * drm_mode_validate_clocks - validate modes against clock limits 903 * @dev: DRM device 904 * @mode_list: list of modes to check 905 * @min: minimum clock rate array 906 * @max: maximum clock rate array 907 * @n_ranges: number of clock ranges (size of arrays) 908 * 909 * LOCKING: 910 * Caller must hold a lock protecting @mode_list. 911 * 912 * Some code may need to check a mode list against the clock limits of the 913 * device in question. This function walks the mode list, testing to make 914 * sure each mode falls within a given range (defined by @min and @max 915 * arrays) and sets @mode->status as needed. 916 */ 917 void drm_mode_validate_clocks(struct drm_device *dev, 918 struct list_head *mode_list, 919 int *min, int *max, int n_ranges) 920 { 921 struct drm_display_mode *mode; 922 int i; 923 924 list_for_each_entry(mode, mode_list, head) { 925 bool good = false; 926 for (i = 0; i < n_ranges; i++) { 927 if (mode->clock >= min[i] && mode->clock <= max[i]) { 928 good = true; 929 break; 930 } 931 } 932 if (!good) 933 mode->status = MODE_CLOCK_RANGE; 934 } 935 } 936 EXPORT_SYMBOL(drm_mode_validate_clocks); 937 938 /** 939 * drm_mode_prune_invalid - remove invalid modes from mode list 940 * @dev: DRM device 941 * @mode_list: list of modes to check 942 * @verbose: be verbose about it 943 * 944 * LOCKING: 945 * Caller must hold a lock protecting @mode_list. 946 * 947 * Once mode list generation is complete, a caller can use this routine to 948 * remove invalid modes from a mode list. If any of the modes have a 949 * status other than %MODE_OK, they are removed from @mode_list and freed. 950 */ 951 void drm_mode_prune_invalid(struct drm_device *dev, 952 struct list_head *mode_list, bool verbose) 953 { 954 struct drm_display_mode *mode, *t; 955 956 list_for_each_entry_safe(mode, t, mode_list, head) { 957 if (mode->status != MODE_OK) { 958 list_del(&mode->head); 959 if (verbose) { 960 drm_mode_debug_printmodeline(mode); 961 DRM_DEBUG_KMS("Not using %s mode %d\n", 962 mode->name, mode->status); 963 } 964 drm_mode_destroy(dev, mode); 965 } 966 } 967 } 968 EXPORT_SYMBOL(drm_mode_prune_invalid); 969 970 /** 971 * drm_mode_compare - compare modes for favorability 972 * @priv: unused 973 * @lh_a: list_head for first mode 974 * @lh_b: list_head for second mode 975 * 976 * LOCKING: 977 * None. 978 * 979 * Compare two modes, given by @lh_a and @lh_b, returning a value indicating 980 * which is better. 981 * 982 * RETURNS: 983 * Negative if @lh_a is better than @lh_b, zero if they're equivalent, or 984 * positive if @lh_b is better than @lh_a. 985 */ 986 static int drm_mode_compare(void *priv, struct list_head *lh_a, struct list_head *lh_b) 987 { 988 struct drm_display_mode *a = list_entry(lh_a, struct drm_display_mode, head); 989 struct drm_display_mode *b = list_entry(lh_b, struct drm_display_mode, head); 990 int diff; 991 992 diff = ((b->type & DRM_MODE_TYPE_PREFERRED) != 0) - 993 ((a->type & DRM_MODE_TYPE_PREFERRED) != 0); 994 if (diff) 995 return diff; 996 diff = b->hdisplay * b->vdisplay - a->hdisplay * a->vdisplay; 997 if (diff) 998 return diff; 999 diff = b->clock - a->clock; 1000 return diff; 1001 } 1002 1003 /** 1004 * drm_mode_sort - sort mode list 1005 * @mode_list: list to sort 1006 * 1007 * LOCKING: 1008 * Caller must hold a lock protecting @mode_list. 1009 * 1010 * Sort @mode_list by favorability, putting good modes first. 1011 */ 1012 void drm_mode_sort(struct list_head *mode_list) 1013 { 1014 drm_list_sort(NULL, mode_list, drm_mode_compare); 1015 } 1016 EXPORT_SYMBOL(drm_mode_sort); 1017 1018 /** 1019 * drm_mode_connector_list_update - update the mode list for the connector 1020 * @connector: the connector to update 1021 * 1022 * LOCKING: 1023 * Caller must hold a lock protecting @mode_list. 1024 * 1025 * This moves the modes from the @connector probed_modes list 1026 * to the actual mode list. It compares the probed mode against the current 1027 * list and only adds different modes. All modes unverified after this point 1028 * will be removed by the prune invalid modes. 1029 */ 1030 void drm_mode_connector_list_update(struct drm_connector *connector) 1031 { 1032 struct drm_display_mode *mode; 1033 struct drm_display_mode *pmode, *pt; 1034 int found_it; 1035 1036 list_for_each_entry_safe(pmode, pt, &connector->probed_modes, 1037 head) { 1038 found_it = 0; 1039 /* go through current modes checking for the new probed mode */ 1040 list_for_each_entry(mode, &connector->modes, head) { 1041 if (drm_mode_equal(pmode, mode)) { 1042 found_it = 1; 1043 /* if equal delete the probed mode */ 1044 mode->status = pmode->status; 1045 /* Merge type bits together */ 1046 mode->type |= pmode->type; 1047 list_del(&pmode->head); 1048 drm_mode_destroy(connector->dev, pmode); 1049 break; 1050 } 1051 } 1052 1053 if (!found_it) { 1054 list_move_tail(&pmode->head, &connector->modes); 1055 } 1056 } 1057 } 1058 EXPORT_SYMBOL(drm_mode_connector_list_update); 1059 1060 /** 1061 * drm_mode_parse_command_line_for_connector - parse command line for connector 1062 * @mode_option - per connector mode option 1063 * @connector - connector to parse line for 1064 * 1065 * This parses the connector specific then generic command lines for 1066 * modes and options to configure the connector. 1067 * 1068 * This uses the same parameters as the fb modedb.c, except for extra 1069 * <xres>x<yres>[M][R][-<bpp>][@<refresh>][i][m][eDd] 1070 * 1071 * enable/enable Digital/disable bit at the end 1072 */ 1073 bool drm_mode_parse_command_line_for_connector(const char *mode_option, 1074 struct drm_connector *connector, 1075 struct drm_cmdline_mode *mode) 1076 { 1077 const char *name; 1078 unsigned int namelen; 1079 bool res_specified = false, bpp_specified = false, refresh_specified = false; 1080 unsigned int xres = 0, yres = 0, bpp = 32, refresh = 0; 1081 bool yres_specified = false, cvt = false, rb = false; 1082 bool interlace = false, margins = false, was_digit = false; 1083 int i; 1084 enum drm_connector_force force = DRM_FORCE_UNSPECIFIED; 1085 1086 #ifdef CONFIG_FB 1087 if (!mode_option) 1088 mode_option = fb_mode_option; 1089 #endif 1090 1091 if (!mode_option) { 1092 mode->specified = false; 1093 return false; 1094 } 1095 1096 name = mode_option; 1097 namelen = strlen(name); 1098 for (i = namelen-1; i >= 0; i--) { 1099 switch (name[i]) { 1100 case '@': 1101 if (!refresh_specified && !bpp_specified && 1102 !yres_specified && !cvt && !rb && was_digit) { 1103 refresh = simple_strtol(&name[i+1], NULL, 10); 1104 refresh_specified = true; 1105 was_digit = false; 1106 } else 1107 goto done; 1108 break; 1109 case '-': 1110 if (!bpp_specified && !yres_specified && !cvt && 1111 !rb && was_digit) { 1112 bpp = simple_strtol(&name[i+1], NULL, 10); 1113 bpp_specified = true; 1114 was_digit = false; 1115 } else 1116 goto done; 1117 break; 1118 case 'x': 1119 if (!yres_specified && was_digit) { 1120 yres = simple_strtol(&name[i+1], NULL, 10); 1121 yres_specified = true; 1122 was_digit = false; 1123 } else 1124 goto done; 1125 case '0' ... '9': 1126 was_digit = true; 1127 break; 1128 case 'M': 1129 if (yres_specified || cvt || was_digit) 1130 goto done; 1131 cvt = true; 1132 break; 1133 case 'R': 1134 if (yres_specified || cvt || rb || was_digit) 1135 goto done; 1136 rb = true; 1137 break; 1138 case 'm': 1139 if (cvt || yres_specified || was_digit) 1140 goto done; 1141 margins = true; 1142 break; 1143 case 'i': 1144 if (cvt || yres_specified || was_digit) 1145 goto done; 1146 interlace = true; 1147 break; 1148 case 'e': 1149 if (yres_specified || bpp_specified || refresh_specified || 1150 was_digit || (force != DRM_FORCE_UNSPECIFIED)) 1151 goto done; 1152 1153 force = DRM_FORCE_ON; 1154 break; 1155 case 'D': 1156 if (yres_specified || bpp_specified || refresh_specified || 1157 was_digit || (force != DRM_FORCE_UNSPECIFIED)) 1158 goto done; 1159 1160 if ((connector->connector_type != DRM_MODE_CONNECTOR_DVII) && 1161 (connector->connector_type != DRM_MODE_CONNECTOR_HDMIB)) 1162 force = DRM_FORCE_ON; 1163 else 1164 force = DRM_FORCE_ON_DIGITAL; 1165 break; 1166 case 'd': 1167 if (yres_specified || bpp_specified || refresh_specified || 1168 was_digit || (force != DRM_FORCE_UNSPECIFIED)) 1169 goto done; 1170 1171 force = DRM_FORCE_OFF; 1172 break; 1173 default: 1174 goto done; 1175 } 1176 } 1177 1178 if (i < 0 && yres_specified) { 1179 char *ch; 1180 xres = simple_strtol(name, &ch, 10); 1181 if ((ch != NULL) && (*ch == 'x')) 1182 res_specified = true; 1183 else 1184 i = ch - name; 1185 } else if (!yres_specified && was_digit) { 1186 /* catch mode that begins with digits but has no 'x' */ 1187 i = 0; 1188 } 1189 done: 1190 if (i >= 0) { 1191 printk(KERN_WARNING 1192 "parse error at position %i in video mode '%s'\n", 1193 i, name); 1194 mode->specified = false; 1195 return false; 1196 } 1197 1198 if (res_specified) { 1199 mode->specified = true; 1200 mode->xres = xres; 1201 mode->yres = yres; 1202 } 1203 1204 if (refresh_specified) { 1205 mode->refresh_specified = true; 1206 mode->refresh = refresh; 1207 } 1208 1209 if (bpp_specified) { 1210 mode->bpp_specified = true; 1211 mode->bpp = bpp; 1212 } 1213 mode->rb = rb; 1214 mode->cvt = cvt; 1215 mode->interlace = interlace; 1216 mode->margins = margins; 1217 mode->force = force; 1218 1219 return true; 1220 } 1221 EXPORT_SYMBOL(drm_mode_parse_command_line_for_connector); 1222 1223 struct drm_display_mode * 1224 drm_mode_create_from_cmdline_mode(struct drm_device *dev, 1225 struct drm_cmdline_mode *cmd) 1226 { 1227 struct drm_display_mode *mode; 1228 1229 if (cmd->cvt) 1230 mode = drm_cvt_mode(dev, 1231 cmd->xres, cmd->yres, 1232 cmd->refresh_specified ? cmd->refresh : 60, 1233 cmd->rb, cmd->interlace, 1234 cmd->margins); 1235 else 1236 mode = drm_gtf_mode(dev, 1237 cmd->xres, cmd->yres, 1238 cmd->refresh_specified ? cmd->refresh : 60, 1239 cmd->interlace, 1240 cmd->margins); 1241 if (!mode) 1242 return NULL; 1243 1244 drm_mode_set_crtcinfo(mode, CRTC_INTERLACE_HALVE_V); 1245 return mode; 1246 } 1247 EXPORT_SYMBOL(drm_mode_create_from_cmdline_mode); 1248