1 /* 2 * Copyright © 1997-2003 by The XFree86 Project, Inc. 3 * Copyright © 2007 Dave Airlie 4 * Copyright © 2007-2008 Intel Corporation 5 * Jesse Barnes <jesse.barnes@intel.com> 6 * Copyright 2005-2006 Luc Verhaegen 7 * Copyright (c) 2001, Andy Ritger aritger@nvidia.com 8 * 9 * Permission is hereby granted, free of charge, to any person obtaining a 10 * copy of this software and associated documentation files (the "Software"), 11 * to deal in the Software without restriction, including without limitation 12 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 13 * and/or sell copies of the Software, and to permit persons to whom the 14 * Software is furnished to do so, subject to the following conditions: 15 * 16 * The above copyright notice and this permission notice shall be included in 17 * all copies or substantial portions of the Software. 18 * 19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 20 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 21 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 22 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 23 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 24 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 25 * OTHER DEALINGS IN THE SOFTWARE. 26 * 27 * Except as contained in this notice, the name of the copyright holder(s) 28 * and author(s) shall not be used in advertising or otherwise to promote 29 * the sale, use or other dealings in this Software without prior written 30 * authorization from the copyright holder(s) and author(s). 31 * 32 * $FreeBSD: src/sys/dev/drm2/drm_modes.c,v 1.1 2012/05/22 11:07:44 kib Exp $ 33 */ 34 35 #include <linux/export.h> 36 #include <drm/drmP.h> 37 #include <drm/drm_crtc.h> 38 39 #define KHZ2PICOS(a) (1000000000UL/(a)) 40 41 /** 42 * drm_mode_debug_printmodeline - debug print a mode 43 * @dev: DRM device 44 * @mode: mode to print 45 * 46 * LOCKING: 47 * None. 48 * 49 * Describe @mode using DRM_DEBUG. 50 */ 51 void drm_mode_debug_printmodeline(const struct drm_display_mode *mode) 52 { 53 DRM_DEBUG_KMS("Modeline %d:\"%s\" %d %d %d %d %d %d %d %d %d %d " 54 "0x%x 0x%x\n", 55 mode->base.id, mode->name, mode->vrefresh, mode->clock, 56 mode->hdisplay, mode->hsync_start, 57 mode->hsync_end, mode->htotal, 58 mode->vdisplay, mode->vsync_start, 59 mode->vsync_end, mode->vtotal, mode->type, mode->flags); 60 } 61 EXPORT_SYMBOL(drm_mode_debug_printmodeline); 62 63 /** 64 * drm_cvt_mode -create a modeline based on CVT algorithm 65 * @dev: DRM device 66 * @hdisplay: hdisplay size 67 * @vdisplay: vdisplay size 68 * @vrefresh : vrefresh rate 69 * @reduced : Whether the GTF calculation is simplified 70 * @interlaced:Whether the interlace is supported 71 * 72 * LOCKING: 73 * none. 74 * 75 * return the modeline based on CVT algorithm 76 * 77 * This function is called to generate the modeline based on CVT algorithm 78 * according to the hdisplay, vdisplay, vrefresh. 79 * It is based from the VESA(TM) Coordinated Video Timing Generator by 80 * Graham Loveridge April 9, 2003 available at 81 * http://www.elo.utfsm.cl/~elo212/docs/CVTd6r1.xls 82 * 83 * And it is copied from xf86CVTmode in xserver/hw/xfree86/modes/xf86cvt.c. 84 * What I have done is to translate it by using integer calculation. 85 */ 86 #define HV_FACTOR 1000 87 struct drm_display_mode *drm_cvt_mode(struct drm_device *dev, int hdisplay, 88 int vdisplay, int vrefresh, 89 bool reduced, bool interlaced, bool margins) 90 { 91 /* 1) top/bottom margin size (% of height) - default: 1.8, */ 92 #define CVT_MARGIN_PERCENTAGE 18 93 /* 2) character cell horizontal granularity (pixels) - default 8 */ 94 #define CVT_H_GRANULARITY 8 95 /* 3) Minimum vertical porch (lines) - default 3 */ 96 #define CVT_MIN_V_PORCH 3 97 /* 4) Minimum number of vertical back porch lines - default 6 */ 98 #define CVT_MIN_V_BPORCH 6 99 /* Pixel Clock step (kHz) */ 100 #define CVT_CLOCK_STEP 250 101 struct drm_display_mode *drm_mode; 102 unsigned int vfieldrate, hperiod; 103 int hdisplay_rnd, hmargin, vdisplay_rnd, vmargin, vsync; 104 int interlace; 105 106 /* allocate the drm_display_mode structure. If failure, we will 107 * return directly 108 */ 109 drm_mode = drm_mode_create(dev); 110 if (!drm_mode) 111 return NULL; 112 113 /* the CVT default refresh rate is 60Hz */ 114 if (!vrefresh) 115 vrefresh = 60; 116 117 /* the required field fresh rate */ 118 if (interlaced) 119 vfieldrate = vrefresh * 2; 120 else 121 vfieldrate = vrefresh; 122 123 /* horizontal pixels */ 124 hdisplay_rnd = hdisplay - (hdisplay % CVT_H_GRANULARITY); 125 126 /* determine the left&right borders */ 127 hmargin = 0; 128 if (margins) { 129 hmargin = hdisplay_rnd * CVT_MARGIN_PERCENTAGE / 1000; 130 hmargin -= hmargin % CVT_H_GRANULARITY; 131 } 132 /* find the total active pixels */ 133 drm_mode->hdisplay = hdisplay_rnd + 2 * hmargin; 134 135 /* find the number of lines per field */ 136 if (interlaced) 137 vdisplay_rnd = vdisplay / 2; 138 else 139 vdisplay_rnd = vdisplay; 140 141 /* find the top & bottom borders */ 142 vmargin = 0; 143 if (margins) 144 vmargin = vdisplay_rnd * CVT_MARGIN_PERCENTAGE / 1000; 145 146 drm_mode->vdisplay = vdisplay + 2 * vmargin; 147 148 /* Interlaced */ 149 if (interlaced) 150 interlace = 1; 151 else 152 interlace = 0; 153 154 /* Determine VSync Width from aspect ratio */ 155 if (!(vdisplay % 3) && ((vdisplay * 4 / 3) == hdisplay)) 156 vsync = 4; 157 else if (!(vdisplay % 9) && ((vdisplay * 16 / 9) == hdisplay)) 158 vsync = 5; 159 else if (!(vdisplay % 10) && ((vdisplay * 16 / 10) == hdisplay)) 160 vsync = 6; 161 else if (!(vdisplay % 4) && ((vdisplay * 5 / 4) == hdisplay)) 162 vsync = 7; 163 else if (!(vdisplay % 9) && ((vdisplay * 15 / 9) == hdisplay)) 164 vsync = 7; 165 else /* custom */ 166 vsync = 10; 167 168 if (!reduced) { 169 /* simplify the GTF calculation */ 170 /* 4) Minimum time of vertical sync + back porch interval (µs) 171 * default 550.0 172 */ 173 int tmp1, tmp2; 174 #define CVT_MIN_VSYNC_BP 550 175 /* 3) Nominal HSync width (% of line period) - default 8 */ 176 #define CVT_HSYNC_PERCENTAGE 8 177 unsigned int hblank_percentage; 178 int vsyncandback_porch, vback_porch, hblank; 179 180 /* estimated the horizontal period */ 181 tmp1 = HV_FACTOR * 1000000 - 182 CVT_MIN_VSYNC_BP * HV_FACTOR * vfieldrate; 183 tmp2 = (vdisplay_rnd + 2 * vmargin + CVT_MIN_V_PORCH) * 2 + 184 interlace; 185 hperiod = tmp1 * 2 / (tmp2 * vfieldrate); 186 187 tmp1 = CVT_MIN_VSYNC_BP * HV_FACTOR / hperiod + 1; 188 /* 9. Find number of lines in sync + backporch */ 189 if (tmp1 < (vsync + CVT_MIN_V_PORCH)) 190 vsyncandback_porch = vsync + CVT_MIN_V_PORCH; 191 else 192 vsyncandback_porch = tmp1; 193 /* 10. Find number of lines in back porch */ 194 vback_porch = vsyncandback_porch - vsync; 195 drm_mode->vtotal = vdisplay_rnd + 2 * vmargin + 196 vsyncandback_porch + CVT_MIN_V_PORCH; 197 /* 5) Definition of Horizontal blanking time limitation */ 198 /* Gradient (%/kHz) - default 600 */ 199 #define CVT_M_FACTOR 600 200 /* Offset (%) - default 40 */ 201 #define CVT_C_FACTOR 40 202 /* Blanking time scaling factor - default 128 */ 203 #define CVT_K_FACTOR 128 204 /* Scaling factor weighting - default 20 */ 205 #define CVT_J_FACTOR 20 206 #define CVT_M_PRIME (CVT_M_FACTOR * CVT_K_FACTOR / 256) 207 #define CVT_C_PRIME ((CVT_C_FACTOR - CVT_J_FACTOR) * CVT_K_FACTOR / 256 + \ 208 CVT_J_FACTOR) 209 /* 12. Find ideal blanking duty cycle from formula */ 210 hblank_percentage = CVT_C_PRIME * HV_FACTOR - CVT_M_PRIME * 211 hperiod / 1000; 212 /* 13. Blanking time */ 213 if (hblank_percentage < 20 * HV_FACTOR) 214 hblank_percentage = 20 * HV_FACTOR; 215 hblank = drm_mode->hdisplay * hblank_percentage / 216 (100 * HV_FACTOR - hblank_percentage); 217 hblank -= hblank % (2 * CVT_H_GRANULARITY); 218 /* 14. find the total pixes per line */ 219 drm_mode->htotal = drm_mode->hdisplay + hblank; 220 drm_mode->hsync_end = drm_mode->hdisplay + hblank / 2; 221 drm_mode->hsync_start = drm_mode->hsync_end - 222 (drm_mode->htotal * CVT_HSYNC_PERCENTAGE) / 100; 223 drm_mode->hsync_start += CVT_H_GRANULARITY - 224 drm_mode->hsync_start % CVT_H_GRANULARITY; 225 /* fill the Vsync values */ 226 drm_mode->vsync_start = drm_mode->vdisplay + CVT_MIN_V_PORCH; 227 drm_mode->vsync_end = drm_mode->vsync_start + vsync; 228 } else { 229 /* Reduced blanking */ 230 /* Minimum vertical blanking interval time (µs)- default 460 */ 231 #define CVT_RB_MIN_VBLANK 460 232 /* Fixed number of clocks for horizontal sync */ 233 #define CVT_RB_H_SYNC 32 234 /* Fixed number of clocks for horizontal blanking */ 235 #define CVT_RB_H_BLANK 160 236 /* Fixed number of lines for vertical front porch - default 3*/ 237 #define CVT_RB_VFPORCH 3 238 int vbilines; 239 int tmp1, tmp2; 240 /* 8. Estimate Horizontal period. */ 241 tmp1 = HV_FACTOR * 1000000 - 242 CVT_RB_MIN_VBLANK * HV_FACTOR * vfieldrate; 243 tmp2 = vdisplay_rnd + 2 * vmargin; 244 hperiod = tmp1 / (tmp2 * vfieldrate); 245 /* 9. Find number of lines in vertical blanking */ 246 vbilines = CVT_RB_MIN_VBLANK * HV_FACTOR / hperiod + 1; 247 /* 10. Check if vertical blanking is sufficient */ 248 if (vbilines < (CVT_RB_VFPORCH + vsync + CVT_MIN_V_BPORCH)) 249 vbilines = CVT_RB_VFPORCH + vsync + CVT_MIN_V_BPORCH; 250 /* 11. Find total number of lines in vertical field */ 251 drm_mode->vtotal = vdisplay_rnd + 2 * vmargin + vbilines; 252 /* 12. Find total number of pixels in a line */ 253 drm_mode->htotal = drm_mode->hdisplay + CVT_RB_H_BLANK; 254 /* Fill in HSync values */ 255 drm_mode->hsync_end = drm_mode->hdisplay + CVT_RB_H_BLANK / 2; 256 drm_mode->hsync_start = drm_mode->hsync_end - CVT_RB_H_SYNC; 257 /* Fill in VSync values */ 258 drm_mode->vsync_start = drm_mode->vdisplay + CVT_RB_VFPORCH; 259 drm_mode->vsync_end = drm_mode->vsync_start + vsync; 260 } 261 /* 15/13. Find pixel clock frequency (kHz for xf86) */ 262 drm_mode->clock = drm_mode->htotal * HV_FACTOR * 1000 / hperiod; 263 drm_mode->clock -= drm_mode->clock % CVT_CLOCK_STEP; 264 /* 18/16. Find actual vertical frame frequency */ 265 /* ignore - just set the mode flag for interlaced */ 266 if (interlaced) { 267 drm_mode->vtotal *= 2; 268 drm_mode->flags |= DRM_MODE_FLAG_INTERLACE; 269 } 270 /* Fill the mode line name */ 271 drm_mode_set_name(drm_mode); 272 if (reduced) 273 drm_mode->flags |= (DRM_MODE_FLAG_PHSYNC | 274 DRM_MODE_FLAG_NVSYNC); 275 else 276 drm_mode->flags |= (DRM_MODE_FLAG_PVSYNC | 277 DRM_MODE_FLAG_NHSYNC); 278 279 return drm_mode; 280 } 281 282 /** 283 * drm_gtf_mode_complex - create the modeline based on full GTF algorithm 284 * 285 * @dev :drm device 286 * @hdisplay :hdisplay size 287 * @vdisplay :vdisplay size 288 * @vrefresh :vrefresh rate. 289 * @interlaced :whether the interlace is supported 290 * @margins :desired margin size 291 * @GTF_[MCKJ] :extended GTF formula parameters 292 * 293 * LOCKING. 294 * none. 295 * 296 * return the modeline based on full GTF algorithm. 297 * 298 * GTF feature blocks specify C and J in multiples of 0.5, so we pass them 299 * in here multiplied by two. For a C of 40, pass in 80. 300 */ 301 struct drm_display_mode * 302 drm_gtf_mode_complex(struct drm_device *dev, int hdisplay, int vdisplay, 303 int vrefresh, bool interlaced, int margins, 304 int GTF_M, int GTF_2C, int GTF_K, int GTF_2J) 305 { /* 1) top/bottom margin size (% of height) - default: 1.8, */ 306 #define GTF_MARGIN_PERCENTAGE 18 307 /* 2) character cell horizontal granularity (pixels) - default 8 */ 308 #define GTF_CELL_GRAN 8 309 /* 3) Minimum vertical porch (lines) - default 3 */ 310 #define GTF_MIN_V_PORCH 1 311 /* width of vsync in lines */ 312 #define V_SYNC_RQD 3 313 /* width of hsync as % of total line */ 314 #define H_SYNC_PERCENT 8 315 /* min time of vsync + back porch (microsec) */ 316 #define MIN_VSYNC_PLUS_BP 550 317 /* C' and M' are part of the Blanking Duty Cycle computation */ 318 #define GTF_C_PRIME ((((GTF_2C - GTF_2J) * GTF_K / 256) + GTF_2J) / 2) 319 #define GTF_M_PRIME (GTF_K * GTF_M / 256) 320 struct drm_display_mode *drm_mode; 321 unsigned int hdisplay_rnd, vdisplay_rnd, vfieldrate_rqd; 322 int top_margin, bottom_margin; 323 int interlace; 324 unsigned int hfreq_est; 325 int vsync_plus_bp, vback_porch; 326 unsigned int vtotal_lines, vfieldrate_est, hperiod; 327 unsigned int vfield_rate, vframe_rate; 328 int left_margin, right_margin; 329 unsigned int total_active_pixels, ideal_duty_cycle; 330 unsigned int hblank, total_pixels, pixel_freq; 331 int hsync, hfront_porch, vodd_front_porch_lines; 332 unsigned int tmp1, tmp2; 333 334 drm_mode = drm_mode_create(dev); 335 if (!drm_mode) 336 return NULL; 337 338 /* 1. In order to give correct results, the number of horizontal 339 * pixels requested is first processed to ensure that it is divisible 340 * by the character size, by rounding it to the nearest character 341 * cell boundary: 342 */ 343 hdisplay_rnd = (hdisplay + GTF_CELL_GRAN / 2) / GTF_CELL_GRAN; 344 hdisplay_rnd = hdisplay_rnd * GTF_CELL_GRAN; 345 346 /* 2. If interlace is requested, the number of vertical lines assumed 347 * by the calculation must be halved, as the computation calculates 348 * the number of vertical lines per field. 349 */ 350 if (interlaced) 351 vdisplay_rnd = vdisplay / 2; 352 else 353 vdisplay_rnd = vdisplay; 354 355 /* 3. Find the frame rate required: */ 356 if (interlaced) 357 vfieldrate_rqd = vrefresh * 2; 358 else 359 vfieldrate_rqd = vrefresh; 360 361 /* 4. Find number of lines in Top margin: */ 362 top_margin = 0; 363 if (margins) 364 top_margin = (vdisplay_rnd * GTF_MARGIN_PERCENTAGE + 500) / 365 1000; 366 /* 5. Find number of lines in bottom margin: */ 367 bottom_margin = top_margin; 368 369 /* 6. If interlace is required, then set variable interlace: */ 370 if (interlaced) 371 interlace = 1; 372 else 373 interlace = 0; 374 375 /* 7. Estimate the Horizontal frequency */ 376 { 377 tmp1 = (1000000 - MIN_VSYNC_PLUS_BP * vfieldrate_rqd) / 500; 378 tmp2 = (vdisplay_rnd + 2 * top_margin + GTF_MIN_V_PORCH) * 379 2 + interlace; 380 hfreq_est = (tmp2 * 1000 * vfieldrate_rqd) / tmp1; 381 } 382 383 /* 8. Find the number of lines in V sync + back porch */ 384 /* [V SYNC+BP] = RINT(([MIN VSYNC+BP] * hfreq_est / 1000000)) */ 385 vsync_plus_bp = MIN_VSYNC_PLUS_BP * hfreq_est / 1000; 386 vsync_plus_bp = (vsync_plus_bp + 500) / 1000; 387 /* 9. Find the number of lines in V back porch alone: */ 388 vback_porch = vsync_plus_bp - V_SYNC_RQD; 389 /* 10. Find the total number of lines in Vertical field period: */ 390 vtotal_lines = vdisplay_rnd + top_margin + bottom_margin + 391 vsync_plus_bp + GTF_MIN_V_PORCH; 392 /* 11. Estimate the Vertical field frequency: */ 393 vfieldrate_est = hfreq_est / vtotal_lines; 394 /* 12. Find the actual horizontal period: */ 395 hperiod = 1000000 / (vfieldrate_rqd * vtotal_lines); 396 397 /* 13. Find the actual Vertical field frequency: */ 398 vfield_rate = hfreq_est / vtotal_lines; 399 /* 14. Find the Vertical frame frequency: */ 400 if (interlaced) 401 vframe_rate = vfield_rate / 2; 402 else 403 vframe_rate = vfield_rate; 404 /* 15. Find number of pixels in left margin: */ 405 if (margins) 406 left_margin = (hdisplay_rnd * GTF_MARGIN_PERCENTAGE + 500) / 407 1000; 408 else 409 left_margin = 0; 410 411 /* 16.Find number of pixels in right margin: */ 412 right_margin = left_margin; 413 /* 17.Find total number of active pixels in image and left and right */ 414 total_active_pixels = hdisplay_rnd + left_margin + right_margin; 415 /* 18.Find the ideal blanking duty cycle from blanking duty cycle */ 416 ideal_duty_cycle = GTF_C_PRIME * 1000 - 417 (GTF_M_PRIME * 1000000 / hfreq_est); 418 /* 19.Find the number of pixels in the blanking time to the nearest 419 * double character cell: */ 420 hblank = total_active_pixels * ideal_duty_cycle / 421 (100000 - ideal_duty_cycle); 422 hblank = (hblank + GTF_CELL_GRAN) / (2 * GTF_CELL_GRAN); 423 hblank = hblank * 2 * GTF_CELL_GRAN; 424 /* 20.Find total number of pixels: */ 425 total_pixels = total_active_pixels + hblank; 426 /* 21.Find pixel clock frequency: */ 427 pixel_freq = total_pixels * hfreq_est / 1000; 428 /* Stage 1 computations are now complete; I should really pass 429 * the results to another function and do the Stage 2 computations, 430 * but I only need a few more values so I'll just append the 431 * computations here for now */ 432 /* 17. Find the number of pixels in the horizontal sync period: */ 433 hsync = H_SYNC_PERCENT * total_pixels / 100; 434 hsync = (hsync + GTF_CELL_GRAN / 2) / GTF_CELL_GRAN; 435 hsync = hsync * GTF_CELL_GRAN; 436 /* 18. Find the number of pixels in horizontal front porch period */ 437 hfront_porch = hblank / 2 - hsync; 438 /* 36. Find the number of lines in the odd front porch period: */ 439 vodd_front_porch_lines = GTF_MIN_V_PORCH ; 440 441 /* finally, pack the results in the mode struct */ 442 drm_mode->hdisplay = hdisplay_rnd; 443 drm_mode->hsync_start = hdisplay_rnd + hfront_porch; 444 drm_mode->hsync_end = drm_mode->hsync_start + hsync; 445 drm_mode->htotal = total_pixels; 446 drm_mode->vdisplay = vdisplay_rnd; 447 drm_mode->vsync_start = vdisplay_rnd + vodd_front_porch_lines; 448 drm_mode->vsync_end = drm_mode->vsync_start + V_SYNC_RQD; 449 drm_mode->vtotal = vtotal_lines; 450 451 drm_mode->clock = pixel_freq; 452 453 if (interlaced) { 454 drm_mode->vtotal *= 2; 455 drm_mode->flags |= DRM_MODE_FLAG_INTERLACE; 456 } 457 458 drm_mode_set_name(drm_mode); 459 if (GTF_M == 600 && GTF_2C == 80 && GTF_K == 128 && GTF_2J == 40) 460 drm_mode->flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC; 461 else 462 drm_mode->flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC; 463 464 return drm_mode; 465 } 466 467 /** 468 * drm_gtf_mode - create the modeline based on GTF algorithm 469 * 470 * @dev :drm device 471 * @hdisplay :hdisplay size 472 * @vdisplay :vdisplay size 473 * @vrefresh :vrefresh rate. 474 * @interlaced :whether the interlace is supported 475 * @margins :whether the margin is supported 476 * 477 * LOCKING. 478 * none. 479 * 480 * return the modeline based on GTF algorithm 481 * 482 * This function is to create the modeline based on the GTF algorithm. 483 * Generalized Timing Formula is derived from: 484 * GTF Spreadsheet by Andy Morrish (1/5/97) 485 * available at http://www.vesa.org 486 * 487 * And it is copied from the file of xserver/hw/xfree86/modes/xf86gtf.c. 488 * What I have done is to translate it by using integer calculation. 489 * I also refer to the function of fb_get_mode in the file of 490 * drivers/video/fbmon.c 491 * 492 * Standard GTF parameters: 493 * M = 600 494 * C = 40 495 * K = 128 496 * J = 20 497 */ 498 struct drm_display_mode * 499 drm_gtf_mode(struct drm_device *dev, int hdisplay, int vdisplay, int vrefresh, 500 bool lace, int margins) 501 { 502 return drm_gtf_mode_complex(dev, hdisplay, vdisplay, vrefresh, lace, 503 margins, 600, 40 * 2, 128, 20 * 2); 504 } 505 506 /** 507 * drm_mode_set_name - set the name on a mode 508 * @mode: name will be set in this mode 509 * 510 * LOCKING: 511 * None. 512 * 513 * Set the name of @mode to a standard format. 514 */ 515 void drm_mode_set_name(struct drm_display_mode *mode) 516 { 517 bool interlaced = !!(mode->flags & DRM_MODE_FLAG_INTERLACE); 518 519 ksnprintf(mode->name, DRM_DISPLAY_MODE_LEN, "%dx%d%s", 520 mode->hdisplay, mode->vdisplay, 521 interlaced ? "i" : ""); 522 } 523 524 /** 525 * drm_mode_list_concat - move modes from one list to another 526 * @head: source list 527 * @new: dst list 528 * 529 * LOCKING: 530 * Caller must ensure both lists are locked. 531 * 532 * Move all the modes from @head to @new. 533 */ 534 void drm_mode_list_concat(struct list_head *head, struct list_head *new) 535 { 536 537 struct list_head *entry, *tmp; 538 539 list_for_each_safe(entry, tmp, head) { 540 list_move_tail(entry, new); 541 } 542 } 543 544 /** 545 * drm_mode_width - get the width of a mode 546 * @mode: mode 547 * 548 * LOCKING: 549 * None. 550 * 551 * Return @mode's width (hdisplay) value. 552 * 553 * FIXME: is this needed? 554 * 555 * RETURNS: 556 * @mode->hdisplay 557 */ 558 int drm_mode_width(const struct drm_display_mode *mode) 559 { 560 return mode->hdisplay; 561 562 } 563 EXPORT_SYMBOL(drm_mode_width); 564 565 /** 566 * drm_mode_height - get the height of a mode 567 * @mode: mode 568 * 569 * LOCKING: 570 * None. 571 * 572 * Return @mode's height (vdisplay) value. 573 * 574 * FIXME: is this needed? 575 * 576 * RETURNS: 577 * @mode->vdisplay 578 */ 579 int drm_mode_height(const struct drm_display_mode *mode) 580 { 581 return mode->vdisplay; 582 } 583 EXPORT_SYMBOL(drm_mode_height); 584 585 /** drm_mode_hsync - get the hsync of a mode 586 * @mode: mode 587 * 588 * LOCKING: 589 * None. 590 * 591 * Return @modes's hsync rate in kHz, rounded to the nearest int. 592 */ 593 int drm_mode_hsync(const struct drm_display_mode *mode) 594 { 595 unsigned int calc_val; 596 597 if (mode->hsync) 598 return mode->hsync; 599 600 if (mode->htotal < 0) 601 return 0; 602 603 calc_val = (mode->clock * 1000) / mode->htotal; /* hsync in Hz */ 604 calc_val += 500; /* round to 1000Hz */ 605 calc_val /= 1000; /* truncate to kHz */ 606 607 return calc_val; 608 } 609 610 /** 611 * drm_mode_vrefresh - get the vrefresh of a mode 612 * @mode: mode 613 * 614 * LOCKING: 615 * None. 616 * 617 * Return @mode's vrefresh rate in Hz or calculate it if necessary. 618 * 619 * FIXME: why is this needed? shouldn't vrefresh be set already? 620 * 621 * RETURNS: 622 * Vertical refresh rate. It will be the result of actual value plus 0.5. 623 * If it is 70.288, it will return 70Hz. 624 * If it is 59.6, it will return 60Hz. 625 */ 626 int drm_mode_vrefresh(const struct drm_display_mode *mode) 627 { 628 int refresh = 0; 629 unsigned int calc_val; 630 631 if (mode->vrefresh > 0) 632 refresh = mode->vrefresh; 633 else if (mode->htotal > 0 && mode->vtotal > 0) { 634 int vtotal; 635 vtotal = mode->vtotal; 636 /* work out vrefresh the value will be x1000 */ 637 calc_val = (mode->clock * 1000); 638 calc_val /= mode->htotal; 639 refresh = (calc_val + vtotal / 2) / vtotal; 640 641 if (mode->flags & DRM_MODE_FLAG_INTERLACE) 642 refresh *= 2; 643 if (mode->flags & DRM_MODE_FLAG_DBLSCAN) 644 refresh /= 2; 645 if (mode->vscan > 1) 646 refresh /= mode->vscan; 647 } 648 return refresh; 649 } 650 651 /** 652 * drm_mode_set_crtcinfo - set CRTC modesetting parameters 653 * @p: mode 654 * @adjust_flags: unused? (FIXME) 655 * 656 * LOCKING: 657 * None. 658 * 659 * Setup the CRTC modesetting parameters for @p, adjusting if necessary. 660 */ 661 void drm_mode_set_crtcinfo(struct drm_display_mode *p, int adjust_flags) 662 { 663 if ((p == NULL) || ((p->type & DRM_MODE_TYPE_CRTC_C) == DRM_MODE_TYPE_BUILTIN)) 664 return; 665 666 p->crtc_hdisplay = p->hdisplay; 667 p->crtc_hsync_start = p->hsync_start; 668 p->crtc_hsync_end = p->hsync_end; 669 p->crtc_htotal = p->htotal; 670 p->crtc_hskew = p->hskew; 671 p->crtc_vdisplay = p->vdisplay; 672 p->crtc_vsync_start = p->vsync_start; 673 p->crtc_vsync_end = p->vsync_end; 674 p->crtc_vtotal = p->vtotal; 675 676 if (p->flags & DRM_MODE_FLAG_INTERLACE) { 677 if (adjust_flags & CRTC_INTERLACE_HALVE_V) { 678 p->crtc_vdisplay /= 2; 679 p->crtc_vsync_start /= 2; 680 p->crtc_vsync_end /= 2; 681 p->crtc_vtotal /= 2; 682 } 683 } 684 685 if (p->flags & DRM_MODE_FLAG_DBLSCAN) { 686 p->crtc_vdisplay *= 2; 687 p->crtc_vsync_start *= 2; 688 p->crtc_vsync_end *= 2; 689 p->crtc_vtotal *= 2; 690 } 691 692 if (p->vscan > 1) { 693 p->crtc_vdisplay *= p->vscan; 694 p->crtc_vsync_start *= p->vscan; 695 p->crtc_vsync_end *= p->vscan; 696 p->crtc_vtotal *= p->vscan; 697 } 698 699 p->crtc_vblank_start = min(p->crtc_vsync_start, p->crtc_vdisplay); 700 p->crtc_vblank_end = max(p->crtc_vsync_end, p->crtc_vtotal); 701 p->crtc_hblank_start = min(p->crtc_hsync_start, p->crtc_hdisplay); 702 p->crtc_hblank_end = max(p->crtc_hsync_end, p->crtc_htotal); 703 } 704 EXPORT_SYMBOL(drm_mode_set_crtcinfo); 705 706 /** 707 * drm_mode_duplicate - allocate and duplicate an existing mode 708 * @m: mode to duplicate 709 * 710 * LOCKING: 711 * None. 712 * 713 * Just allocate a new mode, copy the existing mode into it, and return 714 * a pointer to it. Used to create new instances of established modes. 715 */ 716 struct drm_display_mode *drm_mode_duplicate(struct drm_device *dev, 717 const struct drm_display_mode *mode) 718 { 719 struct drm_display_mode *nmode; 720 int new_id; 721 722 nmode = drm_mode_create(dev); 723 if (!nmode) 724 return NULL; 725 726 new_id = nmode->base.id; 727 *nmode = *mode; 728 nmode->base.id = new_id; 729 INIT_LIST_HEAD(&nmode->head); 730 return nmode; 731 } 732 733 /** 734 * drm_mode_equal - test modes for equality 735 * @mode1: first mode 736 * @mode2: second mode 737 * 738 * LOCKING: 739 * None. 740 * 741 * Check to see if @mode1 and @mode2 are equivalent. 742 * 743 * RETURNS: 744 * True if the modes are equal, false otherwise. 745 */ 746 bool drm_mode_equal(const struct drm_display_mode *mode1, const struct drm_display_mode *mode2) 747 { 748 /* do clock check convert to PICOS so fb modes get matched 749 * the same */ 750 if (mode1->clock && mode2->clock) { 751 if (KHZ2PICOS(mode1->clock) != KHZ2PICOS(mode2->clock)) 752 return false; 753 } else if (mode1->clock != mode2->clock) 754 return false; 755 756 if (mode1->hdisplay == mode2->hdisplay && 757 mode1->hsync_start == mode2->hsync_start && 758 mode1->hsync_end == mode2->hsync_end && 759 mode1->htotal == mode2->htotal && 760 mode1->hskew == mode2->hskew && 761 mode1->vdisplay == mode2->vdisplay && 762 mode1->vsync_start == mode2->vsync_start && 763 mode1->vsync_end == mode2->vsync_end && 764 mode1->vtotal == mode2->vtotal && 765 mode1->vscan == mode2->vscan && 766 mode1->flags == mode2->flags) 767 return true; 768 769 return false; 770 } 771 EXPORT_SYMBOL(drm_mode_equal); 772 773 /** 774 * drm_mode_validate_size - make sure modes adhere to size constraints 775 * @dev: DRM device 776 * @mode_list: list of modes to check 777 * @maxX: maximum width 778 * @maxY: maximum height 779 * @maxPitch: max pitch 780 * 781 * LOCKING: 782 * Caller must hold a lock protecting @mode_list. 783 * 784 * The DRM device (@dev) has size and pitch limits. Here we validate the 785 * modes we probed for @dev against those limits and set their status as 786 * necessary. 787 */ 788 void drm_mode_validate_size(struct drm_device *dev, 789 struct list_head *mode_list, 790 int maxX, int maxY, int maxPitch) 791 { 792 struct drm_display_mode *mode; 793 794 list_for_each_entry(mode, mode_list, head) { 795 if (maxPitch > 0 && mode->hdisplay > maxPitch) 796 mode->status = MODE_BAD_WIDTH; 797 798 if (maxX > 0 && mode->hdisplay > maxX) 799 mode->status = MODE_VIRTUAL_X; 800 801 if (maxY > 0 && mode->vdisplay > maxY) 802 mode->status = MODE_VIRTUAL_Y; 803 } 804 } 805 806 /** 807 * drm_mode_validate_clocks - validate modes against clock limits 808 * @dev: DRM device 809 * @mode_list: list of modes to check 810 * @min: minimum clock rate array 811 * @max: maximum clock rate array 812 * @n_ranges: number of clock ranges (size of arrays) 813 * 814 * LOCKING: 815 * Caller must hold a lock protecting @mode_list. 816 * 817 * Some code may need to check a mode list against the clock limits of the 818 * device in question. This function walks the mode list, testing to make 819 * sure each mode falls within a given range (defined by @min and @max 820 * arrays) and sets @mode->status as needed. 821 */ 822 void drm_mode_validate_clocks(struct drm_device *dev, 823 struct list_head *mode_list, 824 int *min, int *max, int n_ranges) 825 { 826 struct drm_display_mode *mode; 827 int i; 828 829 list_for_each_entry(mode, mode_list, head) { 830 bool good = false; 831 for (i = 0; i < n_ranges; i++) { 832 if (mode->clock >= min[i] && mode->clock <= max[i]) { 833 good = true; 834 break; 835 } 836 } 837 if (!good) 838 mode->status = MODE_CLOCK_RANGE; 839 } 840 } 841 842 /** 843 * drm_mode_prune_invalid - remove invalid modes from mode list 844 * @dev: DRM device 845 * @mode_list: list of modes to check 846 * @verbose: be verbose about it 847 * 848 * LOCKING: 849 * Caller must hold a lock protecting @mode_list. 850 * 851 * Once mode list generation is complete, a caller can use this routine to 852 * remove invalid modes from a mode list. If any of the modes have a 853 * status other than %MODE_OK, they are removed from @mode_list and freed. 854 */ 855 void drm_mode_prune_invalid(struct drm_device *dev, 856 struct list_head *mode_list, bool verbose) 857 { 858 struct drm_display_mode *mode, *t; 859 860 list_for_each_entry_safe(mode, t, mode_list, head) { 861 if (mode->status != MODE_OK) { 862 list_del(&mode->head); 863 if (verbose) { 864 drm_mode_debug_printmodeline(mode); 865 DRM_DEBUG_KMS("Not using %s mode %d\n", 866 mode->name, mode->status); 867 } 868 drm_mode_destroy(dev, mode); 869 } 870 } 871 } 872 873 /** 874 * drm_mode_compare - compare modes for favorability 875 * @priv: unused 876 * @lh_a: list_head for first mode 877 * @lh_b: list_head for second mode 878 * 879 * LOCKING: 880 * None. 881 * 882 * Compare two modes, given by @lh_a and @lh_b, returning a value indicating 883 * which is better. 884 * 885 * RETURNS: 886 * Negative if @lh_a is better than @lh_b, zero if they're equivalent, or 887 * positive if @lh_b is better than @lh_a. 888 */ 889 static int drm_mode_compare(void *priv, struct list_head *lh_a, struct list_head *lh_b) 890 { 891 struct drm_display_mode *a = list_entry(lh_a, struct drm_display_mode, head); 892 struct drm_display_mode *b = list_entry(lh_b, struct drm_display_mode, head); 893 int diff; 894 895 diff = ((b->type & DRM_MODE_TYPE_PREFERRED) != 0) - 896 ((a->type & DRM_MODE_TYPE_PREFERRED) != 0); 897 if (diff) 898 return diff; 899 diff = b->hdisplay * b->vdisplay - a->hdisplay * a->vdisplay; 900 if (diff) 901 return diff; 902 diff = b->clock - a->clock; 903 return diff; 904 } 905 906 /** 907 * drm_mode_sort - sort mode list 908 * @mode_list: list to sort 909 * 910 * LOCKING: 911 * Caller must hold a lock protecting @mode_list. 912 * 913 * Sort @mode_list by favorability, putting good modes first. 914 */ 915 void drm_mode_sort(struct list_head *mode_list) 916 { 917 drm_list_sort(NULL, mode_list, drm_mode_compare); 918 } 919 920 /** 921 * drm_mode_connector_list_update - update the mode list for the connector 922 * @connector: the connector to update 923 * 924 * LOCKING: 925 * Caller must hold a lock protecting @mode_list. 926 * 927 * This moves the modes from the @connector probed_modes list 928 * to the actual mode list. It compares the probed mode against the current 929 * list and only adds different modes. All modes unverified after this point 930 * will be removed by the prune invalid modes. 931 */ 932 void drm_mode_connector_list_update(struct drm_connector *connector) 933 { 934 struct drm_display_mode *mode; 935 struct drm_display_mode *pmode, *pt; 936 int found_it; 937 938 list_for_each_entry_safe(pmode, pt, &connector->probed_modes, 939 head) { 940 found_it = 0; 941 /* go through current modes checking for the new probed mode */ 942 list_for_each_entry(mode, &connector->modes, head) { 943 if (drm_mode_equal(pmode, mode)) { 944 found_it = 1; 945 /* if equal delete the probed mode */ 946 mode->status = pmode->status; 947 /* Merge type bits together */ 948 mode->type |= pmode->type; 949 list_del(&pmode->head); 950 drm_mode_destroy(connector->dev, pmode); 951 break; 952 } 953 } 954 955 if (!found_it) { 956 list_move_tail(&pmode->head, &connector->modes); 957 } 958 } 959 } 960 961 /** 962 * drm_mode_parse_command_line_for_connector - parse command line for connector 963 * @mode_option - per connector mode option 964 * @connector - connector to parse line for 965 * 966 * This parses the connector specific then generic command lines for 967 * modes and options to configure the connector. 968 * 969 * This uses the same parameters as the fb modedb.c, except for extra 970 * <xres>x<yres>[M][R][-<bpp>][@<refresh>][i][m][eDd] 971 * 972 * enable/enable Digital/disable bit at the end 973 */ 974 bool drm_mode_parse_command_line_for_connector(const char *mode_option, 975 struct drm_connector *connector, 976 struct drm_cmdline_mode *mode) 977 { 978 const char *name; 979 unsigned int namelen; 980 bool res_specified = false, bpp_specified = false, refresh_specified = false; 981 unsigned int xres = 0, yres = 0, bpp = 32, refresh = 0; 982 bool yres_specified = false, cvt = false, rb = false; 983 bool interlace = false, margins = false, was_digit = false; 984 int i; 985 enum drm_connector_force force = DRM_FORCE_UNSPECIFIED; 986 987 #ifdef XXX_CONFIG_FB 988 if (!mode_option) 989 mode_option = fb_mode_option; 990 #endif 991 992 if (!mode_option) { 993 mode->specified = false; 994 return false; 995 } 996 997 name = mode_option; 998 namelen = strlen(name); 999 for (i = namelen-1; i >= 0; i--) { 1000 switch (name[i]) { 1001 case '@': 1002 if (!refresh_specified && !bpp_specified && 1003 !yres_specified && !cvt && !rb && was_digit) { 1004 refresh = strtol(&name[i+1], NULL, 10); 1005 refresh_specified = true; 1006 was_digit = false; 1007 } else 1008 goto done; 1009 break; 1010 case '-': 1011 if (!bpp_specified && !yres_specified && !cvt && 1012 !rb && was_digit) { 1013 bpp = strtol(&name[i+1], NULL, 10); 1014 bpp_specified = true; 1015 was_digit = false; 1016 } else 1017 goto done; 1018 break; 1019 case 'x': 1020 if (!yres_specified && was_digit) { 1021 yres = strtol(&name[i+1], NULL, 10); 1022 yres_specified = true; 1023 was_digit = false; 1024 } else 1025 goto done; 1026 case '0' ... '9': 1027 was_digit = true; 1028 break; 1029 case 'M': 1030 if (yres_specified || cvt || was_digit) 1031 goto done; 1032 cvt = true; 1033 break; 1034 case 'R': 1035 if (yres_specified || cvt || rb || was_digit) 1036 goto done; 1037 rb = true; 1038 break; 1039 case 'm': 1040 if (cvt || yres_specified || was_digit) 1041 goto done; 1042 margins = true; 1043 break; 1044 case 'i': 1045 if (cvt || yres_specified || was_digit) 1046 goto done; 1047 interlace = true; 1048 break; 1049 case 'e': 1050 if (yres_specified || bpp_specified || refresh_specified || 1051 was_digit || (force != DRM_FORCE_UNSPECIFIED)) 1052 goto done; 1053 1054 force = DRM_FORCE_ON; 1055 break; 1056 case 'D': 1057 if (yres_specified || bpp_specified || refresh_specified || 1058 was_digit || (force != DRM_FORCE_UNSPECIFIED)) 1059 goto done; 1060 1061 if ((connector->connector_type != DRM_MODE_CONNECTOR_DVII) && 1062 (connector->connector_type != DRM_MODE_CONNECTOR_HDMIB)) 1063 force = DRM_FORCE_ON; 1064 else 1065 force = DRM_FORCE_ON_DIGITAL; 1066 break; 1067 case 'd': 1068 if (yres_specified || bpp_specified || refresh_specified || 1069 was_digit || (force != DRM_FORCE_UNSPECIFIED)) 1070 goto done; 1071 1072 force = DRM_FORCE_OFF; 1073 break; 1074 default: 1075 goto done; 1076 } 1077 } 1078 1079 if (i < 0 && yres_specified) { 1080 char *ch; 1081 xres = strtol(name, &ch, 10); 1082 if ((ch != NULL) && (*ch == 'x')) 1083 res_specified = true; 1084 else 1085 i = ch - name; 1086 } else if (!yres_specified && was_digit) { 1087 /* catch mode that begins with digits but has no 'x' */ 1088 i = 0; 1089 } 1090 done: 1091 if (i >= 0) { 1092 kprintf("parse error at position %i in video mode '%s'\n", 1093 i, name); 1094 mode->specified = false; 1095 return false; 1096 } 1097 1098 if (res_specified) { 1099 mode->specified = true; 1100 mode->xres = xres; 1101 mode->yres = yres; 1102 } 1103 1104 if (refresh_specified) { 1105 mode->refresh_specified = true; 1106 mode->refresh = refresh; 1107 } 1108 1109 if (bpp_specified) { 1110 mode->bpp_specified = true; 1111 mode->bpp = bpp; 1112 } 1113 mode->rb = rb; 1114 mode->cvt = cvt; 1115 mode->interlace = interlace; 1116 mode->margins = margins; 1117 mode->force = force; 1118 1119 return true; 1120 } 1121 1122 struct drm_display_mode * 1123 drm_mode_create_from_cmdline_mode(struct drm_device *dev, 1124 struct drm_cmdline_mode *cmd) 1125 { 1126 struct drm_display_mode *mode; 1127 1128 if (cmd->cvt) 1129 mode = drm_cvt_mode(dev, 1130 cmd->xres, cmd->yres, 1131 cmd->refresh_specified ? cmd->refresh : 60, 1132 cmd->rb, cmd->interlace, 1133 cmd->margins); 1134 else 1135 mode = drm_gtf_mode(dev, 1136 cmd->xres, cmd->yres, 1137 cmd->refresh_specified ? cmd->refresh : 60, 1138 cmd->interlace, 1139 cmd->margins); 1140 if (!mode) 1141 return NULL; 1142 1143 drm_mode_set_crtcinfo(mode, CRTC_INTERLACE_HALVE_V); 1144 return mode; 1145 } 1146