1 /* 2 * Copyright © 1997-2003 by The XFree86 Project, Inc. 3 * Copyright © 2007 Dave Airlie 4 * Copyright © 2007-2008 Intel Corporation 5 * Jesse Barnes <jesse.barnes@intel.com> 6 * Copyright 2005-2006 Luc Verhaegen 7 * Copyright (c) 2001, Andy Ritger aritger@nvidia.com 8 * 9 * Permission is hereby granted, free of charge, to any person obtaining a 10 * copy of this software and associated documentation files (the "Software"), 11 * to deal in the Software without restriction, including without limitation 12 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 13 * and/or sell copies of the Software, and to permit persons to whom the 14 * Software is furnished to do so, subject to the following conditions: 15 * 16 * The above copyright notice and this permission notice shall be included in 17 * all copies or substantial portions of the Software. 18 * 19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 20 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 21 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 22 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 23 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 24 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 25 * OTHER DEALINGS IN THE SOFTWARE. 26 * 27 * Except as contained in this notice, the name of the copyright holder(s) 28 * and author(s) shall not be used in advertising or otherwise to promote 29 * the sale, use or other dealings in this Software without prior written 30 * authorization from the copyright holder(s) and author(s). 31 * 32 * $FreeBSD: src/sys/dev/drm2/drm_modes.c,v 1.1 2012/05/22 11:07:44 kib Exp $ 33 */ 34 35 #include <dev/drm/drmP.h> 36 #include <dev/drm/drm.h> 37 #include <dev/drm/drm_crtc.h> 38 39 #define KHZ2PICOS(a) (1000000000UL/(a)) 40 41 /** 42 * drm_mode_debug_printmodeline - debug print a mode 43 * @dev: DRM device 44 * @mode: mode to print 45 * 46 * LOCKING: 47 * None. 48 * 49 * Describe @mode using DRM_DEBUG. 50 */ 51 void drm_mode_debug_printmodeline(struct drm_display_mode *mode) 52 { 53 DRM_DEBUG_KMS("Modeline %d:\"%s\" %d %d %d %d %d %d %d %d %d %d " 54 "0x%x 0x%x\n", 55 mode->base.id, mode->name, mode->vrefresh, mode->clock, 56 mode->hdisplay, mode->hsync_start, 57 mode->hsync_end, mode->htotal, 58 mode->vdisplay, mode->vsync_start, 59 mode->vsync_end, mode->vtotal, mode->type, mode->flags); 60 } 61 62 /** 63 * drm_cvt_mode -create a modeline based on CVT algorithm 64 * @dev: DRM device 65 * @hdisplay: hdisplay size 66 * @vdisplay: vdisplay size 67 * @vrefresh : vrefresh rate 68 * @reduced : Whether the GTF calculation is simplified 69 * @interlaced:Whether the interlace is supported 70 * 71 * LOCKING: 72 * none. 73 * 74 * return the modeline based on CVT algorithm 75 * 76 * This function is called to generate the modeline based on CVT algorithm 77 * according to the hdisplay, vdisplay, vrefresh. 78 * It is based from the VESA(TM) Coordinated Video Timing Generator by 79 * Graham Loveridge April 9, 2003 available at 80 * http://www.elo.utfsm.cl/~elo212/docs/CVTd6r1.xls 81 * 82 * And it is copied from xf86CVTmode in xserver/hw/xfree86/modes/xf86cvt.c. 83 * What I have done is to translate it by using integer calculation. 84 */ 85 #define HV_FACTOR 1000 86 struct drm_display_mode *drm_cvt_mode(struct drm_device *dev, int hdisplay, 87 int vdisplay, int vrefresh, 88 bool reduced, bool interlaced, bool margins) 89 { 90 /* 1) top/bottom margin size (% of height) - default: 1.8, */ 91 #define CVT_MARGIN_PERCENTAGE 18 92 /* 2) character cell horizontal granularity (pixels) - default 8 */ 93 #define CVT_H_GRANULARITY 8 94 /* 3) Minimum vertical porch (lines) - default 3 */ 95 #define CVT_MIN_V_PORCH 3 96 /* 4) Minimum number of vertical back porch lines - default 6 */ 97 #define CVT_MIN_V_BPORCH 6 98 /* Pixel Clock step (kHz) */ 99 #define CVT_CLOCK_STEP 250 100 struct drm_display_mode *drm_mode; 101 unsigned int vfieldrate, hperiod; 102 int hdisplay_rnd, hmargin, vdisplay_rnd, vmargin, vsync; 103 int interlace; 104 105 /* allocate the drm_display_mode structure. If failure, we will 106 * return directly 107 */ 108 drm_mode = drm_mode_create(dev); 109 if (!drm_mode) 110 return NULL; 111 112 /* the CVT default refresh rate is 60Hz */ 113 if (!vrefresh) 114 vrefresh = 60; 115 116 /* the required field fresh rate */ 117 if (interlaced) 118 vfieldrate = vrefresh * 2; 119 else 120 vfieldrate = vrefresh; 121 122 /* horizontal pixels */ 123 hdisplay_rnd = hdisplay - (hdisplay % CVT_H_GRANULARITY); 124 125 /* determine the left&right borders */ 126 hmargin = 0; 127 if (margins) { 128 hmargin = hdisplay_rnd * CVT_MARGIN_PERCENTAGE / 1000; 129 hmargin -= hmargin % CVT_H_GRANULARITY; 130 } 131 /* find the total active pixels */ 132 drm_mode->hdisplay = hdisplay_rnd + 2 * hmargin; 133 134 /* find the number of lines per field */ 135 if (interlaced) 136 vdisplay_rnd = vdisplay / 2; 137 else 138 vdisplay_rnd = vdisplay; 139 140 /* find the top & bottom borders */ 141 vmargin = 0; 142 if (margins) 143 vmargin = vdisplay_rnd * CVT_MARGIN_PERCENTAGE / 1000; 144 145 drm_mode->vdisplay = vdisplay + 2 * vmargin; 146 147 /* Interlaced */ 148 if (interlaced) 149 interlace = 1; 150 else 151 interlace = 0; 152 153 /* Determine VSync Width from aspect ratio */ 154 if (!(vdisplay % 3) && ((vdisplay * 4 / 3) == hdisplay)) 155 vsync = 4; 156 else if (!(vdisplay % 9) && ((vdisplay * 16 / 9) == hdisplay)) 157 vsync = 5; 158 else if (!(vdisplay % 10) && ((vdisplay * 16 / 10) == hdisplay)) 159 vsync = 6; 160 else if (!(vdisplay % 4) && ((vdisplay * 5 / 4) == hdisplay)) 161 vsync = 7; 162 else if (!(vdisplay % 9) && ((vdisplay * 15 / 9) == hdisplay)) 163 vsync = 7; 164 else /* custom */ 165 vsync = 10; 166 167 if (!reduced) { 168 /* simplify the GTF calculation */ 169 /* 4) Minimum time of vertical sync + back porch interval (µs) 170 * default 550.0 171 */ 172 int tmp1, tmp2; 173 #define CVT_MIN_VSYNC_BP 550 174 /* 3) Nominal HSync width (% of line period) - default 8 */ 175 #define CVT_HSYNC_PERCENTAGE 8 176 unsigned int hblank_percentage; 177 int vsyncandback_porch, vback_porch, hblank; 178 179 /* estimated the horizontal period */ 180 tmp1 = HV_FACTOR * 1000000 - 181 CVT_MIN_VSYNC_BP * HV_FACTOR * vfieldrate; 182 tmp2 = (vdisplay_rnd + 2 * vmargin + CVT_MIN_V_PORCH) * 2 + 183 interlace; 184 hperiod = tmp1 * 2 / (tmp2 * vfieldrate); 185 186 tmp1 = CVT_MIN_VSYNC_BP * HV_FACTOR / hperiod + 1; 187 /* 9. Find number of lines in sync + backporch */ 188 if (tmp1 < (vsync + CVT_MIN_V_PORCH)) 189 vsyncandback_porch = vsync + CVT_MIN_V_PORCH; 190 else 191 vsyncandback_porch = tmp1; 192 /* 10. Find number of lines in back porch */ 193 vback_porch = vsyncandback_porch - vsync; 194 drm_mode->vtotal = vdisplay_rnd + 2 * vmargin + 195 vsyncandback_porch + CVT_MIN_V_PORCH; 196 /* 5) Definition of Horizontal blanking time limitation */ 197 /* Gradient (%/kHz) - default 600 */ 198 #define CVT_M_FACTOR 600 199 /* Offset (%) - default 40 */ 200 #define CVT_C_FACTOR 40 201 /* Blanking time scaling factor - default 128 */ 202 #define CVT_K_FACTOR 128 203 /* Scaling factor weighting - default 20 */ 204 #define CVT_J_FACTOR 20 205 #define CVT_M_PRIME (CVT_M_FACTOR * CVT_K_FACTOR / 256) 206 #define CVT_C_PRIME ((CVT_C_FACTOR - CVT_J_FACTOR) * CVT_K_FACTOR / 256 + \ 207 CVT_J_FACTOR) 208 /* 12. Find ideal blanking duty cycle from formula */ 209 hblank_percentage = CVT_C_PRIME * HV_FACTOR - CVT_M_PRIME * 210 hperiod / 1000; 211 /* 13. Blanking time */ 212 if (hblank_percentage < 20 * HV_FACTOR) 213 hblank_percentage = 20 * HV_FACTOR; 214 hblank = drm_mode->hdisplay * hblank_percentage / 215 (100 * HV_FACTOR - hblank_percentage); 216 hblank -= hblank % (2 * CVT_H_GRANULARITY); 217 /* 14. find the total pixes per line */ 218 drm_mode->htotal = drm_mode->hdisplay + hblank; 219 drm_mode->hsync_end = drm_mode->hdisplay + hblank / 2; 220 drm_mode->hsync_start = drm_mode->hsync_end - 221 (drm_mode->htotal * CVT_HSYNC_PERCENTAGE) / 100; 222 drm_mode->hsync_start += CVT_H_GRANULARITY - 223 drm_mode->hsync_start % CVT_H_GRANULARITY; 224 /* fill the Vsync values */ 225 drm_mode->vsync_start = drm_mode->vdisplay + CVT_MIN_V_PORCH; 226 drm_mode->vsync_end = drm_mode->vsync_start + vsync; 227 } else { 228 /* Reduced blanking */ 229 /* Minimum vertical blanking interval time (µs)- default 460 */ 230 #define CVT_RB_MIN_VBLANK 460 231 /* Fixed number of clocks for horizontal sync */ 232 #define CVT_RB_H_SYNC 32 233 /* Fixed number of clocks for horizontal blanking */ 234 #define CVT_RB_H_BLANK 160 235 /* Fixed number of lines for vertical front porch - default 3*/ 236 #define CVT_RB_VFPORCH 3 237 int vbilines; 238 int tmp1, tmp2; 239 /* 8. Estimate Horizontal period. */ 240 tmp1 = HV_FACTOR * 1000000 - 241 CVT_RB_MIN_VBLANK * HV_FACTOR * vfieldrate; 242 tmp2 = vdisplay_rnd + 2 * vmargin; 243 hperiod = tmp1 / (tmp2 * vfieldrate); 244 /* 9. Find number of lines in vertical blanking */ 245 vbilines = CVT_RB_MIN_VBLANK * HV_FACTOR / hperiod + 1; 246 /* 10. Check if vertical blanking is sufficient */ 247 if (vbilines < (CVT_RB_VFPORCH + vsync + CVT_MIN_V_BPORCH)) 248 vbilines = CVT_RB_VFPORCH + vsync + CVT_MIN_V_BPORCH; 249 /* 11. Find total number of lines in vertical field */ 250 drm_mode->vtotal = vdisplay_rnd + 2 * vmargin + vbilines; 251 /* 12. Find total number of pixels in a line */ 252 drm_mode->htotal = drm_mode->hdisplay + CVT_RB_H_BLANK; 253 /* Fill in HSync values */ 254 drm_mode->hsync_end = drm_mode->hdisplay + CVT_RB_H_BLANK / 2; 255 drm_mode->hsync_start = drm_mode->hsync_end - CVT_RB_H_SYNC; 256 /* Fill in VSync values */ 257 drm_mode->vsync_start = drm_mode->vdisplay + CVT_RB_VFPORCH; 258 drm_mode->vsync_end = drm_mode->vsync_start + vsync; 259 } 260 /* 15/13. Find pixel clock frequency (kHz for xf86) */ 261 drm_mode->clock = drm_mode->htotal * HV_FACTOR * 1000 / hperiod; 262 drm_mode->clock -= drm_mode->clock % CVT_CLOCK_STEP; 263 /* 18/16. Find actual vertical frame frequency */ 264 /* ignore - just set the mode flag for interlaced */ 265 if (interlaced) { 266 drm_mode->vtotal *= 2; 267 drm_mode->flags |= DRM_MODE_FLAG_INTERLACE; 268 } 269 /* Fill the mode line name */ 270 drm_mode_set_name(drm_mode); 271 if (reduced) 272 drm_mode->flags |= (DRM_MODE_FLAG_PHSYNC | 273 DRM_MODE_FLAG_NVSYNC); 274 else 275 drm_mode->flags |= (DRM_MODE_FLAG_PVSYNC | 276 DRM_MODE_FLAG_NHSYNC); 277 278 return drm_mode; 279 } 280 281 /** 282 * drm_gtf_mode_complex - create the modeline based on full GTF algorithm 283 * 284 * @dev :drm device 285 * @hdisplay :hdisplay size 286 * @vdisplay :vdisplay size 287 * @vrefresh :vrefresh rate. 288 * @interlaced :whether the interlace is supported 289 * @margins :desired margin size 290 * @GTF_[MCKJ] :extended GTF formula parameters 291 * 292 * LOCKING. 293 * none. 294 * 295 * return the modeline based on full GTF algorithm. 296 * 297 * GTF feature blocks specify C and J in multiples of 0.5, so we pass them 298 * in here multiplied by two. For a C of 40, pass in 80. 299 */ 300 struct drm_display_mode * 301 drm_gtf_mode_complex(struct drm_device *dev, int hdisplay, int vdisplay, 302 int vrefresh, bool interlaced, int margins, 303 int GTF_M, int GTF_2C, int GTF_K, int GTF_2J) 304 { /* 1) top/bottom margin size (% of height) - default: 1.8, */ 305 #define GTF_MARGIN_PERCENTAGE 18 306 /* 2) character cell horizontal granularity (pixels) - default 8 */ 307 #define GTF_CELL_GRAN 8 308 /* 3) Minimum vertical porch (lines) - default 3 */ 309 #define GTF_MIN_V_PORCH 1 310 /* width of vsync in lines */ 311 #define V_SYNC_RQD 3 312 /* width of hsync as % of total line */ 313 #define H_SYNC_PERCENT 8 314 /* min time of vsync + back porch (microsec) */ 315 #define MIN_VSYNC_PLUS_BP 550 316 /* C' and M' are part of the Blanking Duty Cycle computation */ 317 #define GTF_C_PRIME ((((GTF_2C - GTF_2J) * GTF_K / 256) + GTF_2J) / 2) 318 #define GTF_M_PRIME (GTF_K * GTF_M / 256) 319 struct drm_display_mode *drm_mode; 320 unsigned int hdisplay_rnd, vdisplay_rnd, vfieldrate_rqd; 321 int top_margin, bottom_margin; 322 int interlace; 323 unsigned int hfreq_est; 324 int vsync_plus_bp, vback_porch; 325 unsigned int vtotal_lines, vfieldrate_est, hperiod; 326 unsigned int vfield_rate, vframe_rate; 327 int left_margin, right_margin; 328 unsigned int total_active_pixels, ideal_duty_cycle; 329 unsigned int hblank, total_pixels, pixel_freq; 330 int hsync, hfront_porch, vodd_front_porch_lines; 331 unsigned int tmp1, tmp2; 332 333 drm_mode = drm_mode_create(dev); 334 if (!drm_mode) 335 return NULL; 336 337 /* 1. In order to give correct results, the number of horizontal 338 * pixels requested is first processed to ensure that it is divisible 339 * by the character size, by rounding it to the nearest character 340 * cell boundary: 341 */ 342 hdisplay_rnd = (hdisplay + GTF_CELL_GRAN / 2) / GTF_CELL_GRAN; 343 hdisplay_rnd = hdisplay_rnd * GTF_CELL_GRAN; 344 345 /* 2. If interlace is requested, the number of vertical lines assumed 346 * by the calculation must be halved, as the computation calculates 347 * the number of vertical lines per field. 348 */ 349 if (interlaced) 350 vdisplay_rnd = vdisplay / 2; 351 else 352 vdisplay_rnd = vdisplay; 353 354 /* 3. Find the frame rate required: */ 355 if (interlaced) 356 vfieldrate_rqd = vrefresh * 2; 357 else 358 vfieldrate_rqd = vrefresh; 359 360 /* 4. Find number of lines in Top margin: */ 361 top_margin = 0; 362 if (margins) 363 top_margin = (vdisplay_rnd * GTF_MARGIN_PERCENTAGE + 500) / 364 1000; 365 /* 5. Find number of lines in bottom margin: */ 366 bottom_margin = top_margin; 367 368 /* 6. If interlace is required, then set variable interlace: */ 369 if (interlaced) 370 interlace = 1; 371 else 372 interlace = 0; 373 374 /* 7. Estimate the Horizontal frequency */ 375 { 376 tmp1 = (1000000 - MIN_VSYNC_PLUS_BP * vfieldrate_rqd) / 500; 377 tmp2 = (vdisplay_rnd + 2 * top_margin + GTF_MIN_V_PORCH) * 378 2 + interlace; 379 hfreq_est = (tmp2 * 1000 * vfieldrate_rqd) / tmp1; 380 } 381 382 /* 8. Find the number of lines in V sync + back porch */ 383 /* [V SYNC+BP] = RINT(([MIN VSYNC+BP] * hfreq_est / 1000000)) */ 384 vsync_plus_bp = MIN_VSYNC_PLUS_BP * hfreq_est / 1000; 385 vsync_plus_bp = (vsync_plus_bp + 500) / 1000; 386 /* 9. Find the number of lines in V back porch alone: */ 387 vback_porch = vsync_plus_bp - V_SYNC_RQD; 388 /* 10. Find the total number of lines in Vertical field period: */ 389 vtotal_lines = vdisplay_rnd + top_margin + bottom_margin + 390 vsync_plus_bp + GTF_MIN_V_PORCH; 391 /* 11. Estimate the Vertical field frequency: */ 392 vfieldrate_est = hfreq_est / vtotal_lines; 393 /* 12. Find the actual horizontal period: */ 394 hperiod = 1000000 / (vfieldrate_rqd * vtotal_lines); 395 396 /* 13. Find the actual Vertical field frequency: */ 397 vfield_rate = hfreq_est / vtotal_lines; 398 /* 14. Find the Vertical frame frequency: */ 399 if (interlaced) 400 vframe_rate = vfield_rate / 2; 401 else 402 vframe_rate = vfield_rate; 403 /* 15. Find number of pixels in left margin: */ 404 if (margins) 405 left_margin = (hdisplay_rnd * GTF_MARGIN_PERCENTAGE + 500) / 406 1000; 407 else 408 left_margin = 0; 409 410 /* 16.Find number of pixels in right margin: */ 411 right_margin = left_margin; 412 /* 17.Find total number of active pixels in image and left and right */ 413 total_active_pixels = hdisplay_rnd + left_margin + right_margin; 414 /* 18.Find the ideal blanking duty cycle from blanking duty cycle */ 415 ideal_duty_cycle = GTF_C_PRIME * 1000 - 416 (GTF_M_PRIME * 1000000 / hfreq_est); 417 /* 19.Find the number of pixels in the blanking time to the nearest 418 * double character cell: */ 419 hblank = total_active_pixels * ideal_duty_cycle / 420 (100000 - ideal_duty_cycle); 421 hblank = (hblank + GTF_CELL_GRAN) / (2 * GTF_CELL_GRAN); 422 hblank = hblank * 2 * GTF_CELL_GRAN; 423 /* 20.Find total number of pixels: */ 424 total_pixels = total_active_pixels + hblank; 425 /* 21.Find pixel clock frequency: */ 426 pixel_freq = total_pixels * hfreq_est / 1000; 427 /* Stage 1 computations are now complete; I should really pass 428 * the results to another function and do the Stage 2 computations, 429 * but I only need a few more values so I'll just append the 430 * computations here for now */ 431 /* 17. Find the number of pixels in the horizontal sync period: */ 432 hsync = H_SYNC_PERCENT * total_pixels / 100; 433 hsync = (hsync + GTF_CELL_GRAN / 2) / GTF_CELL_GRAN; 434 hsync = hsync * GTF_CELL_GRAN; 435 /* 18. Find the number of pixels in horizontal front porch period */ 436 hfront_porch = hblank / 2 - hsync; 437 /* 36. Find the number of lines in the odd front porch period: */ 438 vodd_front_porch_lines = GTF_MIN_V_PORCH ; 439 440 /* finally, pack the results in the mode struct */ 441 drm_mode->hdisplay = hdisplay_rnd; 442 drm_mode->hsync_start = hdisplay_rnd + hfront_porch; 443 drm_mode->hsync_end = drm_mode->hsync_start + hsync; 444 drm_mode->htotal = total_pixels; 445 drm_mode->vdisplay = vdisplay_rnd; 446 drm_mode->vsync_start = vdisplay_rnd + vodd_front_porch_lines; 447 drm_mode->vsync_end = drm_mode->vsync_start + V_SYNC_RQD; 448 drm_mode->vtotal = vtotal_lines; 449 450 drm_mode->clock = pixel_freq; 451 452 if (interlaced) { 453 drm_mode->vtotal *= 2; 454 drm_mode->flags |= DRM_MODE_FLAG_INTERLACE; 455 } 456 457 drm_mode_set_name(drm_mode); 458 if (GTF_M == 600 && GTF_2C == 80 && GTF_K == 128 && GTF_2J == 40) 459 drm_mode->flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC; 460 else 461 drm_mode->flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC; 462 463 return drm_mode; 464 } 465 466 /** 467 * drm_gtf_mode - create the modeline based on GTF algorithm 468 * 469 * @dev :drm device 470 * @hdisplay :hdisplay size 471 * @vdisplay :vdisplay size 472 * @vrefresh :vrefresh rate. 473 * @interlaced :whether the interlace is supported 474 * @margins :whether the margin is supported 475 * 476 * LOCKING. 477 * none. 478 * 479 * return the modeline based on GTF algorithm 480 * 481 * This function is to create the modeline based on the GTF algorithm. 482 * Generalized Timing Formula is derived from: 483 * GTF Spreadsheet by Andy Morrish (1/5/97) 484 * available at http://www.vesa.org 485 * 486 * And it is copied from the file of xserver/hw/xfree86/modes/xf86gtf.c. 487 * What I have done is to translate it by using integer calculation. 488 * I also refer to the function of fb_get_mode in the file of 489 * drivers/video/fbmon.c 490 * 491 * Standard GTF parameters: 492 * M = 600 493 * C = 40 494 * K = 128 495 * J = 20 496 */ 497 struct drm_display_mode * 498 drm_gtf_mode(struct drm_device *dev, int hdisplay, int vdisplay, int vrefresh, 499 bool lace, int margins) 500 { 501 return drm_gtf_mode_complex(dev, hdisplay, vdisplay, vrefresh, lace, 502 margins, 600, 40 * 2, 128, 20 * 2); 503 } 504 505 /** 506 * drm_mode_set_name - set the name on a mode 507 * @mode: name will be set in this mode 508 * 509 * LOCKING: 510 * None. 511 * 512 * Set the name of @mode to a standard format. 513 */ 514 void drm_mode_set_name(struct drm_display_mode *mode) 515 { 516 bool interlaced = !!(mode->flags & DRM_MODE_FLAG_INTERLACE); 517 518 ksnprintf(mode->name, DRM_DISPLAY_MODE_LEN, "%dx%d%s", 519 mode->hdisplay, mode->vdisplay, 520 interlaced ? "i" : ""); 521 } 522 523 /** 524 * drm_mode_list_concat - move modes from one list to another 525 * @head: source list 526 * @new: dst list 527 * 528 * LOCKING: 529 * Caller must ensure both lists are locked. 530 * 531 * Move all the modes from @head to @new. 532 */ 533 void drm_mode_list_concat(struct list_head *head, struct list_head *new) 534 { 535 536 struct list_head *entry, *tmp; 537 538 list_for_each_safe(entry, tmp, head) { 539 list_move_tail(entry, new); 540 } 541 } 542 543 /** 544 * drm_mode_width - get the width of a mode 545 * @mode: mode 546 * 547 * LOCKING: 548 * None. 549 * 550 * Return @mode's width (hdisplay) value. 551 * 552 * FIXME: is this needed? 553 * 554 * RETURNS: 555 * @mode->hdisplay 556 */ 557 int drm_mode_width(struct drm_display_mode *mode) 558 { 559 return mode->hdisplay; 560 561 } 562 563 /** 564 * drm_mode_height - get the height of a mode 565 * @mode: mode 566 * 567 * LOCKING: 568 * None. 569 * 570 * Return @mode's height (vdisplay) value. 571 * 572 * FIXME: is this needed? 573 * 574 * RETURNS: 575 * @mode->vdisplay 576 */ 577 int drm_mode_height(struct drm_display_mode *mode) 578 { 579 return mode->vdisplay; 580 } 581 582 /** drm_mode_hsync - get the hsync of a mode 583 * @mode: mode 584 * 585 * LOCKING: 586 * None. 587 * 588 * Return @modes's hsync rate in kHz, rounded to the nearest int. 589 */ 590 int drm_mode_hsync(const struct drm_display_mode *mode) 591 { 592 unsigned int calc_val; 593 594 if (mode->hsync) 595 return mode->hsync; 596 597 if (mode->htotal < 0) 598 return 0; 599 600 calc_val = (mode->clock * 1000) / mode->htotal; /* hsync in Hz */ 601 calc_val += 500; /* round to 1000Hz */ 602 calc_val /= 1000; /* truncate to kHz */ 603 604 return calc_val; 605 } 606 607 /** 608 * drm_mode_vrefresh - get the vrefresh of a mode 609 * @mode: mode 610 * 611 * LOCKING: 612 * None. 613 * 614 * Return @mode's vrefresh rate in Hz or calculate it if necessary. 615 * 616 * FIXME: why is this needed? shouldn't vrefresh be set already? 617 * 618 * RETURNS: 619 * Vertical refresh rate. It will be the result of actual value plus 0.5. 620 * If it is 70.288, it will return 70Hz. 621 * If it is 59.6, it will return 60Hz. 622 */ 623 int drm_mode_vrefresh(const struct drm_display_mode *mode) 624 { 625 int refresh = 0; 626 unsigned int calc_val; 627 628 if (mode->vrefresh > 0) 629 refresh = mode->vrefresh; 630 else if (mode->htotal > 0 && mode->vtotal > 0) { 631 int vtotal; 632 vtotal = mode->vtotal; 633 /* work out vrefresh the value will be x1000 */ 634 calc_val = (mode->clock * 1000); 635 calc_val /= mode->htotal; 636 refresh = (calc_val + vtotal / 2) / vtotal; 637 638 if (mode->flags & DRM_MODE_FLAG_INTERLACE) 639 refresh *= 2; 640 if (mode->flags & DRM_MODE_FLAG_DBLSCAN) 641 refresh /= 2; 642 if (mode->vscan > 1) 643 refresh /= mode->vscan; 644 } 645 return refresh; 646 } 647 648 /** 649 * drm_mode_set_crtcinfo - set CRTC modesetting parameters 650 * @p: mode 651 * @adjust_flags: unused? (FIXME) 652 * 653 * LOCKING: 654 * None. 655 * 656 * Setup the CRTC modesetting parameters for @p, adjusting if necessary. 657 */ 658 void drm_mode_set_crtcinfo(struct drm_display_mode *p, int adjust_flags) 659 { 660 if ((p == NULL) || ((p->type & DRM_MODE_TYPE_CRTC_C) == DRM_MODE_TYPE_BUILTIN)) 661 return; 662 663 p->crtc_hdisplay = p->hdisplay; 664 p->crtc_hsync_start = p->hsync_start; 665 p->crtc_hsync_end = p->hsync_end; 666 p->crtc_htotal = p->htotal; 667 p->crtc_hskew = p->hskew; 668 p->crtc_vdisplay = p->vdisplay; 669 p->crtc_vsync_start = p->vsync_start; 670 p->crtc_vsync_end = p->vsync_end; 671 p->crtc_vtotal = p->vtotal; 672 673 if (p->flags & DRM_MODE_FLAG_INTERLACE) { 674 if (adjust_flags & CRTC_INTERLACE_HALVE_V) { 675 p->crtc_vdisplay /= 2; 676 p->crtc_vsync_start /= 2; 677 p->crtc_vsync_end /= 2; 678 p->crtc_vtotal /= 2; 679 } 680 681 p->crtc_vtotal |= 1; 682 } 683 684 if (p->flags & DRM_MODE_FLAG_DBLSCAN) { 685 p->crtc_vdisplay *= 2; 686 p->crtc_vsync_start *= 2; 687 p->crtc_vsync_end *= 2; 688 p->crtc_vtotal *= 2; 689 } 690 691 if (p->vscan > 1) { 692 p->crtc_vdisplay *= p->vscan; 693 p->crtc_vsync_start *= p->vscan; 694 p->crtc_vsync_end *= p->vscan; 695 p->crtc_vtotal *= p->vscan; 696 } 697 698 p->crtc_vblank_start = min(p->crtc_vsync_start, p->crtc_vdisplay); 699 p->crtc_vblank_end = max(p->crtc_vsync_end, p->crtc_vtotal); 700 p->crtc_hblank_start = min(p->crtc_hsync_start, p->crtc_hdisplay); 701 p->crtc_hblank_end = max(p->crtc_hsync_end, p->crtc_htotal); 702 703 p->crtc_hadjusted = false; 704 p->crtc_vadjusted = false; 705 } 706 707 708 /** 709 * drm_mode_duplicate - allocate and duplicate an existing mode 710 * @m: mode to duplicate 711 * 712 * LOCKING: 713 * None. 714 * 715 * Just allocate a new mode, copy the existing mode into it, and return 716 * a pointer to it. Used to create new instances of established modes. 717 */ 718 struct drm_display_mode *drm_mode_duplicate(struct drm_device *dev, 719 const struct drm_display_mode *mode) 720 { 721 struct drm_display_mode *nmode; 722 int new_id; 723 724 nmode = drm_mode_create(dev); 725 if (!nmode) 726 return NULL; 727 728 new_id = nmode->base.id; 729 *nmode = *mode; 730 nmode->base.id = new_id; 731 INIT_LIST_HEAD(&nmode->head); 732 return nmode; 733 } 734 735 /** 736 * drm_mode_equal - test modes for equality 737 * @mode1: first mode 738 * @mode2: second mode 739 * 740 * LOCKING: 741 * None. 742 * 743 * Check to see if @mode1 and @mode2 are equivalent. 744 * 745 * RETURNS: 746 * true if the modes are equal, false otherwise. 747 */ 748 bool drm_mode_equal(struct drm_display_mode *mode1, struct drm_display_mode *mode2) 749 { 750 /* do clock check convert to PICOS so fb modes get matched 751 * the same */ 752 if (mode1->clock && mode2->clock) { 753 if (KHZ2PICOS(mode1->clock) != KHZ2PICOS(mode2->clock)) 754 return false; 755 } else if (mode1->clock != mode2->clock) 756 return false; 757 758 if (mode1->hdisplay == mode2->hdisplay && 759 mode1->hsync_start == mode2->hsync_start && 760 mode1->hsync_end == mode2->hsync_end && 761 mode1->htotal == mode2->htotal && 762 mode1->hskew == mode2->hskew && 763 mode1->vdisplay == mode2->vdisplay && 764 mode1->vsync_start == mode2->vsync_start && 765 mode1->vsync_end == mode2->vsync_end && 766 mode1->vtotal == mode2->vtotal && 767 mode1->vscan == mode2->vscan && 768 mode1->flags == mode2->flags) 769 return true; 770 771 return false; 772 } 773 774 /** 775 * drm_mode_validate_size - make sure modes adhere to size constraints 776 * @dev: DRM device 777 * @mode_list: list of modes to check 778 * @maxX: maximum width 779 * @maxY: maximum height 780 * @maxPitch: max pitch 781 * 782 * LOCKING: 783 * Caller must hold a lock protecting @mode_list. 784 * 785 * The DRM device (@dev) has size and pitch limits. Here we validate the 786 * modes we probed for @dev against those limits and set their status as 787 * necessary. 788 */ 789 void drm_mode_validate_size(struct drm_device *dev, 790 struct list_head *mode_list, 791 int maxX, int maxY, int maxPitch) 792 { 793 struct drm_display_mode *mode; 794 795 list_for_each_entry(mode, mode_list, head) { 796 if (maxPitch > 0 && mode->hdisplay > maxPitch) 797 mode->status = MODE_BAD_WIDTH; 798 799 if (maxX > 0 && mode->hdisplay > maxX) 800 mode->status = MODE_VIRTUAL_X; 801 802 if (maxY > 0 && mode->vdisplay > maxY) 803 mode->status = MODE_VIRTUAL_Y; 804 } 805 } 806 807 /** 808 * drm_mode_validate_clocks - validate modes against clock limits 809 * @dev: DRM device 810 * @mode_list: list of modes to check 811 * @min: minimum clock rate array 812 * @max: maximum clock rate array 813 * @n_ranges: number of clock ranges (size of arrays) 814 * 815 * LOCKING: 816 * Caller must hold a lock protecting @mode_list. 817 * 818 * Some code may need to check a mode list against the clock limits of the 819 * device in question. This function walks the mode list, testing to make 820 * sure each mode falls within a given range (defined by @min and @max 821 * arrays) and sets @mode->status as needed. 822 */ 823 void drm_mode_validate_clocks(struct drm_device *dev, 824 struct list_head *mode_list, 825 int *min, int *max, int n_ranges) 826 { 827 struct drm_display_mode *mode; 828 int i; 829 830 list_for_each_entry(mode, mode_list, head) { 831 bool good = false; 832 for (i = 0; i < n_ranges; i++) { 833 if (mode->clock >= min[i] && mode->clock <= max[i]) { 834 good = true; 835 break; 836 } 837 } 838 if (!good) 839 mode->status = MODE_CLOCK_RANGE; 840 } 841 } 842 843 /** 844 * drm_mode_prune_invalid - remove invalid modes from mode list 845 * @dev: DRM device 846 * @mode_list: list of modes to check 847 * @verbose: be verbose about it 848 * 849 * LOCKING: 850 * Caller must hold a lock protecting @mode_list. 851 * 852 * Once mode list generation is complete, a caller can use this routine to 853 * remove invalid modes from a mode list. If any of the modes have a 854 * status other than %MODE_OK, they are removed from @mode_list and freed. 855 */ 856 void drm_mode_prune_invalid(struct drm_device *dev, 857 struct list_head *mode_list, bool verbose) 858 { 859 struct drm_display_mode *mode, *t; 860 861 list_for_each_entry_safe(mode, t, mode_list, head) { 862 if (mode->status != MODE_OK) { 863 list_del(&mode->head); 864 if (verbose) { 865 drm_mode_debug_printmodeline(mode); 866 DRM_DEBUG_KMS("Not using %s mode %d\n", 867 mode->name, mode->status); 868 } 869 drm_mode_destroy(dev, mode); 870 } 871 } 872 } 873 874 /** 875 * drm_mode_compare - compare modes for favorability 876 * @priv: unused 877 * @lh_a: list_head for first mode 878 * @lh_b: list_head for second mode 879 * 880 * LOCKING: 881 * None. 882 * 883 * Compare two modes, given by @lh_a and @lh_b, returning a value indicating 884 * which is better. 885 * 886 * RETURNS: 887 * Negative if @lh_a is better than @lh_b, zero if they're equivalent, or 888 * positive if @lh_b is better than @lh_a. 889 */ 890 static int drm_mode_compare(void *priv, struct list_head *lh_a, struct list_head *lh_b) 891 { 892 struct drm_display_mode *a = list_entry(lh_a, struct drm_display_mode, head); 893 struct drm_display_mode *b = list_entry(lh_b, struct drm_display_mode, head); 894 int diff; 895 896 diff = ((b->type & DRM_MODE_TYPE_PREFERRED) != 0) - 897 ((a->type & DRM_MODE_TYPE_PREFERRED) != 0); 898 if (diff) 899 return diff; 900 diff = b->hdisplay * b->vdisplay - a->hdisplay * a->vdisplay; 901 if (diff) 902 return diff; 903 diff = b->clock - a->clock; 904 return diff; 905 } 906 907 /** 908 * drm_mode_sort - sort mode list 909 * @mode_list: list to sort 910 * 911 * LOCKING: 912 * Caller must hold a lock protecting @mode_list. 913 * 914 * Sort @mode_list by favorability, putting good modes first. 915 */ 916 void drm_mode_sort(struct list_head *mode_list) 917 { 918 drm_list_sort(NULL, mode_list, drm_mode_compare); 919 } 920 921 /** 922 * drm_mode_connector_list_update - update the mode list for the connector 923 * @connector: the connector to update 924 * 925 * LOCKING: 926 * Caller must hold a lock protecting @mode_list. 927 * 928 * This moves the modes from the @connector probed_modes list 929 * to the actual mode list. It compares the probed mode against the current 930 * list and only adds different modes. All modes unverified after this point 931 * will be removed by the prune invalid modes. 932 */ 933 void drm_mode_connector_list_update(struct drm_connector *connector) 934 { 935 struct drm_display_mode *mode; 936 struct drm_display_mode *pmode, *pt; 937 int found_it; 938 939 list_for_each_entry_safe(pmode, pt, &connector->probed_modes, 940 head) { 941 found_it = 0; 942 /* go through current modes checking for the new probed mode */ 943 list_for_each_entry(mode, &connector->modes, head) { 944 if (drm_mode_equal(pmode, mode)) { 945 found_it = 1; 946 /* if equal delete the probed mode */ 947 mode->status = pmode->status; 948 /* Merge type bits together */ 949 mode->type |= pmode->type; 950 list_del(&pmode->head); 951 drm_mode_destroy(connector->dev, pmode); 952 break; 953 } 954 } 955 956 if (!found_it) { 957 list_move_tail(&pmode->head, &connector->modes); 958 } 959 } 960 } 961 962 /** 963 * drm_mode_parse_command_line_for_connector - parse command line for connector 964 * @mode_option - per connector mode option 965 * @connector - connector to parse line for 966 * 967 * This parses the connector specific then generic command lines for 968 * modes and options to configure the connector. 969 * 970 * This uses the same parameters as the fb modedb.c, except for extra 971 * <xres>x<yres>[M][R][-<bpp>][@<refresh>][i][m][eDd] 972 * 973 * enable/enable Digital/disable bit at the end 974 */ 975 bool drm_mode_parse_command_line_for_connector(const char *mode_option, 976 struct drm_connector *connector, 977 struct drm_cmdline_mode *mode) 978 { 979 const char *name; 980 unsigned int namelen; 981 bool res_specified = false, bpp_specified = false, refresh_specified = false; 982 unsigned int xres = 0, yres = 0, bpp = 32, refresh = 0; 983 bool yres_specified = false, cvt = false, rb = false; 984 bool interlace = false, margins = false, was_digit = false; 985 int i; 986 enum drm_connector_force force = DRM_FORCE_UNSPECIFIED; 987 988 #ifdef XXX_CONFIG_FB 989 if (!mode_option) 990 mode_option = fb_mode_option; 991 #endif 992 993 if (!mode_option) { 994 mode->specified = false; 995 return false; 996 } 997 998 name = mode_option; 999 namelen = strlen(name); 1000 for (i = namelen-1; i >= 0; i--) { 1001 switch (name[i]) { 1002 case '@': 1003 if (!refresh_specified && !bpp_specified && 1004 !yres_specified && !cvt && !rb && was_digit) { 1005 refresh = strtol(&name[i+1], NULL, 10); 1006 refresh_specified = true; 1007 was_digit = false; 1008 } else 1009 goto done; 1010 break; 1011 case '-': 1012 if (!bpp_specified && !yres_specified && !cvt && 1013 !rb && was_digit) { 1014 bpp = strtol(&name[i+1], NULL, 10); 1015 bpp_specified = true; 1016 was_digit = false; 1017 } else 1018 goto done; 1019 break; 1020 case 'x': 1021 if (!yres_specified && was_digit) { 1022 yres = strtol(&name[i+1], NULL, 10); 1023 yres_specified = true; 1024 was_digit = false; 1025 } else 1026 goto done; 1027 case '0' ... '9': 1028 was_digit = true; 1029 break; 1030 case 'M': 1031 if (yres_specified || cvt || was_digit) 1032 goto done; 1033 cvt = true; 1034 break; 1035 case 'R': 1036 if (yres_specified || cvt || rb || was_digit) 1037 goto done; 1038 rb = true; 1039 break; 1040 case 'm': 1041 if (cvt || yres_specified || was_digit) 1042 goto done; 1043 margins = true; 1044 break; 1045 case 'i': 1046 if (cvt || yres_specified || was_digit) 1047 goto done; 1048 interlace = true; 1049 break; 1050 case 'e': 1051 if (yres_specified || bpp_specified || refresh_specified || 1052 was_digit || (force != DRM_FORCE_UNSPECIFIED)) 1053 goto done; 1054 1055 force = DRM_FORCE_ON; 1056 break; 1057 case 'D': 1058 if (yres_specified || bpp_specified || refresh_specified || 1059 was_digit || (force != DRM_FORCE_UNSPECIFIED)) 1060 goto done; 1061 1062 if ((connector->connector_type != DRM_MODE_CONNECTOR_DVII) && 1063 (connector->connector_type != DRM_MODE_CONNECTOR_HDMIB)) 1064 force = DRM_FORCE_ON; 1065 else 1066 force = DRM_FORCE_ON_DIGITAL; 1067 break; 1068 case 'd': 1069 if (yres_specified || bpp_specified || refresh_specified || 1070 was_digit || (force != DRM_FORCE_UNSPECIFIED)) 1071 goto done; 1072 1073 force = DRM_FORCE_OFF; 1074 break; 1075 default: 1076 goto done; 1077 } 1078 } 1079 1080 if (i < 0 && yres_specified) { 1081 char *ch; 1082 xres = strtol(name, &ch, 10); 1083 if ((ch != NULL) && (*ch == 'x')) 1084 res_specified = true; 1085 else 1086 i = ch - name; 1087 } else if (!yres_specified && was_digit) { 1088 /* catch mode that begins with digits but has no 'x' */ 1089 i = 0; 1090 } 1091 done: 1092 if (i >= 0) { 1093 kprintf("parse error at position %i in video mode '%s'\n", 1094 i, name); 1095 mode->specified = false; 1096 return false; 1097 } 1098 1099 if (res_specified) { 1100 mode->specified = true; 1101 mode->xres = xres; 1102 mode->yres = yres; 1103 } 1104 1105 if (refresh_specified) { 1106 mode->refresh_specified = true; 1107 mode->refresh = refresh; 1108 } 1109 1110 if (bpp_specified) { 1111 mode->bpp_specified = true; 1112 mode->bpp = bpp; 1113 } 1114 mode->rb = rb; 1115 mode->cvt = cvt; 1116 mode->interlace = interlace; 1117 mode->margins = margins; 1118 mode->force = force; 1119 1120 return true; 1121 } 1122 1123 struct drm_display_mode * 1124 drm_mode_create_from_cmdline_mode(struct drm_device *dev, 1125 struct drm_cmdline_mode *cmd) 1126 { 1127 struct drm_display_mode *mode; 1128 1129 if (cmd->cvt) 1130 mode = drm_cvt_mode(dev, 1131 cmd->xres, cmd->yres, 1132 cmd->refresh_specified ? cmd->refresh : 60, 1133 cmd->rb, cmd->interlace, 1134 cmd->margins); 1135 else 1136 mode = drm_gtf_mode(dev, 1137 cmd->xres, cmd->yres, 1138 cmd->refresh_specified ? cmd->refresh : 60, 1139 cmd->interlace, 1140 cmd->margins); 1141 if (!mode) 1142 return NULL; 1143 1144 drm_mode_set_crtcinfo(mode, CRTC_INTERLACE_HALVE_V); 1145 return mode; 1146 } 1147