xref: /dflybsd-src/sys/dev/drm/amd/display/dc/inc/link_hwss.h (revision b843c749addef9340ee7d4e250b09fdd492602a1)
1*b843c749SSergey Zigachev /*
2*b843c749SSergey Zigachev  * Copyright 2015 Advanced Micro Devices, Inc.
3*b843c749SSergey Zigachev  *
4*b843c749SSergey Zigachev  * Permission is hereby granted, free of charge, to any person obtaining a
5*b843c749SSergey Zigachev  * copy of this software and associated documentation files (the "Software"),
6*b843c749SSergey Zigachev  * to deal in the Software without restriction, including without limitation
7*b843c749SSergey Zigachev  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8*b843c749SSergey Zigachev  * and/or sell copies of the Software, and to permit persons to whom the
9*b843c749SSergey Zigachev  * Software is furnished to do so, subject to the following conditions:
10*b843c749SSergey Zigachev  *
11*b843c749SSergey Zigachev  * The above copyright notice and this permission notice shall be included in
12*b843c749SSergey Zigachev  * all copies or substantial portions of the Software.
13*b843c749SSergey Zigachev  *
14*b843c749SSergey Zigachev  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15*b843c749SSergey Zigachev  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16*b843c749SSergey Zigachev  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17*b843c749SSergey Zigachev  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18*b843c749SSergey Zigachev  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19*b843c749SSergey Zigachev  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20*b843c749SSergey Zigachev  * OTHER DEALINGS IN THE SOFTWARE.
21*b843c749SSergey Zigachev  *
22*b843c749SSergey Zigachev  * Authors: AMD
23*b843c749SSergey Zigachev  *
24*b843c749SSergey Zigachev  */
25*b843c749SSergey Zigachev 
26*b843c749SSergey Zigachev #ifndef __DC_LINK_HWSS_H__
27*b843c749SSergey Zigachev #define __DC_LINK_HWSS_H__
28*b843c749SSergey Zigachev 
29*b843c749SSergey Zigachev #include "inc/core_status.h"
30*b843c749SSergey Zigachev 
31*b843c749SSergey Zigachev enum dc_status core_link_read_dpcd(
32*b843c749SSergey Zigachev 	struct dc_link *link,
33*b843c749SSergey Zigachev 	uint32_t address,
34*b843c749SSergey Zigachev 	uint8_t *data,
35*b843c749SSergey Zigachev 	uint32_t size);
36*b843c749SSergey Zigachev 
37*b843c749SSergey Zigachev enum dc_status core_link_write_dpcd(
38*b843c749SSergey Zigachev 	struct dc_link *link,
39*b843c749SSergey Zigachev 	uint32_t address,
40*b843c749SSergey Zigachev 	const uint8_t *data,
41*b843c749SSergey Zigachev 	uint32_t size);
42*b843c749SSergey Zigachev 
43*b843c749SSergey Zigachev struct gpio *get_hpd_gpio(struct dc_bios *dcb,
44*b843c749SSergey Zigachev 		struct graphics_object_id link_id,
45*b843c749SSergey Zigachev 		struct gpio_service *gpio_service);
46*b843c749SSergey Zigachev 
47*b843c749SSergey Zigachev void dp_enable_link_phy(
48*b843c749SSergey Zigachev 	struct dc_link *link,
49*b843c749SSergey Zigachev 	enum signal_type signal,
50*b843c749SSergey Zigachev 	enum clock_source_id clock_source,
51*b843c749SSergey Zigachev 	const struct dc_link_settings *link_settings);
52*b843c749SSergey Zigachev 
53*b843c749SSergey Zigachev void dp_receiver_power_ctrl(struct dc_link *link, bool on);
54*b843c749SSergey Zigachev bool edp_receiver_ready_T9(struct dc_link *link);
55*b843c749SSergey Zigachev bool edp_receiver_ready_T7(struct dc_link *link);
56*b843c749SSergey Zigachev 
57*b843c749SSergey Zigachev void dp_disable_link_phy(struct dc_link *link, enum signal_type signal);
58*b843c749SSergey Zigachev 
59*b843c749SSergey Zigachev void dp_disable_link_phy_mst(struct dc_link *link, enum signal_type signal);
60*b843c749SSergey Zigachev 
61*b843c749SSergey Zigachev bool dp_set_hw_training_pattern(
62*b843c749SSergey Zigachev 	struct dc_link *link,
63*b843c749SSergey Zigachev 	enum hw_dp_training_pattern pattern);
64*b843c749SSergey Zigachev 
65*b843c749SSergey Zigachev void dp_set_hw_lane_settings(
66*b843c749SSergey Zigachev 	struct dc_link *link,
67*b843c749SSergey Zigachev 	const struct link_training_settings *link_settings);
68*b843c749SSergey Zigachev 
69*b843c749SSergey Zigachev void dp_set_hw_test_pattern(
70*b843c749SSergey Zigachev 	struct dc_link *link,
71*b843c749SSergey Zigachev 	enum dp_test_pattern test_pattern,
72*b843c749SSergey Zigachev 	uint8_t *custom_pattern,
73*b843c749SSergey Zigachev 	uint32_t custom_pattern_size);
74*b843c749SSergey Zigachev 
75*b843c749SSergey Zigachev enum dp_panel_mode dp_get_panel_mode(struct dc_link *link);
76*b843c749SSergey Zigachev 
77*b843c749SSergey Zigachev void dp_retrain_link_dp_test(struct dc_link *link,
78*b843c749SSergey Zigachev 		struct dc_link_settings *link_setting,
79*b843c749SSergey Zigachev 		bool skip_video_pattern);
80*b843c749SSergey Zigachev 
81*b843c749SSergey Zigachev #endif /* __DC_LINK_HWSS_H__ */
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