1*b843c749SSergey Zigachev /* 2*b843c749SSergey Zigachev * Copyright 2012-15 Advanced Micro Devices, Inc. 3*b843c749SSergey Zigachev * 4*b843c749SSergey Zigachev * Permission is hereby granted, free of charge, to any person obtaining a 5*b843c749SSergey Zigachev * copy of this software and associated documentation files (the "Software"), 6*b843c749SSergey Zigachev * to deal in the Software without restriction, including without limitation 7*b843c749SSergey Zigachev * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8*b843c749SSergey Zigachev * and/or sell copies of the Software, and to permit persons to whom the 9*b843c749SSergey Zigachev * Software is furnished to do so, subject to the following conditions: 10*b843c749SSergey Zigachev * 11*b843c749SSergey Zigachev * The above copyright notice and this permission notice shall be included in 12*b843c749SSergey Zigachev * all copies or substantial portions of the Software. 13*b843c749SSergey Zigachev * 14*b843c749SSergey Zigachev * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15*b843c749SSergey Zigachev * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16*b843c749SSergey Zigachev * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17*b843c749SSergey Zigachev * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18*b843c749SSergey Zigachev * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19*b843c749SSergey Zigachev * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20*b843c749SSergey Zigachev * OTHER DEALINGS IN THE SOFTWARE. 21*b843c749SSergey Zigachev * 22*b843c749SSergey Zigachev * Authors: AMD 23*b843c749SSergey Zigachev * 24*b843c749SSergey Zigachev */ 25*b843c749SSergey Zigachev 26*b843c749SSergey Zigachev #ifndef __DAL_DDC_SERVICE_H__ 27*b843c749SSergey Zigachev #define __DAL_DDC_SERVICE_H__ 28*b843c749SSergey Zigachev 29*b843c749SSergey Zigachev #include "include/ddc_service_types.h" 30*b843c749SSergey Zigachev #include "include/i2caux_interface.h" 31*b843c749SSergey Zigachev 32*b843c749SSergey Zigachev #define EDID_SEGMENT_SIZE 256 33*b843c749SSergey Zigachev 34*b843c749SSergey Zigachev /* Address range from 0x00 to 0x1F.*/ 35*b843c749SSergey Zigachev #define DP_ADAPTOR_TYPE2_SIZE 0x20 36*b843c749SSergey Zigachev #define DP_ADAPTOR_TYPE2_REG_ID 0x10 37*b843c749SSergey Zigachev #define DP_ADAPTOR_TYPE2_REG_MAX_TMDS_CLK 0x1D 38*b843c749SSergey Zigachev /* Identifies adaptor as Dual-mode adaptor */ 39*b843c749SSergey Zigachev #define DP_ADAPTOR_TYPE2_ID 0xA0 40*b843c749SSergey Zigachev /* MHz*/ 41*b843c749SSergey Zigachev #define DP_ADAPTOR_TYPE2_MAX_TMDS_CLK 600 42*b843c749SSergey Zigachev /* MHz*/ 43*b843c749SSergey Zigachev #define DP_ADAPTOR_TYPE2_MIN_TMDS_CLK 25 44*b843c749SSergey Zigachev /* kHZ*/ 45*b843c749SSergey Zigachev #define DP_ADAPTOR_DVI_MAX_TMDS_CLK 165000 46*b843c749SSergey Zigachev /* kHZ*/ 47*b843c749SSergey Zigachev #define DP_ADAPTOR_HDMI_SAFE_MAX_TMDS_CLK 165000 48*b843c749SSergey Zigachev 49*b843c749SSergey Zigachev #define DDC_I2C_COMMAND_ENGINE I2C_COMMAND_ENGINE_SW 50*b843c749SSergey Zigachev 51*b843c749SSergey Zigachev struct ddc_service; 52*b843c749SSergey Zigachev struct graphics_object_id; 53*b843c749SSergey Zigachev enum ddc_result; 54*b843c749SSergey Zigachev struct av_sync_data; 55*b843c749SSergey Zigachev struct dp_receiver_id_info; 56*b843c749SSergey Zigachev 57*b843c749SSergey Zigachev struct i2c_payloads; 58*b843c749SSergey Zigachev struct aux_payloads; 59*b843c749SSergey Zigachev 60*b843c749SSergey Zigachev void dal_ddc_i2c_payloads_add( 61*b843c749SSergey Zigachev struct i2c_payloads *payloads, 62*b843c749SSergey Zigachev uint32_t address, 63*b843c749SSergey Zigachev uint32_t len, 64*b843c749SSergey Zigachev uint8_t *data, 65*b843c749SSergey Zigachev bool write); 66*b843c749SSergey Zigachev 67*b843c749SSergey Zigachev void dal_ddc_aux_payloads_add( 68*b843c749SSergey Zigachev struct aux_payloads *payloads, 69*b843c749SSergey Zigachev uint32_t address, 70*b843c749SSergey Zigachev uint32_t len, 71*b843c749SSergey Zigachev uint8_t *data, 72*b843c749SSergey Zigachev bool write); 73*b843c749SSergey Zigachev 74*b843c749SSergey Zigachev struct ddc_service_init_data { 75*b843c749SSergey Zigachev struct graphics_object_id id; 76*b843c749SSergey Zigachev struct dc_context *ctx; 77*b843c749SSergey Zigachev struct dc_link *link; 78*b843c749SSergey Zigachev }; 79*b843c749SSergey Zigachev 80*b843c749SSergey Zigachev struct ddc_service *dal_ddc_service_create( 81*b843c749SSergey Zigachev struct ddc_service_init_data *ddc_init_data); 82*b843c749SSergey Zigachev 83*b843c749SSergey Zigachev void dal_ddc_service_destroy(struct ddc_service **ddc); 84*b843c749SSergey Zigachev 85*b843c749SSergey Zigachev enum ddc_service_type dal_ddc_service_get_type(struct ddc_service *ddc); 86*b843c749SSergey Zigachev 87*b843c749SSergey Zigachev void dal_ddc_service_set_transaction_type( 88*b843c749SSergey Zigachev struct ddc_service *ddc, 89*b843c749SSergey Zigachev enum ddc_transaction_type type); 90*b843c749SSergey Zigachev 91*b843c749SSergey Zigachev bool dal_ddc_service_is_in_aux_transaction_mode(struct ddc_service *ddc); 92*b843c749SSergey Zigachev 93*b843c749SSergey Zigachev void dal_ddc_service_i2c_query_dp_dual_mode_adaptor( 94*b843c749SSergey Zigachev struct ddc_service *ddc, 95*b843c749SSergey Zigachev struct display_sink_capability *sink_cap); 96*b843c749SSergey Zigachev 97*b843c749SSergey Zigachev bool dal_ddc_service_query_ddc_data( 98*b843c749SSergey Zigachev struct ddc_service *ddc, 99*b843c749SSergey Zigachev uint32_t address, 100*b843c749SSergey Zigachev uint8_t *write_buf, 101*b843c749SSergey Zigachev uint32_t write_size, 102*b843c749SSergey Zigachev uint8_t *read_buf, 103*b843c749SSergey Zigachev uint32_t read_size); 104*b843c749SSergey Zigachev 105*b843c749SSergey Zigachev int dc_link_aux_transfer(struct ddc_service *ddc, 106*b843c749SSergey Zigachev unsigned int address, 107*b843c749SSergey Zigachev uint8_t *reply, 108*b843c749SSergey Zigachev void *buffer, 109*b843c749SSergey Zigachev unsigned int size, 110*b843c749SSergey Zigachev enum aux_transaction_type type, 111*b843c749SSergey Zigachev enum i2caux_transaction_action action); 112*b843c749SSergey Zigachev 113*b843c749SSergey Zigachev void dal_ddc_service_write_scdc_data( 114*b843c749SSergey Zigachev struct ddc_service *ddc_service, 115*b843c749SSergey Zigachev uint32_t pix_clk, 116*b843c749SSergey Zigachev bool lte_340_scramble); 117*b843c749SSergey Zigachev 118*b843c749SSergey Zigachev void dal_ddc_service_read_scdc_data( 119*b843c749SSergey Zigachev struct ddc_service *ddc_service); 120*b843c749SSergey Zigachev 121*b843c749SSergey Zigachev void ddc_service_set_dongle_type(struct ddc_service *ddc, 122*b843c749SSergey Zigachev enum display_dongle_type dongle_type); 123*b843c749SSergey Zigachev 124*b843c749SSergey Zigachev void dal_ddc_service_set_ddc_pin( 125*b843c749SSergey Zigachev struct ddc_service *ddc_service, 126*b843c749SSergey Zigachev struct ddc *ddc); 127*b843c749SSergey Zigachev 128*b843c749SSergey Zigachev struct ddc *dal_ddc_service_get_ddc_pin(struct ddc_service *ddc_service); 129*b843c749SSergey Zigachev 130*b843c749SSergey Zigachev uint32_t get_defer_delay(struct ddc_service *ddc); 131*b843c749SSergey Zigachev 132*b843c749SSergey Zigachev #endif /* __DAL_DDC_SERVICE_H__ */ 133*b843c749SSergey Zigachev 134