1*b843c749SSergey Zigachev /*
2*b843c749SSergey Zigachev * Copyright 2012-15 Advanced Micro Devices, Inc.
3*b843c749SSergey Zigachev *
4*b843c749SSergey Zigachev * Permission is hereby granted, free of charge, to any person obtaining a
5*b843c749SSergey Zigachev * copy of this software and associated documentation files (the "Software"),
6*b843c749SSergey Zigachev * to deal in the Software without restriction, including without limitation
7*b843c749SSergey Zigachev * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8*b843c749SSergey Zigachev * and/or sell copies of the Software, and to permit persons to whom the
9*b843c749SSergey Zigachev * Software is furnished to do so, subject to the following conditions:
10*b843c749SSergey Zigachev *
11*b843c749SSergey Zigachev * The above copyright notice and this permission notice shall be included in
12*b843c749SSergey Zigachev * all copies or substantial portions of the Software.
13*b843c749SSergey Zigachev *
14*b843c749SSergey Zigachev * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15*b843c749SSergey Zigachev * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16*b843c749SSergey Zigachev * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17*b843c749SSergey Zigachev * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18*b843c749SSergey Zigachev * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19*b843c749SSergey Zigachev * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20*b843c749SSergey Zigachev * OTHER DEALINGS IN THE SOFTWARE.
21*b843c749SSergey Zigachev *
22*b843c749SSergey Zigachev * Authors: AMD
23*b843c749SSergey Zigachev *
24*b843c749SSergey Zigachev */
25*b843c749SSergey Zigachev
26*b843c749SSergey Zigachev #include "dm_services.h"
27*b843c749SSergey Zigachev
28*b843c749SSergey Zigachev /*
29*b843c749SSergey Zigachev * Pre-requisites: headers required by header of this unit
30*b843c749SSergey Zigachev */
31*b843c749SSergey Zigachev #include "include/gpio_types.h"
32*b843c749SSergey Zigachev
33*b843c749SSergey Zigachev /*
34*b843c749SSergey Zigachev * Header of this unit
35*b843c749SSergey Zigachev */
36*b843c749SSergey Zigachev
37*b843c749SSergey Zigachev #include "hw_translate.h"
38*b843c749SSergey Zigachev
39*b843c749SSergey Zigachev /*
40*b843c749SSergey Zigachev * Post-requisites: headers required by this unit
41*b843c749SSergey Zigachev */
42*b843c749SSergey Zigachev
43*b843c749SSergey Zigachev #include "dce80/hw_translate_dce80.h"
44*b843c749SSergey Zigachev #include "dce110/hw_translate_dce110.h"
45*b843c749SSergey Zigachev #include "dce120/hw_translate_dce120.h"
46*b843c749SSergey Zigachev #if defined(CONFIG_DRM_AMD_DC_DCN1_0)
47*b843c749SSergey Zigachev #include "dcn10/hw_translate_dcn10.h"
48*b843c749SSergey Zigachev #endif
49*b843c749SSergey Zigachev
50*b843c749SSergey Zigachev #include "diagnostics/hw_translate_diag.h"
51*b843c749SSergey Zigachev
52*b843c749SSergey Zigachev /*
53*b843c749SSergey Zigachev * This unit
54*b843c749SSergey Zigachev */
55*b843c749SSergey Zigachev
dal_hw_translate_init(struct hw_translate * translate,enum dce_version dce_version,enum dce_environment dce_environment)56*b843c749SSergey Zigachev bool dal_hw_translate_init(
57*b843c749SSergey Zigachev struct hw_translate *translate,
58*b843c749SSergey Zigachev enum dce_version dce_version,
59*b843c749SSergey Zigachev enum dce_environment dce_environment)
60*b843c749SSergey Zigachev {
61*b843c749SSergey Zigachev if (IS_FPGA_MAXIMUS_DC(dce_environment)) {
62*b843c749SSergey Zigachev dal_hw_translate_diag_fpga_init(translate);
63*b843c749SSergey Zigachev return true;
64*b843c749SSergey Zigachev }
65*b843c749SSergey Zigachev
66*b843c749SSergey Zigachev switch (dce_version) {
67*b843c749SSergey Zigachev case DCE_VERSION_8_0:
68*b843c749SSergey Zigachev case DCE_VERSION_8_1:
69*b843c749SSergey Zigachev case DCE_VERSION_8_3:
70*b843c749SSergey Zigachev dal_hw_translate_dce80_init(translate);
71*b843c749SSergey Zigachev return true;
72*b843c749SSergey Zigachev case DCE_VERSION_10_0:
73*b843c749SSergey Zigachev case DCE_VERSION_11_0:
74*b843c749SSergey Zigachev case DCE_VERSION_11_2:
75*b843c749SSergey Zigachev case DCE_VERSION_11_22:
76*b843c749SSergey Zigachev dal_hw_translate_dce110_init(translate);
77*b843c749SSergey Zigachev return true;
78*b843c749SSergey Zigachev case DCE_VERSION_12_0:
79*b843c749SSergey Zigachev dal_hw_translate_dce120_init(translate);
80*b843c749SSergey Zigachev return true;
81*b843c749SSergey Zigachev #if defined(CONFIG_DRM_AMD_DC_DCN1_0)
82*b843c749SSergey Zigachev case DCN_VERSION_1_0:
83*b843c749SSergey Zigachev dal_hw_translate_dcn10_init(translate);
84*b843c749SSergey Zigachev return true;
85*b843c749SSergey Zigachev #endif
86*b843c749SSergey Zigachev
87*b843c749SSergey Zigachev default:
88*b843c749SSergey Zigachev BREAK_TO_DEBUGGER();
89*b843c749SSergey Zigachev return false;
90*b843c749SSergey Zigachev }
91*b843c749SSergey Zigachev }
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