1*b843c749SSergey Zigachev /* 2*b843c749SSergey Zigachev * Copyright 2012-15 Advanced Micro Devices, Inc. 3*b843c749SSergey Zigachev * 4*b843c749SSergey Zigachev * Permission is hereby granted, free of charge, to any person obtaining a 5*b843c749SSergey Zigachev * copy of this software and associated documentation files (the "Software"), 6*b843c749SSergey Zigachev * to deal in the Software without restriction, including without limitation 7*b843c749SSergey Zigachev * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8*b843c749SSergey Zigachev * and/or sell copies of the Software, and to permit persons to whom the 9*b843c749SSergey Zigachev * Software is furnished to do so, subject to the following conditions: 10*b843c749SSergey Zigachev * 11*b843c749SSergey Zigachev * The above copyright notice and this permission notice shall be included in 12*b843c749SSergey Zigachev * all copies or substantial portions of the Software. 13*b843c749SSergey Zigachev * 14*b843c749SSergey Zigachev * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15*b843c749SSergey Zigachev * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16*b843c749SSergey Zigachev * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17*b843c749SSergey Zigachev * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18*b843c749SSergey Zigachev * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19*b843c749SSergey Zigachev * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20*b843c749SSergey Zigachev * OTHER DEALINGS IN THE SOFTWARE. 21*b843c749SSergey Zigachev * 22*b843c749SSergey Zigachev * Authors: AMD 23*b843c749SSergey Zigachev * 24*b843c749SSergey Zigachev */ 25*b843c749SSergey Zigachev 26*b843c749SSergey Zigachev /** 27*b843c749SSergey Zigachev * This file defines helper functions provided by the Display Manager to 28*b843c749SSergey Zigachev * Display Core. 29*b843c749SSergey Zigachev */ 30*b843c749SSergey Zigachev #ifndef __DM_HELPERS__ 31*b843c749SSergey Zigachev #define __DM_HELPERS__ 32*b843c749SSergey Zigachev 33*b843c749SSergey Zigachev #include "dc_types.h" 34*b843c749SSergey Zigachev #include "dc.h" 35*b843c749SSergey Zigachev 36*b843c749SSergey Zigachev struct dp_mst_stream_allocation_table; 37*b843c749SSergey Zigachev 38*b843c749SSergey Zigachev enum dc_edid_status dm_helpers_parse_edid_caps( 39*b843c749SSergey Zigachev struct dc_context *ctx, 40*b843c749SSergey Zigachev const struct dc_edid *edid, 41*b843c749SSergey Zigachev struct dc_edid_caps *edid_caps); 42*b843c749SSergey Zigachev 43*b843c749SSergey Zigachev 44*b843c749SSergey Zigachev /* 45*b843c749SSergey Zigachev * Update DP branch info 46*b843c749SSergey Zigachev */ 47*b843c749SSergey Zigachev void dm_helpers_dp_update_branch_info( 48*b843c749SSergey Zigachev struct dc_context *ctx, 49*b843c749SSergey Zigachev const struct dc_link *link); 50*b843c749SSergey Zigachev 51*b843c749SSergey Zigachev /* 52*b843c749SSergey Zigachev * Writes payload allocation table in immediate downstream device. 53*b843c749SSergey Zigachev */ 54*b843c749SSergey Zigachev bool dm_helpers_dp_mst_write_payload_allocation_table( 55*b843c749SSergey Zigachev struct dc_context *ctx, 56*b843c749SSergey Zigachev const struct dc_stream_state *stream, 57*b843c749SSergey Zigachev struct dp_mst_stream_allocation_table *proposed_table, 58*b843c749SSergey Zigachev bool enable); 59*b843c749SSergey Zigachev 60*b843c749SSergey Zigachev /* 61*b843c749SSergey Zigachev * Clear payload allocation table before enable MST DP link. 62*b843c749SSergey Zigachev */ 63*b843c749SSergey Zigachev void dm_helpers_dp_mst_clear_payload_allocation_table( 64*b843c749SSergey Zigachev struct dc_context *ctx, 65*b843c749SSergey Zigachev const struct dc_link *link); 66*b843c749SSergey Zigachev 67*b843c749SSergey Zigachev /* 68*b843c749SSergey Zigachev * Polls for ACT (allocation change trigger) handled and 69*b843c749SSergey Zigachev */ 70*b843c749SSergey Zigachev bool dm_helpers_dp_mst_poll_for_allocation_change_trigger( 71*b843c749SSergey Zigachev struct dc_context *ctx, 72*b843c749SSergey Zigachev const struct dc_stream_state *stream); 73*b843c749SSergey Zigachev /* 74*b843c749SSergey Zigachev * Sends ALLOCATE_PAYLOAD message. 75*b843c749SSergey Zigachev */ 76*b843c749SSergey Zigachev bool dm_helpers_dp_mst_send_payload_allocation( 77*b843c749SSergey Zigachev struct dc_context *ctx, 78*b843c749SSergey Zigachev const struct dc_stream_state *stream, 79*b843c749SSergey Zigachev bool enable); 80*b843c749SSergey Zigachev 81*b843c749SSergey Zigachev bool dm_helpers_dp_mst_start_top_mgr( 82*b843c749SSergey Zigachev struct dc_context *ctx, 83*b843c749SSergey Zigachev const struct dc_link *link, 84*b843c749SSergey Zigachev bool boot); 85*b843c749SSergey Zigachev 86*b843c749SSergey Zigachev void dm_helpers_dp_mst_stop_top_mgr( 87*b843c749SSergey Zigachev struct dc_context *ctx, 88*b843c749SSergey Zigachev const struct dc_link *link); 89*b843c749SSergey Zigachev /** 90*b843c749SSergey Zigachev * OS specific aux read callback. 91*b843c749SSergey Zigachev */ 92*b843c749SSergey Zigachev bool dm_helpers_dp_read_dpcd( 93*b843c749SSergey Zigachev struct dc_context *ctx, 94*b843c749SSergey Zigachev const struct dc_link *link, 95*b843c749SSergey Zigachev uint32_t address, 96*b843c749SSergey Zigachev uint8_t *data, 97*b843c749SSergey Zigachev uint32_t size); 98*b843c749SSergey Zigachev 99*b843c749SSergey Zigachev /** 100*b843c749SSergey Zigachev * OS specific aux write callback. 101*b843c749SSergey Zigachev */ 102*b843c749SSergey Zigachev bool dm_helpers_dp_write_dpcd( 103*b843c749SSergey Zigachev struct dc_context *ctx, 104*b843c749SSergey Zigachev const struct dc_link *link, 105*b843c749SSergey Zigachev uint32_t address, 106*b843c749SSergey Zigachev const uint8_t *data, 107*b843c749SSergey Zigachev uint32_t size); 108*b843c749SSergey Zigachev 109*b843c749SSergey Zigachev bool dm_helpers_submit_i2c( 110*b843c749SSergey Zigachev struct dc_context *ctx, 111*b843c749SSergey Zigachev const struct dc_link *link, 112*b843c749SSergey Zigachev struct i2c_command *cmd); 113*b843c749SSergey Zigachev 114*b843c749SSergey Zigachev bool dm_helpers_is_dp_sink_present( 115*b843c749SSergey Zigachev struct dc_link *link); 116*b843c749SSergey Zigachev 117*b843c749SSergey Zigachev enum dc_edid_status dm_helpers_read_local_edid( 118*b843c749SSergey Zigachev struct dc_context *ctx, 119*b843c749SSergey Zigachev struct dc_link *link, 120*b843c749SSergey Zigachev struct dc_sink *sink); 121*b843c749SSergey Zigachev 122*b843c749SSergey Zigachev void dm_set_dcn_clocks( 123*b843c749SSergey Zigachev struct dc_context *ctx, 124*b843c749SSergey Zigachev struct dc_clocks *clks); 125*b843c749SSergey Zigachev 126*b843c749SSergey Zigachev #endif /* __DM_HELPERS__ */ 127