1*b843c749SSergey Zigachev /* 2*b843c749SSergey Zigachev * Copyright 2016 Advanced Micro Devices, Inc. 3*b843c749SSergey Zigachev * 4*b843c749SSergey Zigachev * Permission is hereby granted, free of charge, to any person obtaining a 5*b843c749SSergey Zigachev * copy of this software and associated documentation files (the "Software"), 6*b843c749SSergey Zigachev * to deal in the Software without restriction, including without limitation 7*b843c749SSergey Zigachev * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8*b843c749SSergey Zigachev * and/or sell copies of the Software, and to permit persons to whom the 9*b843c749SSergey Zigachev * Software is furnished to do so, subject to the following conditions: 10*b843c749SSergey Zigachev * 11*b843c749SSergey Zigachev * The above copyright notice and this permission notice shall be included in 12*b843c749SSergey Zigachev * all copies or substantial portions of the Software. 13*b843c749SSergey Zigachev * 14*b843c749SSergey Zigachev * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15*b843c749SSergey Zigachev * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16*b843c749SSergey Zigachev * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17*b843c749SSergey Zigachev * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18*b843c749SSergey Zigachev * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19*b843c749SSergey Zigachev * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20*b843c749SSergey Zigachev * OTHER DEALINGS IN THE SOFTWARE. 21*b843c749SSergey Zigachev * 22*b843c749SSergey Zigachev */ 23*b843c749SSergey Zigachev 24*b843c749SSergey Zigachev #ifndef __SOC15_H__ 25*b843c749SSergey Zigachev #define __SOC15_H__ 26*b843c749SSergey Zigachev 27*b843c749SSergey Zigachev #include "nbio_v6_1.h" 28*b843c749SSergey Zigachev #include "nbio_v7_0.h" 29*b843c749SSergey Zigachev 30*b843c749SSergey Zigachev #define SOC15_FLUSH_GPU_TLB_NUM_WREG 4 31*b843c749SSergey Zigachev #define SOC15_FLUSH_GPU_TLB_NUM_REG_WAIT 1 32*b843c749SSergey Zigachev 33*b843c749SSergey Zigachev extern const struct amd_ip_funcs soc15_common_ip_funcs; 34*b843c749SSergey Zigachev 35*b843c749SSergey Zigachev struct soc15_reg_golden { 36*b843c749SSergey Zigachev u32 hwip; 37*b843c749SSergey Zigachev u32 instance; 38*b843c749SSergey Zigachev u32 segment; 39*b843c749SSergey Zigachev u32 reg; 40*b843c749SSergey Zigachev u32 and_mask; 41*b843c749SSergey Zigachev u32 or_mask; 42*b843c749SSergey Zigachev }; 43*b843c749SSergey Zigachev 44*b843c749SSergey Zigachev #define SOC15_REG_ENTRY(ip, inst, reg) ip##_HWIP, inst, reg##_BASE_IDX, reg 45*b843c749SSergey Zigachev 46*b843c749SSergey Zigachev #define SOC15_REG_GOLDEN_VALUE(ip, inst, reg, and_mask, or_mask) \ 47*b843c749SSergey Zigachev { ip##_HWIP, inst, reg##_BASE_IDX, reg, and_mask, or_mask } 48*b843c749SSergey Zigachev 49*b843c749SSergey Zigachev void soc15_grbm_select(struct amdgpu_device *adev, 50*b843c749SSergey Zigachev u32 me, u32 pipe, u32 queue, u32 vmid); 51*b843c749SSergey Zigachev int soc15_set_ip_blocks(struct amdgpu_device *adev); 52*b843c749SSergey Zigachev 53*b843c749SSergey Zigachev void soc15_program_register_sequence(struct amdgpu_device *adev, 54*b843c749SSergey Zigachev const struct soc15_reg_golden *registers, 55*b843c749SSergey Zigachev const u32 array_size); 56*b843c749SSergey Zigachev 57*b843c749SSergey Zigachev int vega10_reg_base_init(struct amdgpu_device *adev); 58*b843c749SSergey Zigachev int vega20_reg_base_init(struct amdgpu_device *adev); 59*b843c749SSergey Zigachev 60*b843c749SSergey Zigachev #endif 61