xref: /dflybsd-src/sys/dev/drm/amd/amdgpu/mmsch_v1_0.h (revision b843c749addef9340ee7d4e250b09fdd492602a1)
1*b843c749SSergey Zigachev /*
2*b843c749SSergey Zigachev  * Copyright 2017 Advanced Micro Devices, Inc.
3*b843c749SSergey Zigachev  *
4*b843c749SSergey Zigachev  * Permission is hereby granted, free of charge, to any person obtaining a
5*b843c749SSergey Zigachev  * copy of this software and associated documentation files (the "Software"),
6*b843c749SSergey Zigachev  * to deal in the Software without restriction, including without limitation
7*b843c749SSergey Zigachev  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8*b843c749SSergey Zigachev  * and/or sell copies of the Software, and to permit persons to whom the
9*b843c749SSergey Zigachev  * Software is furnished to do so, subject to the following conditions:
10*b843c749SSergey Zigachev  *
11*b843c749SSergey Zigachev  * The above copyright notice and this permission notice shall be included in
12*b843c749SSergey Zigachev  * all copies or substantial portions of the Software.
13*b843c749SSergey Zigachev  *
14*b843c749SSergey Zigachev  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15*b843c749SSergey Zigachev  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16*b843c749SSergey Zigachev  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17*b843c749SSergey Zigachev  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18*b843c749SSergey Zigachev  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19*b843c749SSergey Zigachev  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20*b843c749SSergey Zigachev  * OTHER DEALINGS IN THE SOFTWARE.
21*b843c749SSergey Zigachev  *
22*b843c749SSergey Zigachev  */
23*b843c749SSergey Zigachev 
24*b843c749SSergey Zigachev #ifndef __MMSCH_V1_0_H__
25*b843c749SSergey Zigachev #define __MMSCH_V1_0_H__
26*b843c749SSergey Zigachev 
27*b843c749SSergey Zigachev #define MMSCH_VERSION_MAJOR	1
28*b843c749SSergey Zigachev #define MMSCH_VERSION_MINOR	0
29*b843c749SSergey Zigachev #define MMSCH_VERSION	(MMSCH_VERSION_MAJOR << 16 | MMSCH_VERSION_MINOR)
30*b843c749SSergey Zigachev 
31*b843c749SSergey Zigachev enum mmsch_v1_0_command_type {
32*b843c749SSergey Zigachev 	MMSCH_COMMAND__DIRECT_REG_WRITE = 0,
33*b843c749SSergey Zigachev 	MMSCH_COMMAND__DIRECT_REG_POLLING = 2,
34*b843c749SSergey Zigachev 	MMSCH_COMMAND__DIRECT_REG_READ_MODIFY_WRITE = 3,
35*b843c749SSergey Zigachev 	MMSCH_COMMAND__INDIRECT_REG_WRITE = 8,
36*b843c749SSergey Zigachev 	MMSCH_COMMAND__END = 0xf
37*b843c749SSergey Zigachev };
38*b843c749SSergey Zigachev 
39*b843c749SSergey Zigachev struct mmsch_v1_0_init_header {
40*b843c749SSergey Zigachev 	uint32_t version;
41*b843c749SSergey Zigachev 	uint32_t header_size;
42*b843c749SSergey Zigachev 	uint32_t vce_init_status;
43*b843c749SSergey Zigachev 	uint32_t uvd_init_status;
44*b843c749SSergey Zigachev 	uint32_t vce_table_offset;
45*b843c749SSergey Zigachev 	uint32_t vce_table_size;
46*b843c749SSergey Zigachev 	uint32_t uvd_table_offset;
47*b843c749SSergey Zigachev 	uint32_t uvd_table_size;
48*b843c749SSergey Zigachev };
49*b843c749SSergey Zigachev 
50*b843c749SSergey Zigachev struct mmsch_v1_0_cmd_direct_reg_header {
51*b843c749SSergey Zigachev 	uint32_t reg_offset   : 28;
52*b843c749SSergey Zigachev 	uint32_t command_type : 4;
53*b843c749SSergey Zigachev };
54*b843c749SSergey Zigachev 
55*b843c749SSergey Zigachev struct mmsch_v1_0_cmd_indirect_reg_header {
56*b843c749SSergey Zigachev 	uint32_t reg_offset    : 20;
57*b843c749SSergey Zigachev 	uint32_t reg_idx_space : 8;
58*b843c749SSergey Zigachev 	uint32_t command_type  : 4;
59*b843c749SSergey Zigachev };
60*b843c749SSergey Zigachev 
61*b843c749SSergey Zigachev struct mmsch_v1_0_cmd_direct_write {
62*b843c749SSergey Zigachev 	struct mmsch_v1_0_cmd_direct_reg_header cmd_header;
63*b843c749SSergey Zigachev 	uint32_t reg_value;
64*b843c749SSergey Zigachev };
65*b843c749SSergey Zigachev 
66*b843c749SSergey Zigachev struct mmsch_v1_0_cmd_direct_read_modify_write {
67*b843c749SSergey Zigachev 	struct mmsch_v1_0_cmd_direct_reg_header cmd_header;
68*b843c749SSergey Zigachev 	uint32_t write_data;
69*b843c749SSergey Zigachev 	uint32_t mask_value;
70*b843c749SSergey Zigachev };
71*b843c749SSergey Zigachev 
72*b843c749SSergey Zigachev struct mmsch_v1_0_cmd_direct_polling {
73*b843c749SSergey Zigachev 	struct mmsch_v1_0_cmd_direct_reg_header cmd_header;
74*b843c749SSergey Zigachev 	uint32_t mask_value;
75*b843c749SSergey Zigachev 	uint32_t wait_value;
76*b843c749SSergey Zigachev };
77*b843c749SSergey Zigachev 
78*b843c749SSergey Zigachev struct mmsch_v1_0_cmd_end {
79*b843c749SSergey Zigachev 	struct mmsch_v1_0_cmd_direct_reg_header cmd_header;
80*b843c749SSergey Zigachev };
81*b843c749SSergey Zigachev 
82*b843c749SSergey Zigachev struct mmsch_v1_0_cmd_indirect_write {
83*b843c749SSergey Zigachev 	struct mmsch_v1_0_cmd_indirect_reg_header cmd_header;
84*b843c749SSergey Zigachev 	uint32_t reg_value;
85*b843c749SSergey Zigachev };
86*b843c749SSergey Zigachev 
mmsch_v1_0_insert_direct_wt(struct mmsch_v1_0_cmd_direct_write * direct_wt,uint32_t * init_table,uint32_t reg_offset,uint32_t value)87*b843c749SSergey Zigachev static inline void mmsch_v1_0_insert_direct_wt(struct mmsch_v1_0_cmd_direct_write *direct_wt,
88*b843c749SSergey Zigachev 					       uint32_t *init_table,
89*b843c749SSergey Zigachev 					       uint32_t reg_offset,
90*b843c749SSergey Zigachev 					       uint32_t value)
91*b843c749SSergey Zigachev {
92*b843c749SSergey Zigachev 	direct_wt->cmd_header.reg_offset = reg_offset;
93*b843c749SSergey Zigachev 	direct_wt->reg_value = value;
94*b843c749SSergey Zigachev 	memcpy((void *)init_table, direct_wt, sizeof(struct mmsch_v1_0_cmd_direct_write));
95*b843c749SSergey Zigachev }
96*b843c749SSergey Zigachev 
mmsch_v1_0_insert_direct_rd_mod_wt(struct mmsch_v1_0_cmd_direct_read_modify_write * direct_rd_mod_wt,uint32_t * init_table,uint32_t reg_offset,uint32_t mask,uint32_t data)97*b843c749SSergey Zigachev static inline void mmsch_v1_0_insert_direct_rd_mod_wt(struct mmsch_v1_0_cmd_direct_read_modify_write *direct_rd_mod_wt,
98*b843c749SSergey Zigachev 						      uint32_t *init_table,
99*b843c749SSergey Zigachev 						      uint32_t reg_offset,
100*b843c749SSergey Zigachev 						      uint32_t mask, uint32_t data)
101*b843c749SSergey Zigachev {
102*b843c749SSergey Zigachev 	direct_rd_mod_wt->cmd_header.reg_offset = reg_offset;
103*b843c749SSergey Zigachev 	direct_rd_mod_wt->mask_value = mask;
104*b843c749SSergey Zigachev 	direct_rd_mod_wt->write_data = data;
105*b843c749SSergey Zigachev 	memcpy((void *)init_table, direct_rd_mod_wt,
106*b843c749SSergey Zigachev 	       sizeof(struct mmsch_v1_0_cmd_direct_read_modify_write));
107*b843c749SSergey Zigachev }
108*b843c749SSergey Zigachev 
mmsch_v1_0_insert_direct_poll(struct mmsch_v1_0_cmd_direct_polling * direct_poll,uint32_t * init_table,uint32_t reg_offset,uint32_t mask,uint32_t wait)109*b843c749SSergey Zigachev static inline void mmsch_v1_0_insert_direct_poll(struct mmsch_v1_0_cmd_direct_polling *direct_poll,
110*b843c749SSergey Zigachev 						 uint32_t *init_table,
111*b843c749SSergey Zigachev 						 uint32_t reg_offset,
112*b843c749SSergey Zigachev 						 uint32_t mask, uint32_t wait)
113*b843c749SSergey Zigachev {
114*b843c749SSergey Zigachev 	direct_poll->cmd_header.reg_offset = reg_offset;
115*b843c749SSergey Zigachev 	direct_poll->mask_value = mask;
116*b843c749SSergey Zigachev 	direct_poll->wait_value = wait;
117*b843c749SSergey Zigachev 	memcpy((void *)init_table, direct_poll, sizeof(struct mmsch_v1_0_cmd_direct_polling));
118*b843c749SSergey Zigachev }
119*b843c749SSergey Zigachev 
120*b843c749SSergey Zigachev #define MMSCH_V1_0_INSERT_DIRECT_RD_MOD_WT(reg, mask, data) { \
121*b843c749SSergey Zigachev 	mmsch_v1_0_insert_direct_rd_mod_wt(&direct_rd_mod_wt, \
122*b843c749SSergey Zigachev 					   init_table, (reg), \
123*b843c749SSergey Zigachev 					   (mask), (data)); \
124*b843c749SSergey Zigachev 	init_table += sizeof(struct mmsch_v1_0_cmd_direct_read_modify_write)/4; \
125*b843c749SSergey Zigachev 	table_size += sizeof(struct mmsch_v1_0_cmd_direct_read_modify_write)/4; \
126*b843c749SSergey Zigachev }
127*b843c749SSergey Zigachev 
128*b843c749SSergey Zigachev #define MMSCH_V1_0_INSERT_DIRECT_WT(reg, value) { \
129*b843c749SSergey Zigachev 	mmsch_v1_0_insert_direct_wt(&direct_wt, \
130*b843c749SSergey Zigachev 				    init_table, (reg), \
131*b843c749SSergey Zigachev 				    (value)); \
132*b843c749SSergey Zigachev 	init_table += sizeof(struct mmsch_v1_0_cmd_direct_write)/4; \
133*b843c749SSergey Zigachev 	table_size += sizeof(struct mmsch_v1_0_cmd_direct_write)/4; \
134*b843c749SSergey Zigachev }
135*b843c749SSergey Zigachev 
136*b843c749SSergey Zigachev #define MMSCH_V1_0_INSERT_DIRECT_POLL(reg, mask, wait) { \
137*b843c749SSergey Zigachev 	mmsch_v1_0_insert_direct_poll(&direct_poll, \
138*b843c749SSergey Zigachev 				      init_table, (reg), \
139*b843c749SSergey Zigachev 				      (mask), (wait)); \
140*b843c749SSergey Zigachev 	init_table += sizeof(struct mmsch_v1_0_cmd_direct_polling)/4; \
141*b843c749SSergey Zigachev 	table_size += sizeof(struct mmsch_v1_0_cmd_direct_polling)/4; \
142*b843c749SSergey Zigachev }
143*b843c749SSergey Zigachev 
144*b843c749SSergey Zigachev #endif
145