xref: /dflybsd-src/sys/dev/drm/amd/amdgpu/amdgpu_irq.c (revision 789731325bde747251c28a37e0a00ed4efb88c46)
1b843c749SSergey Zigachev /*
2b843c749SSergey Zigachev  * Copyright 2008 Advanced Micro Devices, Inc.
3b843c749SSergey Zigachev  * Copyright 2008 Red Hat Inc.
4b843c749SSergey Zigachev  * Copyright 2009 Jerome Glisse.
5b843c749SSergey Zigachev  *
6b843c749SSergey Zigachev  * Permission is hereby granted, free of charge, to any person obtaining a
7b843c749SSergey Zigachev  * copy of this software and associated documentation files (the "Software"),
8b843c749SSergey Zigachev  * to deal in the Software without restriction, including without limitation
9b843c749SSergey Zigachev  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10b843c749SSergey Zigachev  * and/or sell copies of the Software, and to permit persons to whom the
11b843c749SSergey Zigachev  * Software is furnished to do so, subject to the following conditions:
12b843c749SSergey Zigachev  *
13b843c749SSergey Zigachev  * The above copyright notice and this permission notice shall be included in
14b843c749SSergey Zigachev  * all copies or substantial portions of the Software.
15b843c749SSergey Zigachev  *
16b843c749SSergey Zigachev  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17b843c749SSergey Zigachev  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18b843c749SSergey Zigachev  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
19b843c749SSergey Zigachev  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
20b843c749SSergey Zigachev  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21b843c749SSergey Zigachev  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
22b843c749SSergey Zigachev  * OTHER DEALINGS IN THE SOFTWARE.
23b843c749SSergey Zigachev  *
24b843c749SSergey Zigachev  * Authors: Dave Airlie
25b843c749SSergey Zigachev  *          Alex Deucher
26b843c749SSergey Zigachev  *          Jerome Glisse
27b843c749SSergey Zigachev  */
28b843c749SSergey Zigachev 
29b843c749SSergey Zigachev /**
30b843c749SSergey Zigachev  * DOC: Interrupt Handling
31b843c749SSergey Zigachev  *
32b843c749SSergey Zigachev  * Interrupts generated within GPU hardware raise interrupt requests that are
33b843c749SSergey Zigachev  * passed to amdgpu IRQ handler which is responsible for detecting source and
34b843c749SSergey Zigachev  * type of the interrupt and dispatching matching handlers. If handling an
35b843c749SSergey Zigachev  * interrupt requires calling kernel functions that may sleep processing is
36b843c749SSergey Zigachev  * dispatched to work handlers.
37b843c749SSergey Zigachev  *
38b843c749SSergey Zigachev  * If MSI functionality is not disabled by module parameter then MSI
39b843c749SSergey Zigachev  * support will be enabled.
40b843c749SSergey Zigachev  *
41b843c749SSergey Zigachev  * For GPU interrupt sources that may be driven by another driver, IRQ domain
42b843c749SSergey Zigachev  * support is used (with mapping between virtual and hardware IRQs).
43b843c749SSergey Zigachev  */
44b843c749SSergey Zigachev 
45b843c749SSergey Zigachev #include <linux/irq.h>
46b843c749SSergey Zigachev #include <drm/drmP.h>
47b843c749SSergey Zigachev #include <drm/drm_crtc_helper.h>
48b843c749SSergey Zigachev #include <drm/amdgpu_drm.h>
49b843c749SSergey Zigachev #include "amdgpu.h"
50b843c749SSergey Zigachev #include "amdgpu_ih.h"
51b843c749SSergey Zigachev #include "atom.h"
52b843c749SSergey Zigachev #include "amdgpu_connectors.h"
53b843c749SSergey Zigachev #include "amdgpu_trace.h"
54b843c749SSergey Zigachev 
55b843c749SSergey Zigachev #include <linux/pm_runtime.h>
56b843c749SSergey Zigachev 
57b843c749SSergey Zigachev #ifdef CONFIG_DRM_AMD_DC
58b843c749SSergey Zigachev #include "amdgpu_dm_irq.h"
59b843c749SSergey Zigachev #endif
60b843c749SSergey Zigachev 
61b843c749SSergey Zigachev #define AMDGPU_WAIT_IDLE_TIMEOUT 200
62b843c749SSergey Zigachev 
63b843c749SSergey Zigachev /**
64b843c749SSergey Zigachev  * amdgpu_hotplug_work_func - work handler for display hotplug event
65b843c749SSergey Zigachev  *
66b843c749SSergey Zigachev  * @work: work struct pointer
67b843c749SSergey Zigachev  *
68b843c749SSergey Zigachev  * This is the hotplug event work handler (all ASICs).
69b843c749SSergey Zigachev  * The work gets scheduled from the IRQ handler if there
70b843c749SSergey Zigachev  * was a hotplug interrupt.  It walks through the connector table
71b843c749SSergey Zigachev  * and calls hotplug handler for each connector. After this, it sends
72b843c749SSergey Zigachev  * a DRM hotplug event to alert userspace.
73b843c749SSergey Zigachev  *
74b843c749SSergey Zigachev  * This design approach is required in order to defer hotplug event handling
75b843c749SSergey Zigachev  * from the IRQ handler to a work handler because hotplug handler has to use
76b843c749SSergey Zigachev  * mutexes which cannot be locked in an IRQ handler (since &mutex_lock may
77b843c749SSergey Zigachev  * sleep).
78b843c749SSergey Zigachev  */
amdgpu_hotplug_work_func(struct work_struct * work)79b843c749SSergey Zigachev static void amdgpu_hotplug_work_func(struct work_struct *work)
80b843c749SSergey Zigachev {
81b843c749SSergey Zigachev 	struct amdgpu_device *adev = container_of(work, struct amdgpu_device,
82b843c749SSergey Zigachev 						  hotplug_work);
83b843c749SSergey Zigachev 	struct drm_device *dev = adev->ddev;
84b843c749SSergey Zigachev 	struct drm_mode_config *mode_config = &dev->mode_config;
85b843c749SSergey Zigachev 	struct drm_connector *connector;
86b843c749SSergey Zigachev 
87b843c749SSergey Zigachev 	mutex_lock(&mode_config->mutex);
88b843c749SSergey Zigachev 	list_for_each_entry(connector, &mode_config->connector_list, head)
89b843c749SSergey Zigachev 		amdgpu_connector_hotplug(connector);
90b843c749SSergey Zigachev 	mutex_unlock(&mode_config->mutex);
91b843c749SSergey Zigachev 	/* Just fire off a uevent and let userspace tell us what to do */
92b843c749SSergey Zigachev 	drm_helper_hpd_irq_event(dev);
93b843c749SSergey Zigachev }
94b843c749SSergey Zigachev 
95b843c749SSergey Zigachev /**
96b843c749SSergey Zigachev  * amdgpu_irq_reset_work_func - execute GPU reset
97b843c749SSergey Zigachev  *
98b843c749SSergey Zigachev  * @work: work struct pointer
99b843c749SSergey Zigachev  *
100b843c749SSergey Zigachev  * Execute scheduled GPU reset (Cayman+).
101b843c749SSergey Zigachev  * This function is called when the IRQ handler thinks we need a GPU reset.
102b843c749SSergey Zigachev  */
amdgpu_irq_reset_work_func(struct work_struct * work)103b843c749SSergey Zigachev static void amdgpu_irq_reset_work_func(struct work_struct *work)
104b843c749SSergey Zigachev {
105b843c749SSergey Zigachev 	struct amdgpu_device *adev = container_of(work, struct amdgpu_device,
106b843c749SSergey Zigachev 						  reset_work);
107b843c749SSergey Zigachev 
108b843c749SSergey Zigachev 	if (!amdgpu_sriov_vf(adev))
109b843c749SSergey Zigachev 		amdgpu_device_gpu_recover(adev, NULL, false);
110b843c749SSergey Zigachev }
111b843c749SSergey Zigachev 
112b843c749SSergey Zigachev /**
113b843c749SSergey Zigachev  * amdgpu_irq_disable_all - disable *all* interrupts
114b843c749SSergey Zigachev  *
115b843c749SSergey Zigachev  * @adev: amdgpu device pointer
116b843c749SSergey Zigachev  *
117b843c749SSergey Zigachev  * Disable all types of interrupts from all sources.
118b843c749SSergey Zigachev  */
amdgpu_irq_disable_all(struct amdgpu_device * adev)119b843c749SSergey Zigachev void amdgpu_irq_disable_all(struct amdgpu_device *adev)
120b843c749SSergey Zigachev {
121b843c749SSergey Zigachev 	unsigned long irqflags;
122b843c749SSergey Zigachev 	unsigned i, j, k;
123b843c749SSergey Zigachev 	int r;
124b843c749SSergey Zigachev 
125b843c749SSergey Zigachev 	spin_lock_irqsave(&adev->irq.lock, irqflags);
126b843c749SSergey Zigachev 	for (i = 0; i < AMDGPU_IH_CLIENTID_MAX; ++i) {
127b843c749SSergey Zigachev 		if (!adev->irq.client[i].sources)
128b843c749SSergey Zigachev 			continue;
129b843c749SSergey Zigachev 
130b843c749SSergey Zigachev 		for (j = 0; j < AMDGPU_MAX_IRQ_SRC_ID; ++j) {
131b843c749SSergey Zigachev 			struct amdgpu_irq_src *src = adev->irq.client[i].sources[j];
132b843c749SSergey Zigachev 
133b843c749SSergey Zigachev 			if (!src || !src->funcs->set || !src->num_types)
134b843c749SSergey Zigachev 				continue;
135b843c749SSergey Zigachev 
136b843c749SSergey Zigachev 			for (k = 0; k < src->num_types; ++k) {
137b843c749SSergey Zigachev 				atomic_set(&src->enabled_types[k], 0);
138b843c749SSergey Zigachev 				r = src->funcs->set(adev, src, k,
139b843c749SSergey Zigachev 						    AMDGPU_IRQ_STATE_DISABLE);
140b843c749SSergey Zigachev 				if (r)
141b843c749SSergey Zigachev 					DRM_ERROR("error disabling interrupt (%d)\n",
142b843c749SSergey Zigachev 						  r);
143b843c749SSergey Zigachev 			}
144b843c749SSergey Zigachev 		}
145b843c749SSergey Zigachev 	}
146b843c749SSergey Zigachev 	spin_unlock_irqrestore(&adev->irq.lock, irqflags);
147b843c749SSergey Zigachev }
148b843c749SSergey Zigachev 
149b843c749SSergey Zigachev /**
150b843c749SSergey Zigachev  * amdgpu_irq_handler - IRQ handler
151b843c749SSergey Zigachev  *
152b843c749SSergey Zigachev  * @irq: IRQ number (unused)
153b843c749SSergey Zigachev  * @arg: pointer to DRM device
154b843c749SSergey Zigachev  *
155b843c749SSergey Zigachev  * IRQ handler for amdgpu driver (all ASICs).
156b843c749SSergey Zigachev  *
157b843c749SSergey Zigachev  * Returns:
158b843c749SSergey Zigachev  * result of handling the IRQ, as defined by &irqreturn_t
159b843c749SSergey Zigachev  */
amdgpu_irq_handler(int irq,void * arg)160b843c749SSergey Zigachev irqreturn_t amdgpu_irq_handler(int irq, void *arg)
161b843c749SSergey Zigachev {
162b843c749SSergey Zigachev 	struct drm_device *dev = (struct drm_device *) arg;
163b843c749SSergey Zigachev 	struct amdgpu_device *adev = dev->dev_private;
164b843c749SSergey Zigachev 	irqreturn_t ret;
165b843c749SSergey Zigachev 
166b843c749SSergey Zigachev 	ret = amdgpu_ih_process(adev);
167b843c749SSergey Zigachev 	if (ret == IRQ_HANDLED)
168b843c749SSergey Zigachev 		pm_runtime_mark_last_busy(dev->dev);
169b843c749SSergey Zigachev 	return ret;
170b843c749SSergey Zigachev }
171b843c749SSergey Zigachev 
172b843c749SSergey Zigachev /**
173b843c749SSergey Zigachev  * amdgpu_msi_ok - check whether MSI functionality is enabled
174b843c749SSergey Zigachev  *
175b843c749SSergey Zigachev  * @adev: amdgpu device pointer (unused)
176b843c749SSergey Zigachev  *
177b843c749SSergey Zigachev  * Checks whether MSI functionality has been disabled via module parameter
178b843c749SSergey Zigachev  * (all ASICs).
179b843c749SSergey Zigachev  *
180b843c749SSergey Zigachev  * Returns:
181b843c749SSergey Zigachev  * *true* if MSIs are allowed to be enabled or *false* otherwise
182b843c749SSergey Zigachev  */
amdgpu_msi_ok(struct amdgpu_device * adev)183b843c749SSergey Zigachev static bool amdgpu_msi_ok(struct amdgpu_device *adev)
184b843c749SSergey Zigachev {
185b843c749SSergey Zigachev 	if (amdgpu_msi == 1)
186b843c749SSergey Zigachev 		return true;
187b843c749SSergey Zigachev 	else if (amdgpu_msi == 0)
188b843c749SSergey Zigachev 		return false;
189b843c749SSergey Zigachev 
190b843c749SSergey Zigachev 	return true;
191b843c749SSergey Zigachev }
192b843c749SSergey Zigachev 
193b843c749SSergey Zigachev /**
194b843c749SSergey Zigachev  * amdgpu_irq_init - initialize interrupt handling
195b843c749SSergey Zigachev  *
196b843c749SSergey Zigachev  * @adev: amdgpu device pointer
197b843c749SSergey Zigachev  *
198b843c749SSergey Zigachev  * Sets up work functions for hotplug and reset interrupts, enables MSI
199b843c749SSergey Zigachev  * functionality, initializes vblank, hotplug and reset interrupt handling.
200b843c749SSergey Zigachev  *
201b843c749SSergey Zigachev  * Returns:
202b843c749SSergey Zigachev  * 0 on success or error code on failure
203b843c749SSergey Zigachev  */
amdgpu_irq_init(struct amdgpu_device * adev)204b843c749SSergey Zigachev int amdgpu_irq_init(struct amdgpu_device *adev)
205b843c749SSergey Zigachev {
206b843c749SSergey Zigachev 	int r = 0;
207b843c749SSergey Zigachev 
208*78973132SSergey Zigachev 	lockinit(&adev->irq.lock, "agail", 0, LK_CANRECURSE);
209b843c749SSergey Zigachev 
210b843c749SSergey Zigachev 	/* Enable MSI if not disabled by module parameter */
211*78973132SSergey Zigachev #ifndef __DragonFly__
212b843c749SSergey Zigachev  	adev->irq.msi_enabled = false;
213*78973132SSergey Zigachev #else
214*78973132SSergey Zigachev 	adev->irq.msi_enabled = (adev->ddev->pdev->_irq_type == PCI_INTR_TYPE_MSI);
215*78973132SSergey Zigachev #endif
216b843c749SSergey Zigachev 
217b843c749SSergey Zigachev 	if (amdgpu_msi_ok(adev)) {
218*78973132SSergey Zigachev #ifndef __DragonFly__
219b843c749SSergey Zigachev 		int ret = pci_enable_msi(adev->pdev);
220b843c749SSergey Zigachev 		if (!ret) {
221b843c749SSergey Zigachev 			adev->irq.msi_enabled = true;
222b843c749SSergey Zigachev 			dev_dbg(adev->dev, "amdgpu: using MSI.\n");
223b843c749SSergey Zigachev 		}
224*78973132SSergey Zigachev #endif
225b843c749SSergey Zigachev 	}
226b843c749SSergey Zigachev 
227b843c749SSergey Zigachev 	if (!amdgpu_device_has_dc_support(adev)) {
228b843c749SSergey Zigachev 		if (!adev->enable_virtual_display)
229b843c749SSergey Zigachev 			/* Disable vblank IRQs aggressively for power-saving */
230b843c749SSergey Zigachev 			/* XXX: can this be enabled for DC? */
231b843c749SSergey Zigachev 			adev->ddev->vblank_disable_immediate = true;
232b843c749SSergey Zigachev 
233b843c749SSergey Zigachev 		r = drm_vblank_init(adev->ddev, adev->mode_info.num_crtc);
234b843c749SSergey Zigachev 		if (r)
235b843c749SSergey Zigachev 			return r;
236b843c749SSergey Zigachev 
237b843c749SSergey Zigachev 		/* Pre-DCE11 */
238b843c749SSergey Zigachev 		INIT_WORK(&adev->hotplug_work,
239b843c749SSergey Zigachev 				amdgpu_hotplug_work_func);
240b843c749SSergey Zigachev 	}
241b843c749SSergey Zigachev 
242b843c749SSergey Zigachev 	INIT_WORK(&adev->reset_work, amdgpu_irq_reset_work_func);
243b843c749SSergey Zigachev 
244b843c749SSergey Zigachev 	adev->irq.installed = true;
245b843c749SSergey Zigachev 	r = drm_irq_install(adev->ddev, adev->ddev->pdev->irq);
246b843c749SSergey Zigachev 	if (r) {
247b843c749SSergey Zigachev 		adev->irq.installed = false;
248b843c749SSergey Zigachev 		if (!amdgpu_device_has_dc_support(adev))
249b843c749SSergey Zigachev 			flush_work(&adev->hotplug_work);
250b843c749SSergey Zigachev 		cancel_work_sync(&adev->reset_work);
251b843c749SSergey Zigachev 		return r;
252b843c749SSergey Zigachev 	}
253b843c749SSergey Zigachev 	adev->ddev->max_vblank_count = 0x00ffffff;
254b843c749SSergey Zigachev 
255b843c749SSergey Zigachev 	DRM_DEBUG("amdgpu: irq initialized.\n");
256b843c749SSergey Zigachev 	return 0;
257b843c749SSergey Zigachev }
258b843c749SSergey Zigachev 
259b843c749SSergey Zigachev /**
260b843c749SSergey Zigachev  * amdgpu_irq_fini - shut down interrupt handling
261b843c749SSergey Zigachev  *
262b843c749SSergey Zigachev  * @adev: amdgpu device pointer
263b843c749SSergey Zigachev  *
264b843c749SSergey Zigachev  * Tears down work functions for hotplug and reset interrupts, disables MSI
265b843c749SSergey Zigachev  * functionality, shuts down vblank, hotplug and reset interrupt handling,
266b843c749SSergey Zigachev  * turns off interrupts from all sources (all ASICs).
267b843c749SSergey Zigachev  */
amdgpu_irq_fini(struct amdgpu_device * adev)268b843c749SSergey Zigachev void amdgpu_irq_fini(struct amdgpu_device *adev)
269b843c749SSergey Zigachev {
270b843c749SSergey Zigachev 	unsigned i, j;
271b843c749SSergey Zigachev 
272b843c749SSergey Zigachev 	if (adev->irq.installed) {
273b843c749SSergey Zigachev 		drm_irq_uninstall(adev->ddev);
274b843c749SSergey Zigachev 		adev->irq.installed = false;
275*78973132SSergey Zigachev #ifndef __DragonFly__
276b843c749SSergey Zigachev 		if (adev->irq.msi_enabled)
277b843c749SSergey Zigachev 			pci_disable_msi(adev->pdev);
278*78973132SSergey Zigachev #endif
279b843c749SSergey Zigachev 		if (!amdgpu_device_has_dc_support(adev))
280b843c749SSergey Zigachev 			flush_work(&adev->hotplug_work);
281b843c749SSergey Zigachev 		cancel_work_sync(&adev->reset_work);
282b843c749SSergey Zigachev 	}
283b843c749SSergey Zigachev 
284b843c749SSergey Zigachev 	for (i = 0; i < AMDGPU_IH_CLIENTID_MAX; ++i) {
285b843c749SSergey Zigachev 		if (!adev->irq.client[i].sources)
286b843c749SSergey Zigachev 			continue;
287b843c749SSergey Zigachev 
288b843c749SSergey Zigachev 		for (j = 0; j < AMDGPU_MAX_IRQ_SRC_ID; ++j) {
289b843c749SSergey Zigachev 			struct amdgpu_irq_src *src = adev->irq.client[i].sources[j];
290b843c749SSergey Zigachev 
291b843c749SSergey Zigachev 			if (!src)
292b843c749SSergey Zigachev 				continue;
293b843c749SSergey Zigachev 
294b843c749SSergey Zigachev 			kfree(src->enabled_types);
295b843c749SSergey Zigachev 			src->enabled_types = NULL;
296b843c749SSergey Zigachev 			if (src->data) {
297b843c749SSergey Zigachev 				kfree(src->data);
298b843c749SSergey Zigachev 				kfree(src);
299b843c749SSergey Zigachev 				adev->irq.client[i].sources[j] = NULL;
300b843c749SSergey Zigachev 			}
301b843c749SSergey Zigachev 		}
302b843c749SSergey Zigachev 		kfree(adev->irq.client[i].sources);
303b843c749SSergey Zigachev 		adev->irq.client[i].sources = NULL;
304b843c749SSergey Zigachev 	}
305b843c749SSergey Zigachev }
306b843c749SSergey Zigachev 
307b843c749SSergey Zigachev /**
308b843c749SSergey Zigachev  * amdgpu_irq_add_id - register IRQ source
309b843c749SSergey Zigachev  *
310b843c749SSergey Zigachev  * @adev: amdgpu device pointer
311b843c749SSergey Zigachev  * @client_id: client id
312b843c749SSergey Zigachev  * @src_id: source id
313b843c749SSergey Zigachev  * @source: IRQ source pointer
314b843c749SSergey Zigachev  *
315b843c749SSergey Zigachev  * Registers IRQ source on a client.
316b843c749SSergey Zigachev  *
317b843c749SSergey Zigachev  * Returns:
318b843c749SSergey Zigachev  * 0 on success or error code otherwise
319b843c749SSergey Zigachev  */
amdgpu_irq_add_id(struct amdgpu_device * adev,unsigned client_id,unsigned src_id,struct amdgpu_irq_src * source)320b843c749SSergey Zigachev int amdgpu_irq_add_id(struct amdgpu_device *adev,
321b843c749SSergey Zigachev 		      unsigned client_id, unsigned src_id,
322b843c749SSergey Zigachev 		      struct amdgpu_irq_src *source)
323b843c749SSergey Zigachev {
324b843c749SSergey Zigachev 	if (client_id >= AMDGPU_IH_CLIENTID_MAX)
325b843c749SSergey Zigachev 		return -EINVAL;
326b843c749SSergey Zigachev 
327b843c749SSergey Zigachev 	if (src_id >= AMDGPU_MAX_IRQ_SRC_ID)
328b843c749SSergey Zigachev 		return -EINVAL;
329b843c749SSergey Zigachev 
330b843c749SSergey Zigachev 	if (!source->funcs)
331b843c749SSergey Zigachev 		return -EINVAL;
332b843c749SSergey Zigachev 
333b843c749SSergey Zigachev 	if (!adev->irq.client[client_id].sources) {
334b843c749SSergey Zigachev 		adev->irq.client[client_id].sources =
335b843c749SSergey Zigachev 			kcalloc(AMDGPU_MAX_IRQ_SRC_ID,
336b843c749SSergey Zigachev 				sizeof(struct amdgpu_irq_src *),
337b843c749SSergey Zigachev 				GFP_KERNEL);
338b843c749SSergey Zigachev 		if (!adev->irq.client[client_id].sources)
339b843c749SSergey Zigachev 			return -ENOMEM;
340b843c749SSergey Zigachev 	}
341b843c749SSergey Zigachev 
342b843c749SSergey Zigachev 	if (adev->irq.client[client_id].sources[src_id] != NULL)
343b843c749SSergey Zigachev 		return -EINVAL;
344b843c749SSergey Zigachev 
345b843c749SSergey Zigachev 	if (source->num_types && !source->enabled_types) {
346b843c749SSergey Zigachev 		atomic_t *types;
347b843c749SSergey Zigachev 
348b843c749SSergey Zigachev 		types = kcalloc(source->num_types, sizeof(atomic_t),
349b843c749SSergey Zigachev 				GFP_KERNEL);
350b843c749SSergey Zigachev 		if (!types)
351b843c749SSergey Zigachev 			return -ENOMEM;
352b843c749SSergey Zigachev 
353b843c749SSergey Zigachev 		source->enabled_types = types;
354b843c749SSergey Zigachev 	}
355b843c749SSergey Zigachev 
356b843c749SSergey Zigachev 	adev->irq.client[client_id].sources[src_id] = source;
357b843c749SSergey Zigachev 	return 0;
358b843c749SSergey Zigachev }
359b843c749SSergey Zigachev 
360b843c749SSergey Zigachev /**
361b843c749SSergey Zigachev  * amdgpu_irq_dispatch - dispatch IRQ to IP blocks
362b843c749SSergey Zigachev  *
363b843c749SSergey Zigachev  * @adev: amdgpu device pointer
364b843c749SSergey Zigachev  * @entry: interrupt vector pointer
365b843c749SSergey Zigachev  *
366b843c749SSergey Zigachev  * Dispatches IRQ to IP blocks.
367b843c749SSergey Zigachev  */
amdgpu_irq_dispatch(struct amdgpu_device * adev,struct amdgpu_iv_entry * entry)368b843c749SSergey Zigachev void amdgpu_irq_dispatch(struct amdgpu_device *adev,
369b843c749SSergey Zigachev 			 struct amdgpu_iv_entry *entry)
370b843c749SSergey Zigachev {
371b843c749SSergey Zigachev 	unsigned client_id = entry->client_id;
372b843c749SSergey Zigachev 	unsigned src_id = entry->src_id;
373b843c749SSergey Zigachev 	struct amdgpu_irq_src *src;
374b843c749SSergey Zigachev 	int r;
375b843c749SSergey Zigachev 
376*78973132SSergey Zigachev #if 0
377b843c749SSergey Zigachev 	trace_amdgpu_iv(entry);
378*78973132SSergey Zigachev #endif
379b843c749SSergey Zigachev 
380b843c749SSergey Zigachev 	if (client_id >= AMDGPU_IH_CLIENTID_MAX) {
381b843c749SSergey Zigachev 		DRM_DEBUG("Invalid client_id in IV: %d\n", client_id);
382b843c749SSergey Zigachev 		return;
383b843c749SSergey Zigachev 	}
384b843c749SSergey Zigachev 
385b843c749SSergey Zigachev 	if (src_id >= AMDGPU_MAX_IRQ_SRC_ID) {
386b843c749SSergey Zigachev 		DRM_DEBUG("Invalid src_id in IV: %d\n", src_id);
387b843c749SSergey Zigachev 		return;
388b843c749SSergey Zigachev 	}
389b843c749SSergey Zigachev 
390b843c749SSergey Zigachev 	if (adev->irq.virq[src_id]) {
391*78973132SSergey Zigachev #if 0
392b843c749SSergey Zigachev 		generic_handle_irq(irq_find_mapping(adev->irq.domain, src_id));
393*78973132SSergey Zigachev #endif
394b843c749SSergey Zigachev 	} else {
395b843c749SSergey Zigachev 		if (!adev->irq.client[client_id].sources) {
396b843c749SSergey Zigachev 			DRM_DEBUG("Unregistered interrupt client_id: %d src_id: %d\n",
397b843c749SSergey Zigachev 				  client_id, src_id);
398b843c749SSergey Zigachev 			return;
399b843c749SSergey Zigachev 		}
400b843c749SSergey Zigachev 
401b843c749SSergey Zigachev 		src = adev->irq.client[client_id].sources[src_id];
402b843c749SSergey Zigachev 		if (!src) {
403b843c749SSergey Zigachev 			DRM_DEBUG("Unhandled interrupt src_id: %d\n", src_id);
404b843c749SSergey Zigachev 			return;
405b843c749SSergey Zigachev 		}
406b843c749SSergey Zigachev 
407b843c749SSergey Zigachev 		r = src->funcs->process(adev, src, entry);
408b843c749SSergey Zigachev 		if (r)
409b843c749SSergey Zigachev 			DRM_ERROR("error processing interrupt (%d)\n", r);
410b843c749SSergey Zigachev 	}
411b843c749SSergey Zigachev }
412b843c749SSergey Zigachev 
413b843c749SSergey Zigachev /**
414b843c749SSergey Zigachev  * amdgpu_irq_update - update hardware interrupt state
415b843c749SSergey Zigachev  *
416b843c749SSergey Zigachev  * @adev: amdgpu device pointer
417b843c749SSergey Zigachev  * @src: interrupt source pointer
418b843c749SSergey Zigachev  * @type: type of interrupt
419b843c749SSergey Zigachev  *
420b843c749SSergey Zigachev  * Updates interrupt state for the specific source (all ASICs).
421b843c749SSergey Zigachev  */
amdgpu_irq_update(struct amdgpu_device * adev,struct amdgpu_irq_src * src,unsigned type)422b843c749SSergey Zigachev int amdgpu_irq_update(struct amdgpu_device *adev,
423b843c749SSergey Zigachev 			     struct amdgpu_irq_src *src, unsigned type)
424b843c749SSergey Zigachev {
425b843c749SSergey Zigachev 	unsigned long irqflags;
426b843c749SSergey Zigachev 	enum amdgpu_interrupt_state state;
427b843c749SSergey Zigachev 	int r;
428b843c749SSergey Zigachev 
429b843c749SSergey Zigachev 	spin_lock_irqsave(&adev->irq.lock, irqflags);
430b843c749SSergey Zigachev 
431b843c749SSergey Zigachev 	/* We need to determine after taking the lock, otherwise
432b843c749SSergey Zigachev 	   we might disable just enabled interrupts again */
433b843c749SSergey Zigachev 	if (amdgpu_irq_enabled(adev, src, type))
434b843c749SSergey Zigachev 		state = AMDGPU_IRQ_STATE_ENABLE;
435b843c749SSergey Zigachev 	else
436b843c749SSergey Zigachev 		state = AMDGPU_IRQ_STATE_DISABLE;
437b843c749SSergey Zigachev 
438b843c749SSergey Zigachev 	r = src->funcs->set(adev, src, type, state);
439b843c749SSergey Zigachev 	spin_unlock_irqrestore(&adev->irq.lock, irqflags);
440b843c749SSergey Zigachev 	return r;
441b843c749SSergey Zigachev }
442b843c749SSergey Zigachev 
443b843c749SSergey Zigachev /**
444b843c749SSergey Zigachev  * amdgpu_irq_gpu_reset_resume_helper - update interrupt states on all sources
445b843c749SSergey Zigachev  *
446b843c749SSergey Zigachev  * @adev: amdgpu device pointer
447b843c749SSergey Zigachev  *
448b843c749SSergey Zigachev  * Updates state of all types of interrupts on all sources on resume after
449b843c749SSergey Zigachev  * reset.
450b843c749SSergey Zigachev  */
amdgpu_irq_gpu_reset_resume_helper(struct amdgpu_device * adev)451b843c749SSergey Zigachev void amdgpu_irq_gpu_reset_resume_helper(struct amdgpu_device *adev)
452b843c749SSergey Zigachev {
453b843c749SSergey Zigachev 	int i, j, k;
454b843c749SSergey Zigachev 
455b843c749SSergey Zigachev 	for (i = 0; i < AMDGPU_IH_CLIENTID_MAX; ++i) {
456b843c749SSergey Zigachev 		if (!adev->irq.client[i].sources)
457b843c749SSergey Zigachev 			continue;
458b843c749SSergey Zigachev 
459b843c749SSergey Zigachev 		for (j = 0; j < AMDGPU_MAX_IRQ_SRC_ID; ++j) {
460b843c749SSergey Zigachev 			struct amdgpu_irq_src *src = adev->irq.client[i].sources[j];
461b843c749SSergey Zigachev 
462b843c749SSergey Zigachev 			if (!src || !src->funcs || !src->funcs->set)
463b843c749SSergey Zigachev 				continue;
464b843c749SSergey Zigachev 			for (k = 0; k < src->num_types; k++)
465b843c749SSergey Zigachev 				amdgpu_irq_update(adev, src, k);
466b843c749SSergey Zigachev 		}
467b843c749SSergey Zigachev 	}
468b843c749SSergey Zigachev }
469b843c749SSergey Zigachev 
470b843c749SSergey Zigachev /**
471b843c749SSergey Zigachev  * amdgpu_irq_get - enable interrupt
472b843c749SSergey Zigachev  *
473b843c749SSergey Zigachev  * @adev: amdgpu device pointer
474b843c749SSergey Zigachev  * @src: interrupt source pointer
475b843c749SSergey Zigachev  * @type: type of interrupt
476b843c749SSergey Zigachev  *
477b843c749SSergey Zigachev  * Enables specified type of interrupt on the specified source (all ASICs).
478b843c749SSergey Zigachev  *
479b843c749SSergey Zigachev  * Returns:
480b843c749SSergey Zigachev  * 0 on success or error code otherwise
481b843c749SSergey Zigachev  */
amdgpu_irq_get(struct amdgpu_device * adev,struct amdgpu_irq_src * src,unsigned type)482b843c749SSergey Zigachev int amdgpu_irq_get(struct amdgpu_device *adev, struct amdgpu_irq_src *src,
483b843c749SSergey Zigachev 		   unsigned type)
484b843c749SSergey Zigachev {
485b843c749SSergey Zigachev 	if (!adev->ddev->irq_enabled)
486b843c749SSergey Zigachev 		return -ENOENT;
487b843c749SSergey Zigachev 
488b843c749SSergey Zigachev 	if (type >= src->num_types)
489b843c749SSergey Zigachev 		return -EINVAL;
490b843c749SSergey Zigachev 
491b843c749SSergey Zigachev 	if (!src->enabled_types || !src->funcs->set)
492b843c749SSergey Zigachev 		return -EINVAL;
493b843c749SSergey Zigachev 
494b843c749SSergey Zigachev 	if (atomic_inc_return(&src->enabled_types[type]) == 1)
495b843c749SSergey Zigachev 		return amdgpu_irq_update(adev, src, type);
496b843c749SSergey Zigachev 
497b843c749SSergey Zigachev 	return 0;
498b843c749SSergey Zigachev }
499b843c749SSergey Zigachev 
500b843c749SSergey Zigachev /**
501b843c749SSergey Zigachev  * amdgpu_irq_put - disable interrupt
502b843c749SSergey Zigachev  *
503b843c749SSergey Zigachev  * @adev: amdgpu device pointer
504b843c749SSergey Zigachev  * @src: interrupt source pointer
505b843c749SSergey Zigachev  * @type: type of interrupt
506b843c749SSergey Zigachev  *
507b843c749SSergey Zigachev  * Enables specified type of interrupt on the specified source (all ASICs).
508b843c749SSergey Zigachev  *
509b843c749SSergey Zigachev  * Returns:
510b843c749SSergey Zigachev  * 0 on success or error code otherwise
511b843c749SSergey Zigachev  */
amdgpu_irq_put(struct amdgpu_device * adev,struct amdgpu_irq_src * src,unsigned type)512b843c749SSergey Zigachev int amdgpu_irq_put(struct amdgpu_device *adev, struct amdgpu_irq_src *src,
513b843c749SSergey Zigachev 		   unsigned type)
514b843c749SSergey Zigachev {
515b843c749SSergey Zigachev 	if (!adev->ddev->irq_enabled)
516b843c749SSergey Zigachev 		return -ENOENT;
517b843c749SSergey Zigachev 
518b843c749SSergey Zigachev 	if (type >= src->num_types)
519b843c749SSergey Zigachev 		return -EINVAL;
520b843c749SSergey Zigachev 
521b843c749SSergey Zigachev 	if (!src->enabled_types || !src->funcs->set)
522b843c749SSergey Zigachev 		return -EINVAL;
523b843c749SSergey Zigachev 
524b843c749SSergey Zigachev 	if (atomic_dec_and_test(&src->enabled_types[type]))
525b843c749SSergey Zigachev 		return amdgpu_irq_update(adev, src, type);
526b843c749SSergey Zigachev 
527b843c749SSergey Zigachev 	return 0;
528b843c749SSergey Zigachev }
529b843c749SSergey Zigachev 
530b843c749SSergey Zigachev /**
531b843c749SSergey Zigachev  * amdgpu_irq_enabled - check whether interrupt is enabled or not
532b843c749SSergey Zigachev  *
533b843c749SSergey Zigachev  * @adev: amdgpu device pointer
534b843c749SSergey Zigachev  * @src: interrupt source pointer
535b843c749SSergey Zigachev  * @type: type of interrupt
536b843c749SSergey Zigachev  *
537b843c749SSergey Zigachev  * Checks whether the given type of interrupt is enabled on the given source.
538b843c749SSergey Zigachev  *
539b843c749SSergey Zigachev  * Returns:
540b843c749SSergey Zigachev  * *true* if interrupt is enabled, *false* if interrupt is disabled or on
541b843c749SSergey Zigachev  * invalid parameters
542b843c749SSergey Zigachev  */
amdgpu_irq_enabled(struct amdgpu_device * adev,struct amdgpu_irq_src * src,unsigned type)543b843c749SSergey Zigachev bool amdgpu_irq_enabled(struct amdgpu_device *adev, struct amdgpu_irq_src *src,
544b843c749SSergey Zigachev 			unsigned type)
545b843c749SSergey Zigachev {
546b843c749SSergey Zigachev 	if (!adev->ddev->irq_enabled)
547b843c749SSergey Zigachev 		return false;
548b843c749SSergey Zigachev 
549b843c749SSergey Zigachev 	if (type >= src->num_types)
550b843c749SSergey Zigachev 		return false;
551b843c749SSergey Zigachev 
552b843c749SSergey Zigachev 	if (!src->enabled_types || !src->funcs->set)
553b843c749SSergey Zigachev 		return false;
554b843c749SSergey Zigachev 
555b843c749SSergey Zigachev 	return !!atomic_read(&src->enabled_types[type]);
556b843c749SSergey Zigachev }
557b843c749SSergey Zigachev 
558*78973132SSergey Zigachev #if 0
559b843c749SSergey Zigachev /* XXX: Generic IRQ handling */
560b843c749SSergey Zigachev static void amdgpu_irq_mask(struct irq_data *irqd)
561b843c749SSergey Zigachev {
562b843c749SSergey Zigachev 	/* XXX */
563b843c749SSergey Zigachev }
564b843c749SSergey Zigachev 
565b843c749SSergey Zigachev static void amdgpu_irq_unmask(struct irq_data *irqd)
566b843c749SSergey Zigachev {
567b843c749SSergey Zigachev 	/* XXX */
568b843c749SSergey Zigachev }
569b843c749SSergey Zigachev 
570b843c749SSergey Zigachev /* amdgpu hardware interrupt chip descriptor */
571b843c749SSergey Zigachev static struct irq_chip amdgpu_irq_chip = {
572b843c749SSergey Zigachev 	.name = "amdgpu-ih",
573b843c749SSergey Zigachev 	.irq_mask = amdgpu_irq_mask,
574b843c749SSergey Zigachev 	.irq_unmask = amdgpu_irq_unmask,
575b843c749SSergey Zigachev };
576b843c749SSergey Zigachev 
577b843c749SSergey Zigachev /**
578b843c749SSergey Zigachev  * amdgpu_irqdomain_map - create mapping between virtual and hardware IRQ numbers
579b843c749SSergey Zigachev  *
580b843c749SSergey Zigachev  * @d: amdgpu IRQ domain pointer (unused)
581b843c749SSergey Zigachev  * @irq: virtual IRQ number
582b843c749SSergey Zigachev  * @hwirq: hardware irq number
583b843c749SSergey Zigachev  *
584b843c749SSergey Zigachev  * Current implementation assigns simple interrupt handler to the given virtual
585b843c749SSergey Zigachev  * IRQ.
586b843c749SSergey Zigachev  *
587b843c749SSergey Zigachev  * Returns:
588b843c749SSergey Zigachev  * 0 on success or error code otherwise
589b843c749SSergey Zigachev  */
590b843c749SSergey Zigachev static int amdgpu_irqdomain_map(struct irq_domain *d,
591b843c749SSergey Zigachev 				unsigned int irq, irq_hw_number_t hwirq)
592b843c749SSergey Zigachev {
593b843c749SSergey Zigachev 	if (hwirq >= AMDGPU_MAX_IRQ_SRC_ID)
594b843c749SSergey Zigachev 		return -EPERM;
595b843c749SSergey Zigachev 
596b843c749SSergey Zigachev 	irq_set_chip_and_handler(irq,
597b843c749SSergey Zigachev 				 &amdgpu_irq_chip, handle_simple_irq);
598b843c749SSergey Zigachev 	return 0;
599b843c749SSergey Zigachev }
600b843c749SSergey Zigachev 
601b843c749SSergey Zigachev /* Implementation of methods for amdgpu IRQ domain */
602b843c749SSergey Zigachev static const struct irq_domain_ops amdgpu_hw_irqdomain_ops = {
603b843c749SSergey Zigachev 	.map = amdgpu_irqdomain_map,
604b843c749SSergey Zigachev };
605*78973132SSergey Zigachev #endif
606b843c749SSergey Zigachev 
607b843c749SSergey Zigachev /**
608b843c749SSergey Zigachev  * amdgpu_irq_add_domain - create a linear IRQ domain
609b843c749SSergey Zigachev  *
610b843c749SSergey Zigachev  * @adev: amdgpu device pointer
611b843c749SSergey Zigachev  *
612b843c749SSergey Zigachev  * Creates an IRQ domain for GPU interrupt sources
613b843c749SSergey Zigachev  * that may be driven by another driver (e.g., ACP).
614b843c749SSergey Zigachev  *
615b843c749SSergey Zigachev  * Returns:
616b843c749SSergey Zigachev  * 0 on success or error code otherwise
617b843c749SSergey Zigachev  */
amdgpu_irq_add_domain(struct amdgpu_device * adev)618b843c749SSergey Zigachev int amdgpu_irq_add_domain(struct amdgpu_device *adev)
619b843c749SSergey Zigachev {
620*78973132SSergey Zigachev #if 0
621b843c749SSergey Zigachev 	adev->irq.domain = irq_domain_add_linear(NULL, AMDGPU_MAX_IRQ_SRC_ID,
622b843c749SSergey Zigachev 						 &amdgpu_hw_irqdomain_ops, adev);
623b843c749SSergey Zigachev 	if (!adev->irq.domain) {
624b843c749SSergey Zigachev 		DRM_ERROR("GPU irq add domain failed\n");
625b843c749SSergey Zigachev 		return -ENODEV;
626b843c749SSergey Zigachev 	}
627*78973132SSergey Zigachev #endif
628b843c749SSergey Zigachev 
629b843c749SSergey Zigachev 	return 0;
630b843c749SSergey Zigachev }
631b843c749SSergey Zigachev 
632b843c749SSergey Zigachev /**
633b843c749SSergey Zigachev  * amdgpu_irq_remove_domain - remove the IRQ domain
634b843c749SSergey Zigachev  *
635b843c749SSergey Zigachev  * @adev: amdgpu device pointer
636b843c749SSergey Zigachev  *
637b843c749SSergey Zigachev  * Removes the IRQ domain for GPU interrupt sources
638b843c749SSergey Zigachev  * that may be driven by another driver (e.g., ACP).
639b843c749SSergey Zigachev  */
amdgpu_irq_remove_domain(struct amdgpu_device * adev)640b843c749SSergey Zigachev void amdgpu_irq_remove_domain(struct amdgpu_device *adev)
641b843c749SSergey Zigachev {
642*78973132SSergey Zigachev #if 0
643b843c749SSergey Zigachev 	if (adev->irq.domain) {
644b843c749SSergey Zigachev 		irq_domain_remove(adev->irq.domain);
645b843c749SSergey Zigachev 		adev->irq.domain = NULL;
646b843c749SSergey Zigachev 	}
647*78973132SSergey Zigachev #endif
648b843c749SSergey Zigachev }
649b843c749SSergey Zigachev 
650b843c749SSergey Zigachev /**
651b843c749SSergey Zigachev  * amdgpu_irq_create_mapping - create mapping between domain Linux IRQs
652b843c749SSergey Zigachev  *
653b843c749SSergey Zigachev  * @adev: amdgpu device pointer
654b843c749SSergey Zigachev  * @src_id: IH source id
655b843c749SSergey Zigachev  *
656b843c749SSergey Zigachev  * Creates mapping between a domain IRQ (GPU IH src id) and a Linux IRQ
657b843c749SSergey Zigachev  * Use this for components that generate a GPU interrupt, but are driven
658b843c749SSergey Zigachev  * by a different driver (e.g., ACP).
659b843c749SSergey Zigachev  *
660b843c749SSergey Zigachev  * Returns:
661b843c749SSergey Zigachev  * Linux IRQ
662b843c749SSergey Zigachev  */
amdgpu_irq_create_mapping(struct amdgpu_device * adev,unsigned src_id)663b843c749SSergey Zigachev unsigned amdgpu_irq_create_mapping(struct amdgpu_device *adev, unsigned src_id)
664b843c749SSergey Zigachev {
665*78973132SSergey Zigachev #if 0
666b843c749SSergey Zigachev  	adev->irq.virq[src_id] = irq_create_mapping(adev->irq.domain, src_id);
667b843c749SSergey Zigachev 
668b843c749SSergey Zigachev  	return adev->irq.virq[src_id];
669*78973132SSergey Zigachev #endif
670*78973132SSergey Zigachev 	return 0;
671b843c749SSergey Zigachev }
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