1b843c749SSergey Zigachev /* 2b843c749SSergey Zigachev * Copyright 2017 Advanced Micro Devices, Inc. 3b843c749SSergey Zigachev * 4b843c749SSergey Zigachev * Permission is hereby granted, free of charge, to any person obtaining a 5b843c749SSergey Zigachev * copy of this software and associated documentation files (the "Software"), 6b843c749SSergey Zigachev * to deal in the Software without restriction, including without limitation 7b843c749SSergey Zigachev * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8b843c749SSergey Zigachev * and/or sell copies of the Software, and to permit persons to whom the 9b843c749SSergey Zigachev * Software is furnished to do so, subject to the following conditions: 10b843c749SSergey Zigachev * 11b843c749SSergey Zigachev * The above copyright notice and this permission notice shall be included in 12b843c749SSergey Zigachev * all copies or substantial portions of the Software. 13b843c749SSergey Zigachev * 14b843c749SSergey Zigachev * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15b843c749SSergey Zigachev * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16b843c749SSergey Zigachev * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17b843c749SSergey Zigachev * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18b843c749SSergey Zigachev * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19b843c749SSergey Zigachev * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20b843c749SSergey Zigachev * OTHER DEALINGS IN THE SOFTWARE. 21b843c749SSergey Zigachev * 22b843c749SSergey Zigachev */ 23b843c749SSergey Zigachev #ifndef __AMDGPU_IDS_H__ 24b843c749SSergey Zigachev #define __AMDGPU_IDS_H__ 25b843c749SSergey Zigachev 26b843c749SSergey Zigachev #include <linux/types.h> 27b843c749SSergey Zigachev #include <linux/mutex.h> 28b843c749SSergey Zigachev #include <linux/list.h> 29b843c749SSergey Zigachev #include <linux/dma-fence.h> 30b843c749SSergey Zigachev 31b843c749SSergey Zigachev #include "amdgpu_sync.h" 32b843c749SSergey Zigachev 33b843c749SSergey Zigachev /* maximum number of VMIDs */ 34b843c749SSergey Zigachev #define AMDGPU_NUM_VMID 16 35b843c749SSergey Zigachev 36b843c749SSergey Zigachev struct amdgpu_device; 37b843c749SSergey Zigachev struct amdgpu_vm; 38b843c749SSergey Zigachev struct amdgpu_ring; 39b843c749SSergey Zigachev struct amdgpu_sync; 40b843c749SSergey Zigachev struct amdgpu_job; 41b843c749SSergey Zigachev 42b843c749SSergey Zigachev struct amdgpu_vmid { 43b843c749SSergey Zigachev struct list_head list; 44b843c749SSergey Zigachev struct amdgpu_sync active; 45b843c749SSergey Zigachev struct dma_fence *last_flush; 46b843c749SSergey Zigachev uint64_t owner; 47b843c749SSergey Zigachev 48b843c749SSergey Zigachev uint64_t pd_gpu_addr; 49b843c749SSergey Zigachev /* last flushed PD/PT update */ 50b843c749SSergey Zigachev struct dma_fence *flushed_updates; 51b843c749SSergey Zigachev 52b843c749SSergey Zigachev uint32_t current_gpu_reset_count; 53b843c749SSergey Zigachev 54b843c749SSergey Zigachev uint32_t gds_base; 55b843c749SSergey Zigachev uint32_t gds_size; 56b843c749SSergey Zigachev uint32_t gws_base; 57b843c749SSergey Zigachev uint32_t gws_size; 58b843c749SSergey Zigachev uint32_t oa_base; 59b843c749SSergey Zigachev uint32_t oa_size; 60b843c749SSergey Zigachev 61b843c749SSergey Zigachev unsigned pasid; 62b843c749SSergey Zigachev struct dma_fence *pasid_mapping; 63b843c749SSergey Zigachev }; 64b843c749SSergey Zigachev 65b843c749SSergey Zigachev struct amdgpu_vmid_mgr { 66*78973132SSergey Zigachev struct lock lock; 67b843c749SSergey Zigachev unsigned num_ids; 68b843c749SSergey Zigachev struct list_head ids_lru; 69b843c749SSergey Zigachev struct amdgpu_vmid ids[AMDGPU_NUM_VMID]; 70b843c749SSergey Zigachev atomic_t reserved_vmid_num; 71b843c749SSergey Zigachev }; 72b843c749SSergey Zigachev 73b843c749SSergey Zigachev int amdgpu_pasid_alloc(unsigned int bits); 74b843c749SSergey Zigachev void amdgpu_pasid_free(unsigned int pasid); 75b843c749SSergey Zigachev void amdgpu_pasid_free_delayed(struct reservation_object *resv, 76b843c749SSergey Zigachev unsigned int pasid); 77b843c749SSergey Zigachev 78b843c749SSergey Zigachev bool amdgpu_vmid_had_gpu_reset(struct amdgpu_device *adev, 79b843c749SSergey Zigachev struct amdgpu_vmid *id); 80b843c749SSergey Zigachev int amdgpu_vmid_alloc_reserved(struct amdgpu_device *adev, 81b843c749SSergey Zigachev struct amdgpu_vm *vm, 82b843c749SSergey Zigachev unsigned vmhub); 83b843c749SSergey Zigachev void amdgpu_vmid_free_reserved(struct amdgpu_device *adev, 84b843c749SSergey Zigachev struct amdgpu_vm *vm, 85b843c749SSergey Zigachev unsigned vmhub); 86b843c749SSergey Zigachev int amdgpu_vmid_grab(struct amdgpu_vm *vm, struct amdgpu_ring *ring, 87b843c749SSergey Zigachev struct amdgpu_sync *sync, struct dma_fence *fence, 88b843c749SSergey Zigachev struct amdgpu_job *job); 89b843c749SSergey Zigachev void amdgpu_vmid_reset(struct amdgpu_device *adev, unsigned vmhub, 90b843c749SSergey Zigachev unsigned vmid); 91b843c749SSergey Zigachev void amdgpu_vmid_reset_all(struct amdgpu_device *adev); 92b843c749SSergey Zigachev 93b843c749SSergey Zigachev void amdgpu_vmid_mgr_init(struct amdgpu_device *adev); 94b843c749SSergey Zigachev void amdgpu_vmid_mgr_fini(struct amdgpu_device *adev); 95b843c749SSergey Zigachev 96b843c749SSergey Zigachev #endif 97