1*b843c749SSergey Zigachev /* 2*b843c749SSergey Zigachev * Copyright 2017 Advanced Micro Devices, Inc. 3*b843c749SSergey Zigachev * 4*b843c749SSergey Zigachev * Permission is hereby granted, free of charge, to any person obtaining a 5*b843c749SSergey Zigachev * copy of this software and associated documentation files (the "Software"), 6*b843c749SSergey Zigachev * to deal in the Software without restriction, including without limitation 7*b843c749SSergey Zigachev * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8*b843c749SSergey Zigachev * and/or sell copies of the Software, and to permit persons to whom the 9*b843c749SSergey Zigachev * Software is furnished to do so, subject to the following conditions: 10*b843c749SSergey Zigachev * 11*b843c749SSergey Zigachev * The above copyright notice and this permission notice shall be included in 12*b843c749SSergey Zigachev * all copies or substantial portions of the Software. 13*b843c749SSergey Zigachev * 14*b843c749SSergey Zigachev * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15*b843c749SSergey Zigachev * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16*b843c749SSergey Zigachev * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17*b843c749SSergey Zigachev * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18*b843c749SSergey Zigachev * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19*b843c749SSergey Zigachev * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20*b843c749SSergey Zigachev * OTHER DEALINGS IN THE SOFTWARE. 21*b843c749SSergey Zigachev * 22*b843c749SSergey Zigachev */ 23*b843c749SSergey Zigachev 24*b843c749SSergey Zigachev #ifndef __AMDGPU_GART_H__ 25*b843c749SSergey Zigachev #define __AMDGPU_GART_H__ 26*b843c749SSergey Zigachev 27*b843c749SSergey Zigachev #include <linux/types.h> 28*b843c749SSergey Zigachev 29*b843c749SSergey Zigachev /* 30*b843c749SSergey Zigachev * GART structures, functions & helpers 31*b843c749SSergey Zigachev */ 32*b843c749SSergey Zigachev struct amdgpu_device; 33*b843c749SSergey Zigachev struct amdgpu_bo; 34*b843c749SSergey Zigachev 35*b843c749SSergey Zigachev #define AMDGPU_GPU_PAGE_SIZE 4096 36*b843c749SSergey Zigachev #define AMDGPU_GPU_PAGE_MASK (AMDGPU_GPU_PAGE_SIZE - 1) 37*b843c749SSergey Zigachev #define AMDGPU_GPU_PAGE_SHIFT 12 38*b843c749SSergey Zigachev #define AMDGPU_GPU_PAGE_ALIGN(a) (((a) + AMDGPU_GPU_PAGE_MASK) & ~AMDGPU_GPU_PAGE_MASK) 39*b843c749SSergey Zigachev 40*b843c749SSergey Zigachev #define AMDGPU_GPU_PAGES_IN_CPU_PAGE (PAGE_SIZE / AMDGPU_GPU_PAGE_SIZE) 41*b843c749SSergey Zigachev 42*b843c749SSergey Zigachev struct amdgpu_gart { 43*b843c749SSergey Zigachev u64 table_addr; 44*b843c749SSergey Zigachev struct amdgpu_bo *robj; 45*b843c749SSergey Zigachev void *ptr; 46*b843c749SSergey Zigachev unsigned num_gpu_pages; 47*b843c749SSergey Zigachev unsigned num_cpu_pages; 48*b843c749SSergey Zigachev unsigned table_size; 49*b843c749SSergey Zigachev #ifdef CONFIG_DRM_AMDGPU_GART_DEBUGFS 50*b843c749SSergey Zigachev struct page **pages; 51*b843c749SSergey Zigachev #endif 52*b843c749SSergey Zigachev bool ready; 53*b843c749SSergey Zigachev 54*b843c749SSergey Zigachev /* Asic default pte flags */ 55*b843c749SSergey Zigachev uint64_t gart_pte_flags; 56*b843c749SSergey Zigachev }; 57*b843c749SSergey Zigachev 58*b843c749SSergey Zigachev int amdgpu_gart_table_vram_alloc(struct amdgpu_device *adev); 59*b843c749SSergey Zigachev void amdgpu_gart_table_vram_free(struct amdgpu_device *adev); 60*b843c749SSergey Zigachev int amdgpu_gart_table_vram_pin(struct amdgpu_device *adev); 61*b843c749SSergey Zigachev void amdgpu_gart_table_vram_unpin(struct amdgpu_device *adev); 62*b843c749SSergey Zigachev int amdgpu_gart_init(struct amdgpu_device *adev); 63*b843c749SSergey Zigachev void amdgpu_gart_fini(struct amdgpu_device *adev); 64*b843c749SSergey Zigachev int amdgpu_gart_unbind(struct amdgpu_device *adev, uint64_t offset, 65*b843c749SSergey Zigachev int pages); 66*b843c749SSergey Zigachev int amdgpu_gart_map(struct amdgpu_device *adev, uint64_t offset, 67*b843c749SSergey Zigachev int pages, dma_addr_t *dma_addr, uint64_t flags, 68*b843c749SSergey Zigachev void *dst); 69*b843c749SSergey Zigachev int amdgpu_gart_bind(struct amdgpu_device *adev, uint64_t offset, 70*b843c749SSergey Zigachev int pages, struct page **pagelist, 71*b843c749SSergey Zigachev dma_addr_t *dma_addr, uint64_t flags); 72*b843c749SSergey Zigachev 73*b843c749SSergey Zigachev #endif 74