1258223a3SMatthew Dillon /* 2258223a3SMatthew Dillon * Copyright (c) 2007 David Gwynne <dlg@openbsd.org> 3258223a3SMatthew Dillon * 4258223a3SMatthew Dillon * Permission to use, copy, modify, and distribute this software for any 5258223a3SMatthew Dillon * purpose with or without fee is hereby granted, provided that the above 6258223a3SMatthew Dillon * copyright notice and this permission notice appear in all copies. 7258223a3SMatthew Dillon * 8258223a3SMatthew Dillon * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9258223a3SMatthew Dillon * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10258223a3SMatthew Dillon * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 11258223a3SMatthew Dillon * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12258223a3SMatthew Dillon * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 13258223a3SMatthew Dillon * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 14258223a3SMatthew Dillon * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15258223a3SMatthew Dillon * 16258223a3SMatthew Dillon * $OpenBSD: atascsi.h,v 1.33 2009/02/16 21:19:06 miod Exp $ 17258223a3SMatthew Dillon */ 18258223a3SMatthew Dillon 19258223a3SMatthew Dillon struct atascsi; 20258223a3SMatthew Dillon struct scsi_link; 21258223a3SMatthew Dillon 22258223a3SMatthew Dillon /* 23258223a3SMatthew Dillon * ATA commands 24258223a3SMatthew Dillon */ 25258223a3SMatthew Dillon 26e0fb398bSTim #define ATA_C_DATA_SET_MANAGEMENT 0x06 /* Data Set Management command */ 27258223a3SMatthew Dillon #define ATA_C_READDMA_EXT 0x25 28258223a3SMatthew Dillon #define ATA_C_READ_LOG_EXT 0x2f 29258223a3SMatthew Dillon #define ATA_C_WRITEDMA_EXT 0x35 30258223a3SMatthew Dillon #define ATA_C_READ_FPDMA 0x60 31258223a3SMatthew Dillon #define ATA_C_WRITE_FPDMA 0x61 32258223a3SMatthew Dillon #define ATA_C_PACKET 0xa0 33fd8bd957SMatthew Dillon #define ATA_C_ATAPI_IDENTIFY 0xa1 34258223a3SMatthew Dillon #define ATA_C_READDMA 0xc8 35258223a3SMatthew Dillon #define ATA_C_WRITEDMA 0xca 361980eff3SMatthew Dillon #define ATA_C_READ_PM 0xe4 371980eff3SMatthew Dillon #define ATA_C_WRITE_PM 0xe8 38258223a3SMatthew Dillon #define ATA_C_FLUSH_CACHE 0xe7 39258223a3SMatthew Dillon #define ATA_C_FLUSH_CACHE_EXT 0xea /* lba48 */ 40258223a3SMatthew Dillon #define ATA_C_IDENTIFY 0xec 41258223a3SMatthew Dillon #define ATA_C_SET_FEATURES 0xef 42258223a3SMatthew Dillon #define ATA_C_SEC_FREEZE_LOCK 0xf5 43258223a3SMatthew Dillon 44258223a3SMatthew Dillon /* 45750495d0SImre Vadász * ATA SET FEATURES subcommands 46750495d0SImre Vadász */ 47750495d0SImre Vadász #define ATA_SF_DSM_TRIM 0x01 /* TRIM DSM feature */ 48750495d0SImre Vadász #define ATA_SF_WRITECACHE_EN 0x02 49750495d0SImre Vadász #define ATA_SF_SETXFER 0x03 50750495d0SImre Vadász #define ATA_SF_SATAFT_ENA 0x10 51750495d0SImre Vadász #define ATA_SF_SATAFT_DIS 0x90 52750495d0SImre Vadász #define ATA_SF_LOOKAHEAD_EN 0xaa 53750495d0SImre Vadász 54750495d0SImre Vadász /* 55750495d0SImre Vadász * ATA SATA FEATURES args 563209f581SMatthew Dillon */ 573209f581SMatthew Dillon #define ATA_SATAFT_NONZDMA 0x01 /* DMA non-zero buffer offset */ 583209f581SMatthew Dillon #define ATA_SATAFT_DMAAAOPT 0x02 /* DMA AA optimization */ 593209f581SMatthew Dillon #define ATA_SATAFT_DEVIPS 0x03 /* Device-initiated pwr state*/ 603209f581SMatthew Dillon #define ATA_SATAFT_INORDER 0x04 /* in-order data delivery */ 613209f581SMatthew Dillon #define ATA_SATAFT_ASYNCNOTIFY 0x05 /* Async notification */ 62750495d0SImre Vadász #define ATA_SATAFT_DEVAPS 0x07 /* Device auto partial to slumber */ 63750495d0SImre Vadász #define ATA_SATAFT_DEVSLEEP 0x09 /* DevSleep power management state */ 64258223a3SMatthew Dillon 65258223a3SMatthew Dillon struct ata_identify { 66258223a3SMatthew Dillon u_int16_t config; /* 0 */ 67258223a3SMatthew Dillon u_int16_t ncyls; /* 1 */ 68258223a3SMatthew Dillon u_int16_t reserved1; /* 2 */ 69258223a3SMatthew Dillon u_int16_t nheads; /* 3 */ 70258223a3SMatthew Dillon u_int16_t track_size; /* 4 */ 71258223a3SMatthew Dillon u_int16_t sector_size; /* 5 */ 72258223a3SMatthew Dillon u_int16_t nsectors; /* 6 */ 73258223a3SMatthew Dillon u_int16_t reserved2[3]; /* 7 vendor unique */ 74258223a3SMatthew Dillon u_int8_t serial[20]; /* 10 */ 75258223a3SMatthew Dillon u_int16_t buffer_type; /* 20 */ 76258223a3SMatthew Dillon u_int16_t buffer_size; /* 21 */ 77258223a3SMatthew Dillon u_int16_t ecc; /* 22 */ 78258223a3SMatthew Dillon u_int8_t firmware[8]; /* 23 */ 79258223a3SMatthew Dillon u_int8_t model[40]; /* 27 */ 80258223a3SMatthew Dillon u_int16_t multi; /* 47 */ 81258223a3SMatthew Dillon u_int16_t dwcap; /* 48 */ 82258223a3SMatthew Dillon u_int16_t cap; /* 49 */ 83258223a3SMatthew Dillon u_int16_t reserved3; /* 50 */ 84258223a3SMatthew Dillon u_int16_t piomode; /* 51 */ 85258223a3SMatthew Dillon u_int16_t dmamode; /* 52 */ 86258223a3SMatthew Dillon u_int16_t validinfo; /* 53 */ 87258223a3SMatthew Dillon u_int16_t curcyls; /* 54 */ 88258223a3SMatthew Dillon u_int16_t curheads; /* 55 */ 89258223a3SMatthew Dillon u_int16_t cursectrk; /* 56 */ 90258223a3SMatthew Dillon u_int16_t curseccp[2]; /* 57 */ 91258223a3SMatthew Dillon u_int16_t mult2; /* 59 */ 92258223a3SMatthew Dillon u_int16_t addrsec[2]; /* 60 */ 93258223a3SMatthew Dillon u_int16_t worddma; /* 62 */ 94258223a3SMatthew Dillon u_int16_t dworddma; /* 63 */ 95258223a3SMatthew Dillon u_int16_t advpiomode; /* 64 */ 96258223a3SMatthew Dillon u_int16_t minmwdma; /* 65 */ 97258223a3SMatthew Dillon u_int16_t recmwdma; /* 66 */ 98258223a3SMatthew Dillon u_int16_t minpio; /* 67 */ 99258223a3SMatthew Dillon u_int16_t minpioflow; /* 68 */ 100e0fb398bSTim u_int16_t support3; /* 69 */ 101e0fb398bSTim #define ATA_SUPPORT_RZAT 0x0020 102e0fb398bSTim #define ATA_SUPPORT_DRAT 0x4000 103e0fb398bSTim u_int16_t reserved4; /* 70 */ 104258223a3SMatthew Dillon u_int16_t typtime[2]; /* 71 */ 105258223a3SMatthew Dillon u_int16_t reserved5[2]; /* 73 */ 106258223a3SMatthew Dillon u_int16_t qdepth; /* 75 */ 107258223a3SMatthew Dillon u_int16_t satacap; /* 76 */ 108b989944dSSepherosa Ziehau u_int16_t satacap2; /* 77 */ 109b989944dSSepherosa Ziehau #define SATA_CAP2_SNDRCV_FPDMA (1 << 6) 110258223a3SMatthew Dillon u_int16_t satafsup; /* 78 */ 111750495d0SImre Vadász #define SATA_FEATURE_SUP_DEVIPS 0x0008 112750495d0SImre Vadász #define SATA_FEATURE_SUP_DEVSLEEP 0x0100 113258223a3SMatthew Dillon u_int16_t satafen; /* 79 */ 114258223a3SMatthew Dillon u_int16_t majver; /* 80 */ 115258223a3SMatthew Dillon u_int16_t minver; /* 81 */ 116258223a3SMatthew Dillon u_int16_t cmdset82; /* 82 */ 117258223a3SMatthew Dillon u_int16_t cmdset83; /* 83 */ 118258223a3SMatthew Dillon u_int16_t cmdset84; /* 84 */ 119258223a3SMatthew Dillon u_int16_t features85; /* 85 */ 120258223a3SMatthew Dillon u_int16_t features86; /* 86 */ 121258223a3SMatthew Dillon u_int16_t features87; /* 87 */ 122258223a3SMatthew Dillon #define ATA_ID_F87_WWN (1<<8) 123258223a3SMatthew Dillon u_int16_t ultradma; /* 88 */ 124258223a3SMatthew Dillon u_int16_t erasetime; /* 89 */ 125258223a3SMatthew Dillon u_int16_t erasetimex; /* 90 */ 126258223a3SMatthew Dillon u_int16_t apm; /* 91 */ 127258223a3SMatthew Dillon u_int16_t masterpw; /* 92 */ 128258223a3SMatthew Dillon u_int16_t hwreset; /* 93 */ 129258223a3SMatthew Dillon u_int16_t acoustic; /* 94 */ 130258223a3SMatthew Dillon u_int16_t stream_min; /* 95 */ 131258223a3SMatthew Dillon u_int16_t stream_xfer_d; /* 96 */ 132258223a3SMatthew Dillon u_int16_t stream_lat; /* 97 */ 133258223a3SMatthew Dillon u_int16_t streamperf[2]; /* 98 */ 134258223a3SMatthew Dillon u_int16_t addrsecxt[4]; /* 100 */ 135258223a3SMatthew Dillon u_int16_t stream_xfer_p; /* 104 */ 136e0fb398bSTim u_int16_t max_dsm_blocks; /* 105 */ 137258223a3SMatthew Dillon u_int16_t phys_sect_sz; /* 106 */ 138258223a3SMatthew Dillon u_int16_t seek_delay; /* 107 */ 139258223a3SMatthew Dillon u_int16_t naa_ieee_oui; /* 108 */ 140258223a3SMatthew Dillon u_int16_t ieee_oui_uid; /* 109 */ 141258223a3SMatthew Dillon u_int16_t uid_mid; /* 110 */ 142258223a3SMatthew Dillon u_int16_t uid_low; /* 111 */ 143258223a3SMatthew Dillon u_int16_t resv_wwn[4]; /* 112 */ 144258223a3SMatthew Dillon u_int16_t incits; /* 116 */ 145258223a3SMatthew Dillon u_int16_t words_lsec[2]; /* 117 */ 146258223a3SMatthew Dillon u_int16_t cmdset119; /* 119 */ 147258223a3SMatthew Dillon u_int16_t features120; /* 120 */ 148258223a3SMatthew Dillon u_int16_t padding2[6]; 149258223a3SMatthew Dillon u_int16_t rmsn; /* 127 */ 150258223a3SMatthew Dillon u_int16_t securestatus; /* 128 */ 151fd8bd957SMatthew Dillon #define ATA_SECURE_LOCKED (1<<2) 152fd8bd957SMatthew Dillon #define ATA_SECURE_FROZEN (1<<3) 153258223a3SMatthew Dillon u_int16_t vendor[31]; /* 129 */ 154e0fb398bSTim u_int16_t padding3[9]; /* 160 */ 155e0fb398bSTim u_int16_t support_dsm; /* 169 */ 156e0fb398bSTim #define ATA_SUPPORT_DSM_TRIM 0x0001 157e0fb398bSTim u_int16_t padding5[6]; /* 170 */ 158258223a3SMatthew Dillon u_int16_t curmedser[30]; /* 176 */ 159258223a3SMatthew Dillon u_int16_t sctsupport; /* 206 */ 1606a790b6aSSepherosa Ziehau u_int16_t padding4[10]; /* 207 */ 1616a790b6aSSepherosa Ziehau u_int16_t nomrota_rate; /* 217 */ 1626a790b6aSSepherosa Ziehau u_int16_t padding6[37]; /* 218 */ 163258223a3SMatthew Dillon u_int16_t integrity; /* 255 */ 164258223a3SMatthew Dillon } __packed; 165258223a3SMatthew Dillon 166258223a3SMatthew Dillon /* 167258223a3SMatthew Dillon * IDENTIFY DEVICE data 168258223a3SMatthew Dillon */ 169669fbbf7SMatthew Dillon #define ATA_IDENTIFY_SECURITY (1 << 1) 170258223a3SMatthew Dillon #define ATA_IDENTIFY_WRITECACHE (1 << 5) 171258223a3SMatthew Dillon #define ATA_IDENTIFY_LOOKAHEAD (1 << 6) 172258223a3SMatthew Dillon 173258223a3SMatthew Dillon /* 174258223a3SMatthew Dillon * Frame Information Structures 175258223a3SMatthew Dillon */ 176258223a3SMatthew Dillon 177258223a3SMatthew Dillon #define ATA_FIS_LENGTH 20 178258223a3SMatthew Dillon 179258223a3SMatthew Dillon struct ata_fis_h2d { 180258223a3SMatthew Dillon u_int8_t type; 181258223a3SMatthew Dillon #define ATA_FIS_TYPE_H2D 0x27 182258223a3SMatthew Dillon u_int8_t flags; 183258223a3SMatthew Dillon #define ATA_H2D_FLAGS_CMD (1<<7) 184258223a3SMatthew Dillon u_int8_t command; 185258223a3SMatthew Dillon u_int8_t features; 186258223a3SMatthew Dillon #define ATA_H2D_FEATURES_DMA (1<<0) 187258223a3SMatthew Dillon #define ATA_H2D_FEATURES_DIR (1<<2) 188258223a3SMatthew Dillon #define ATA_H2D_FEATURES_DIR_READ (1<<2) 189258223a3SMatthew Dillon #define ATA_H2D_FEATURES_DIR_WRITE (0<<2) 190258223a3SMatthew Dillon 191258223a3SMatthew Dillon u_int8_t lba_low; 192258223a3SMatthew Dillon u_int8_t lba_mid; 193258223a3SMatthew Dillon u_int8_t lba_high; 194258223a3SMatthew Dillon u_int8_t device; 195258223a3SMatthew Dillon #define ATA_H2D_DEVICE_LBA 0x40 196258223a3SMatthew Dillon 197258223a3SMatthew Dillon u_int8_t lba_low_exp; 198258223a3SMatthew Dillon u_int8_t lba_mid_exp; 199258223a3SMatthew Dillon u_int8_t lba_high_exp; 200258223a3SMatthew Dillon u_int8_t features_exp; 201258223a3SMatthew Dillon 202258223a3SMatthew Dillon u_int8_t sector_count; 203258223a3SMatthew Dillon u_int8_t sector_count_exp; 204258223a3SMatthew Dillon u_int8_t reserved0; 205258223a3SMatthew Dillon u_int8_t control; 206cec85a37SMatthew Dillon #define ATA_FIS_CONTROL_SRST 0x04 2071980eff3SMatthew Dillon #define ATA_FIS_CONTROL_4BIT 0x08 208258223a3SMatthew Dillon 209258223a3SMatthew Dillon u_int8_t reserved1; 210258223a3SMatthew Dillon u_int8_t reserved2; 211258223a3SMatthew Dillon u_int8_t reserved3; 212258223a3SMatthew Dillon u_int8_t reserved4; 213258223a3SMatthew Dillon } __packed; 214258223a3SMatthew Dillon 215258223a3SMatthew Dillon struct ata_fis_d2h { 216258223a3SMatthew Dillon u_int8_t type; 217258223a3SMatthew Dillon #define ATA_FIS_TYPE_D2H 0x34 218258223a3SMatthew Dillon u_int8_t flags; 219258223a3SMatthew Dillon #define ATA_D2H_FLAGS_INTR (1<<6) 220258223a3SMatthew Dillon u_int8_t status; 221258223a3SMatthew Dillon u_int8_t error; 222258223a3SMatthew Dillon 223258223a3SMatthew Dillon u_int8_t lba_low; 224258223a3SMatthew Dillon u_int8_t lba_mid; 225258223a3SMatthew Dillon u_int8_t lba_high; 226258223a3SMatthew Dillon u_int8_t device; 227258223a3SMatthew Dillon 228258223a3SMatthew Dillon u_int8_t lba_low_exp; 229258223a3SMatthew Dillon u_int8_t lba_mid_exp; 230258223a3SMatthew Dillon u_int8_t lba_high_exp; 231258223a3SMatthew Dillon u_int8_t reserved0; 232258223a3SMatthew Dillon 233258223a3SMatthew Dillon u_int8_t sector_count; 234258223a3SMatthew Dillon u_int8_t sector_count_exp; 235258223a3SMatthew Dillon u_int8_t reserved1; 236258223a3SMatthew Dillon u_int8_t reserved2; 237258223a3SMatthew Dillon 238258223a3SMatthew Dillon u_int8_t reserved3; 239258223a3SMatthew Dillon u_int8_t reserved4; 240258223a3SMatthew Dillon u_int8_t reserved5; 241258223a3SMatthew Dillon u_int8_t reserved6; 242258223a3SMatthew Dillon } __packed; 243258223a3SMatthew Dillon 244258223a3SMatthew Dillon /* 245258223a3SMatthew Dillon * SATA log page 10h - 246258223a3SMatthew Dillon * looks like a D2H FIS, with errored tag number in first byte. 247258223a3SMatthew Dillon */ 248258223a3SMatthew Dillon struct ata_log_page_10h { 249258223a3SMatthew Dillon struct ata_fis_d2h err_regs; 250258223a3SMatthew Dillon #define ATA_LOG_10H_TYPE_NOTQUEUED 0x80 251258223a3SMatthew Dillon #define ATA_LOG_10H_TYPE_TAG_MASK 0x1f 252258223a3SMatthew Dillon u_int8_t reserved[256 - sizeof(struct ata_fis_d2h)]; 253258223a3SMatthew Dillon u_int8_t vendor_specific[255]; 254258223a3SMatthew Dillon u_int8_t checksum; 255258223a3SMatthew Dillon } __packed; 256258223a3SMatthew Dillon 257258223a3SMatthew Dillon /* 258258223a3SMatthew Dillon * SATA registers 259258223a3SMatthew Dillon */ 260258223a3SMatthew Dillon 261258223a3SMatthew Dillon #define SATA_SStatus_DET 0x00f 262258223a3SMatthew Dillon #define SATA_SStatus_DET_NODEV 0x000 263258223a3SMatthew Dillon #define SATA_SStatus_DET_NOPHY 0x001 264258223a3SMatthew Dillon #define SATA_SStatus_DET_DEV 0x003 265258223a3SMatthew Dillon #define SATA_SStatus_DET_OFFLINE 0x008 266258223a3SMatthew Dillon 267258223a3SMatthew Dillon #define SATA_SStatus_SPD 0x0f0 268258223a3SMatthew Dillon #define SATA_SStatus_SPD_NONE 0x000 269258223a3SMatthew Dillon #define SATA_SStatus_SPD_1_5 0x010 270258223a3SMatthew Dillon #define SATA_SStatus_SPD_3_0 0x020 271258223a3SMatthew Dillon 272258223a3SMatthew Dillon #define SATA_SStatus_IPM 0xf00 273258223a3SMatthew Dillon #define SATA_SStatus_IPM_NODEV 0x000 274258223a3SMatthew Dillon #define SATA_SStatus_IPM_ACTIVE 0x100 275258223a3SMatthew Dillon #define SATA_SStatus_IPM_PARTIAL 0x200 276258223a3SMatthew Dillon #define SATA_SStatus_IPM_SLUMBER 0x600 277258223a3SMatthew Dillon 278258223a3SMatthew Dillon #define SATA_SIGNATURE_PORT_MULTIPLIER 0x96690101 279258223a3SMatthew Dillon #define SATA_SIGNATURE_ATAPI 0xeb140101 280258223a3SMatthew Dillon #define SATA_SIGNATURE_DISK 0x00000101 281258223a3SMatthew Dillon 282258223a3SMatthew Dillon /* 283258223a3SMatthew Dillon * ATA interface 284258223a3SMatthew Dillon */ 285258223a3SMatthew Dillon 2861980eff3SMatthew Dillon struct ahci_port; 2871980eff3SMatthew Dillon 288258223a3SMatthew Dillon struct ata_port { 2891980eff3SMatthew Dillon struct ata_identify at_identify; /* only if ATA_PORT_T_DISK */ 2901980eff3SMatthew Dillon struct ahci_port *at_ahci_port; 2911980eff3SMatthew Dillon int at_type; 292258223a3SMatthew Dillon #define ATA_PORT_T_NONE 0 293258223a3SMatthew Dillon #define ATA_PORT_T_DISK 1 294258223a3SMatthew Dillon #define ATA_PORT_T_ATAPI 2 2951980eff3SMatthew Dillon #define ATA_PORT_T_PM 3 2961980eff3SMatthew Dillon int at_features; 2971980eff3SMatthew Dillon #define ATA_PORT_F_WCACHE (1 << 0) 2981980eff3SMatthew Dillon #define ATA_PORT_F_RAHEAD (1 << 1) 2991980eff3SMatthew Dillon #define ATA_PORT_F_FRZLCK (1 << 2) 3003209f581SMatthew Dillon #define ATA_PORT_F_RESCAN (1 << 3) /* re-check on bus scan */ 3011980eff3SMatthew Dillon int at_probe; 3023209f581SMatthew Dillon #define ATA_PROBE_NEED_INIT 0 3033209f581SMatthew Dillon #define ATA_PROBE_NEED_HARD_RESET 1 3043209f581SMatthew Dillon #define ATA_PROBE_NEED_SOFT_RESET 2 3053209f581SMatthew Dillon #define ATA_PROBE_NEED_IDENT 3 3063209f581SMatthew Dillon #define ATA_PROBE_GOOD 4 3071980eff3SMatthew Dillon #define ATA_PROBE_FAILED 7 3081980eff3SMatthew Dillon int at_ncqdepth; 3091980eff3SMatthew Dillon u_int64_t at_capacity; /* only if ATA_PORT_T_DISK */ 3101980eff3SMatthew Dillon int at_target; /* port multiplier port */ 3111980eff3SMatthew Dillon char at_name[16]; 312258223a3SMatthew Dillon }; 313258223a3SMatthew Dillon 314258223a3SMatthew Dillon struct ata_xfer { 315258223a3SMatthew Dillon struct ata_fis_h2d *fis; 316258223a3SMatthew Dillon struct ata_fis_d2h rfis; 317258223a3SMatthew Dillon u_int8_t *packetcmd; 318258223a3SMatthew Dillon u_int8_t tag; 319*0e589b85SMatthew Dillon u_int64_t lba; /* diagnostic only */ 320258223a3SMatthew Dillon 321258223a3SMatthew Dillon void *data; 322258223a3SMatthew Dillon size_t datalen; 323258223a3SMatthew Dillon size_t resid; 324258223a3SMatthew Dillon 325258223a3SMatthew Dillon void (*complete)(struct ata_xfer *); 326258223a3SMatthew Dillon u_int timeout; 327bb79834dSMatthew Dillon int serial; /* detect timeout races */ 328258223a3SMatthew Dillon 329258223a3SMatthew Dillon int flags; 330258223a3SMatthew Dillon #define ATA_F_READ (1<<0) 331258223a3SMatthew Dillon #define ATA_F_WRITE (1<<1) 332258223a3SMatthew Dillon #define ATA_F_NOWAIT (1<<2) 333258223a3SMatthew Dillon #define ATA_F_POLL (1<<3) 334258223a3SMatthew Dillon #define ATA_F_PIO (1<<4) 335258223a3SMatthew Dillon #define ATA_F_PACKET (1<<5) 336258223a3SMatthew Dillon #define ATA_F_NCQ (1<<6) 337258223a3SMatthew Dillon #define ATA_F_TIMEOUT_RUNNING (1<<7) 3383209f581SMatthew Dillon #define ATA_F_TIMEOUT_DESIRED (1<<8) 339f4553de1SMatthew Dillon #define ATA_F_TIMEOUT_EXPIRED (1<<9) 34012feb904SMatthew Dillon #define ATA_F_AUTOSENSE (1<<10) 34112feb904SMatthew Dillon #define ATA_F_EXCLUSIVE (1<<11) 342492bffafSMatthew Dillon #define ATA_F_SILENT (1<<12) 3431067474aSMatthew Dillon #define ATA_FMT_FLAGS "\020" \ 344492bffafSMatthew Dillon "\015SILENT" \ 34512feb904SMatthew Dillon "\014EXCLUSIVE" \ 34612feb904SMatthew Dillon "\013AUTOSENSE" \ 3471067474aSMatthew Dillon "\012EXPIRED" \ 3481067474aSMatthew Dillon "\011DESIRED" "\010TRUNNING" \ 349258223a3SMatthew Dillon "\007NCQ" "\006PACKET" \ 350258223a3SMatthew Dillon "\005PIO" "\004POLL" "\003NOWAIT" \ 351258223a3SMatthew Dillon "\002WRITE" "\001READ" 352258223a3SMatthew Dillon 353258223a3SMatthew Dillon volatile int state; 354258223a3SMatthew Dillon #define ATA_S_SETUP 0 355258223a3SMatthew Dillon #define ATA_S_PENDING 1 356258223a3SMatthew Dillon #define ATA_S_COMPLETE 2 357258223a3SMatthew Dillon #define ATA_S_ERROR 3 358258223a3SMatthew Dillon #define ATA_S_TIMEOUT 4 359258223a3SMatthew Dillon #define ATA_S_ONCHIP 5 360258223a3SMatthew Dillon #define ATA_S_PUT 6 361258223a3SMatthew Dillon 362258223a3SMatthew Dillon void *atascsi_private; 3631980eff3SMatthew Dillon struct ata_port *at; /* NULL if direct-attached */ 364258223a3SMatthew Dillon }; 365258223a3SMatthew Dillon 366