1 /*- 2 * Copyright (c) 2000 Doug Rabson 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 * 26 * $FreeBSD: src/sys/pci/agp.c,v 1.56 2007/07/13 16:28:11 anholt Exp $ 27 * $DragonFly: src/sys/dev/agp/agp.c,v 1.28 2008/01/05 14:02:37 swildner Exp $ 28 */ 29 30 #include "opt_bus.h" 31 #include "opt_pci.h" 32 33 #include <sys/param.h> 34 #include <sys/systm.h> 35 #include <sys/device.h> 36 #include <sys/conf.h> 37 #include <sys/malloc.h> 38 #include <sys/kernel.h> 39 #include <sys/bus.h> 40 #include <sys/ioccom.h> 41 #include <sys/agpio.h> 42 #include <sys/lock.h> 43 #include <sys/proc.h> 44 #include <sys/rman.h> 45 46 #include <bus/pci/pcivar.h> 47 #include <bus/pci/pcireg.h> 48 #include "agppriv.h" 49 #include "agpvar.h" 50 #include "agpreg.h" 51 52 #include <vm/vm.h> 53 #include <vm/vm_object.h> 54 #include <vm/vm_page.h> 55 #include <vm/vm_pageout.h> 56 #include <vm/pmap.h> 57 58 #include <machine/md_var.h> 59 60 MODULE_VERSION(agp, 1); 61 62 MALLOC_DEFINE(M_AGP, "agp", "AGP data structures"); 63 64 #define CDEV_MAJOR 148 65 /* agp_drv.c */ 66 static d_open_t agp_open; 67 static d_close_t agp_close; 68 static d_ioctl_t agp_ioctl; 69 static d_mmap_t agp_mmap; 70 71 static struct dev_ops agp_ops = { 72 { "agp", CDEV_MAJOR, D_TTY }, 73 .d_open = agp_open, 74 .d_close = agp_close, 75 .d_ioctl = agp_ioctl, 76 .d_mmap = agp_mmap, 77 }; 78 79 static devclass_t agp_devclass; 80 #define KDEV2DEV(kdev) devclass_get_device(agp_devclass, minor(kdev)) 81 82 /* Helper functions for implementing chipset mini drivers. */ 83 84 void 85 agp_flush_cache(void) 86 { 87 #if defined(__i386__) || defined(__amd64__) 88 wbinvd(); 89 #endif 90 } 91 92 u_int8_t 93 agp_find_caps(device_t dev) 94 { 95 u_int32_t status; 96 u_int8_t ptr, next; 97 98 /* 99 * Check the CAP_LIST bit of the PCI status register first. 100 */ 101 status = pci_read_config(dev, PCIR_STATUS, 2); 102 if (!(status & 0x10)) 103 return 0; 104 105 /* 106 * Traverse the capabilities list. 107 */ 108 for (ptr = pci_read_config(dev, AGP_CAPPTR, 1); 109 ptr != 0; 110 ptr = next) { 111 u_int32_t capid = pci_read_config(dev, ptr, 4); 112 next = AGP_CAPID_GET_NEXT_PTR(capid); 113 114 /* 115 * If this capability entry ID is 2, then we are done. 116 */ 117 if (AGP_CAPID_GET_CAP_ID(capid) == 2) 118 return ptr; 119 } 120 121 return 0; 122 } 123 124 /* 125 * Find an AGP display device (if any). 126 */ 127 static device_t 128 agp_find_display(void) 129 { 130 devclass_t pci = devclass_find("pci"); 131 device_t bus, dev = 0; 132 device_t *kids; 133 int busnum, numkids, i; 134 135 for (busnum = 0; busnum < devclass_get_maxunit(pci); busnum++) { 136 bus = devclass_get_device(pci, busnum); 137 if (!bus) 138 continue; 139 device_get_children(bus, &kids, &numkids); 140 for (i = 0; i < numkids; i++) { 141 dev = kids[i]; 142 if (pci_get_class(dev) == PCIC_DISPLAY 143 && pci_get_subclass(dev) == PCIS_DISPLAY_VGA) 144 if (agp_find_caps(dev)) { 145 kfree(kids, M_TEMP); 146 return dev; 147 } 148 149 } 150 kfree(kids, M_TEMP); 151 } 152 153 return 0; 154 } 155 156 struct agp_gatt * 157 agp_alloc_gatt(device_t dev) 158 { 159 u_int32_t apsize = AGP_GET_APERTURE(dev); 160 u_int32_t entries = apsize >> AGP_PAGE_SHIFT; 161 struct agp_gatt *gatt; 162 163 if (bootverbose) 164 device_printf(dev, 165 "allocating GATT for aperture of size %dM\n", 166 apsize / (1024*1024)); 167 168 if (entries == 0) { 169 device_printf(dev, "bad aperture size\n"); 170 return NULL; 171 } 172 173 gatt = kmalloc(sizeof(struct agp_gatt), M_AGP, M_INTWAIT); 174 gatt->ag_entries = entries; 175 gatt->ag_virtual = contigmalloc(entries * sizeof(u_int32_t), M_AGP, 176 M_WAITOK|M_ZERO, 0, ~0, PAGE_SIZE, 0); 177 if (!gatt->ag_virtual) { 178 if (bootverbose) 179 device_printf(dev, "contiguous allocation failed\n"); 180 kfree(gatt, M_AGP); 181 return 0; 182 } 183 gatt->ag_physical = vtophys((vm_offset_t) gatt->ag_virtual); 184 agp_flush_cache(); 185 186 return gatt; 187 } 188 189 void 190 agp_free_gatt(struct agp_gatt *gatt) 191 { 192 contigfree(gatt->ag_virtual, 193 gatt->ag_entries * sizeof(u_int32_t), M_AGP); 194 kfree(gatt, M_AGP); 195 } 196 197 static u_int agp_max[][2] = { 198 {0, 0}, 199 {32, 4}, 200 {64, 28}, 201 {128, 96}, 202 {256, 204}, 203 {512, 440}, 204 {1024, 942}, 205 {2048, 1920}, 206 {4096, 3932} 207 }; 208 #define agp_max_size (sizeof(agp_max) / sizeof(agp_max[0])) 209 210 /** 211 * Sets the PCI resource which represents the AGP aperture. 212 * 213 * If not called, the default AGP aperture resource of AGP_APBASE will 214 * be used. Must be called before agp_generic_attach(). 215 */ 216 void 217 agp_set_aperture_resource(device_t dev, int rid) 218 { 219 struct agp_softc *sc = device_get_softc(dev); 220 221 sc->as_aperture_rid = rid; 222 } 223 224 int 225 agp_generic_attach(device_t dev) 226 { 227 struct agp_softc *sc = device_get_softc(dev); 228 int i; 229 u_int memsize; 230 231 /* 232 * Find and map the aperture, RF_SHAREABLE for DRM but not RF_ACTIVE 233 * because the kernel doesn't need to map it. 234 */ 235 if (sc->as_aperture_rid == 0) 236 sc->as_aperture_rid = AGP_APBASE; 237 238 sc->as_aperture = bus_alloc_resource_any(dev, SYS_RES_MEMORY, 239 &sc->as_aperture_rid, RF_SHAREABLE); 240 if (!sc->as_aperture) 241 return ENOMEM; 242 243 /* 244 * Work out an upper bound for agp memory allocation. This 245 * uses a heurisitc table from the Linux driver. 246 */ 247 memsize = ptoa(Maxmem) >> 20; 248 for (i = 0; i < agp_max_size; i++) { 249 if (memsize <= agp_max[i][0]) 250 break; 251 } 252 if (i == agp_max_size) i = agp_max_size - 1; 253 sc->as_maxmem = agp_max[i][1] << 20U; 254 255 /* 256 * The lock is used to prevent re-entry to 257 * agp_generic_bind_memory() since that function can sleep. 258 */ 259 lockinit(&sc->as_lock, "agplk", 0, 0); 260 261 /* 262 * Initialise stuff for the userland device. 263 */ 264 agp_devclass = devclass_find("agp"); 265 TAILQ_INIT(&sc->as_memory); 266 sc->as_nextid = 1; 267 268 dev_ops_add(&agp_ops, -1, device_get_unit(dev)); 269 make_dev(&agp_ops, device_get_unit(dev), UID_ROOT, GID_WHEEL, 270 0600, "agpgart"); 271 272 return 0; 273 } 274 275 int 276 agp_generic_detach(device_t dev) 277 { 278 struct agp_softc *sc = device_get_softc(dev); 279 280 bus_release_resource(dev, SYS_RES_MEMORY, AGP_APBASE, sc->as_aperture); 281 agp_flush_cache(); 282 dev_ops_remove(&agp_ops, -1, device_get_unit(dev)); 283 return 0; 284 } 285 286 /** 287 * Default AGP aperture size detection which simply returns the size of 288 * the aperture's PCI resource. 289 */ 290 int 291 agp_generic_get_aperture(device_t dev) 292 { 293 struct agp_softc *sc = device_get_softc(dev); 294 295 return rman_get_size(sc->as_aperture); 296 } 297 298 /** 299 * Default AGP aperture size setting function, which simply doesn't allow 300 * changes to resource size. 301 */ 302 int 303 agp_generic_set_aperture(device_t dev, u_int32_t aperture) 304 { 305 u_int32_t current_aperture; 306 307 current_aperture = AGP_GET_APERTURE(dev); 308 if (current_aperture != aperture) 309 return EINVAL; 310 else 311 return 0; 312 } 313 314 /* 315 * This does the enable logic for v3, with the same topology 316 * restrictions as in place for v2 -- one bus, one device on the bus. 317 */ 318 static int 319 agp_v3_enable(device_t dev, device_t mdev, u_int32_t mode) 320 { 321 u_int32_t tstatus, mstatus; 322 u_int32_t command; 323 int rq, sba, fw, rate, arqsz, cal; 324 325 tstatus = pci_read_config(dev, agp_find_caps(dev) + AGP_STATUS, 4); 326 mstatus = pci_read_config(mdev, agp_find_caps(mdev) + AGP_STATUS, 4); 327 328 /* Set RQ to the min of mode, tstatus and mstatus */ 329 rq = AGP_MODE_GET_RQ(mode); 330 if (AGP_MODE_GET_RQ(tstatus) < rq) 331 rq = AGP_MODE_GET_RQ(tstatus); 332 if (AGP_MODE_GET_RQ(mstatus) < rq) 333 rq = AGP_MODE_GET_RQ(mstatus); 334 335 /* 336 * ARQSZ - Set the value to the maximum one. 337 * Don't allow the mode register to override values. 338 */ 339 arqsz = AGP_MODE_GET_ARQSZ(mode); 340 if (AGP_MODE_GET_ARQSZ(tstatus) > rq) 341 rq = AGP_MODE_GET_ARQSZ(tstatus); 342 if (AGP_MODE_GET_ARQSZ(mstatus) > rq) 343 rq = AGP_MODE_GET_ARQSZ(mstatus); 344 345 /* Calibration cycle - don't allow override by mode register */ 346 cal = AGP_MODE_GET_CAL(tstatus); 347 if (AGP_MODE_GET_CAL(mstatus) < cal) 348 cal = AGP_MODE_GET_CAL(mstatus); 349 350 /* SBA must be supported for AGP v3. */ 351 sba = 1; 352 353 /* Set FW if all three support it. */ 354 fw = (AGP_MODE_GET_FW(tstatus) 355 & AGP_MODE_GET_FW(mstatus) 356 & AGP_MODE_GET_FW(mode)); 357 358 /* Figure out the max rate */ 359 rate = (AGP_MODE_GET_RATE(tstatus) 360 & AGP_MODE_GET_RATE(mstatus) 361 & AGP_MODE_GET_RATE(mode)); 362 if (rate & AGP_MODE_V3_RATE_8x) 363 rate = AGP_MODE_V3_RATE_8x; 364 else 365 rate = AGP_MODE_V3_RATE_4x; 366 if (bootverbose) 367 device_printf(dev, "Setting AGP v3 mode %d\n", rate * 4); 368 369 pci_write_config(dev, agp_find_caps(dev) + AGP_COMMAND, 0, 4); 370 371 /* Construct the new mode word and tell the hardware */ 372 command = 0; 373 command = AGP_MODE_SET_RQ(0, rq); 374 command = AGP_MODE_SET_ARQSZ(command, arqsz); 375 command = AGP_MODE_SET_CAL(command, cal); 376 command = AGP_MODE_SET_SBA(command, sba); 377 command = AGP_MODE_SET_FW(command, fw); 378 command = AGP_MODE_SET_RATE(command, rate); 379 command = AGP_MODE_SET_MODE_3(command, 1); 380 command = AGP_MODE_SET_AGP(command, 1); 381 pci_write_config(dev, agp_find_caps(dev) + AGP_COMMAND, command, 4); 382 pci_write_config(mdev, agp_find_caps(mdev) + AGP_COMMAND, command, 4); 383 384 return 0; 385 } 386 387 static int 388 agp_v2_enable(device_t dev, device_t mdev, u_int32_t mode) 389 { 390 u_int32_t tstatus, mstatus; 391 u_int32_t command; 392 int rq, sba, fw, rate; 393 394 tstatus = pci_read_config(dev, agp_find_caps(dev) + AGP_STATUS, 4); 395 mstatus = pci_read_config(mdev, agp_find_caps(mdev) + AGP_STATUS, 4); 396 397 /* Set RQ to the min of mode, tstatus and mstatus */ 398 rq = AGP_MODE_GET_RQ(mode); 399 if (AGP_MODE_GET_RQ(tstatus) < rq) 400 rq = AGP_MODE_GET_RQ(tstatus); 401 if (AGP_MODE_GET_RQ(mstatus) < rq) 402 rq = AGP_MODE_GET_RQ(mstatus); 403 404 /* Set SBA if all three can deal with SBA */ 405 sba = (AGP_MODE_GET_SBA(tstatus) 406 & AGP_MODE_GET_SBA(mstatus) 407 & AGP_MODE_GET_SBA(mode)); 408 409 /* Similar for FW */ 410 fw = (AGP_MODE_GET_FW(tstatus) 411 & AGP_MODE_GET_FW(mstatus) 412 & AGP_MODE_GET_FW(mode)); 413 414 /* Figure out the max rate */ 415 rate = (AGP_MODE_GET_RATE(tstatus) 416 & AGP_MODE_GET_RATE(mstatus) 417 & AGP_MODE_GET_RATE(mode)); 418 if (rate & AGP_MODE_V2_RATE_4x) 419 rate = AGP_MODE_V2_RATE_4x; 420 else if (rate & AGP_MODE_V2_RATE_2x) 421 rate = AGP_MODE_V2_RATE_2x; 422 else 423 rate = AGP_MODE_V2_RATE_1x; 424 if (bootverbose) 425 device_printf(dev, "Setting AGP v2 mode %d\n", rate); 426 427 /* Construct the new mode word and tell the hardware */ 428 command = 0; 429 command = AGP_MODE_SET_RQ(0, rq); 430 command = AGP_MODE_SET_SBA(command, sba); 431 command = AGP_MODE_SET_FW(command, fw); 432 command = AGP_MODE_SET_RATE(command, rate); 433 command = AGP_MODE_SET_AGP(command, 1); 434 pci_write_config(dev, agp_find_caps(dev) + AGP_COMMAND, command, 4); 435 pci_write_config(mdev, agp_find_caps(mdev) + AGP_COMMAND, command, 4); 436 437 return 0; 438 } 439 440 int 441 agp_generic_enable(device_t dev, u_int32_t mode) 442 { 443 device_t mdev = agp_find_display(); 444 u_int32_t tstatus, mstatus; 445 446 if (!mdev) { 447 AGP_DPF("can't find display\n"); 448 return ENXIO; 449 } 450 451 tstatus = pci_read_config(dev, agp_find_caps(dev) + AGP_STATUS, 4); 452 mstatus = pci_read_config(mdev, agp_find_caps(mdev) + AGP_STATUS, 4); 453 454 /* 455 * Check display and bridge for AGP v3 support. AGP v3 allows 456 * more variety in topology than v2, e.g. multiple AGP devices 457 * attached to one bridge, or multiple AGP bridges in one 458 * system. This doesn't attempt to address those situations, 459 * but should work fine for a classic single AGP slot system 460 * with AGP v3. 461 */ 462 if (AGP_MODE_GET_MODE_3(mode) && 463 AGP_MODE_GET_MODE_3(tstatus) && 464 AGP_MODE_GET_MODE_3(mstatus)) 465 return (agp_v3_enable(dev, mdev, mode)); 466 else 467 return (agp_v2_enable(dev, mdev, mode)); 468 } 469 470 struct agp_memory * 471 agp_generic_alloc_memory(device_t dev, int type, vm_size_t size) 472 { 473 struct agp_softc *sc = device_get_softc(dev); 474 struct agp_memory *mem; 475 476 if ((size & (AGP_PAGE_SIZE - 1)) != 0) 477 return 0; 478 479 if (sc->as_allocated + size > sc->as_maxmem) 480 return 0; 481 482 if (type != 0) { 483 kprintf("agp_generic_alloc_memory: unsupported type %d\n", 484 type); 485 return 0; 486 } 487 488 mem = kmalloc(sizeof *mem, M_AGP, M_INTWAIT); 489 mem->am_id = sc->as_nextid++; 490 mem->am_size = size; 491 mem->am_type = 0; 492 mem->am_obj = vm_object_allocate(OBJT_DEFAULT, atop(round_page(size))); 493 mem->am_physical = 0; 494 mem->am_offset = 0; 495 mem->am_is_bound = 0; 496 TAILQ_INSERT_TAIL(&sc->as_memory, mem, am_link); 497 sc->as_allocated += size; 498 499 return mem; 500 } 501 502 int 503 agp_generic_free_memory(device_t dev, struct agp_memory *mem) 504 { 505 struct agp_softc *sc = device_get_softc(dev); 506 507 if (mem->am_is_bound) 508 return EBUSY; 509 510 sc->as_allocated -= mem->am_size; 511 TAILQ_REMOVE(&sc->as_memory, mem, am_link); 512 vm_object_deallocate(mem->am_obj); 513 kfree(mem, M_AGP); 514 return 0; 515 } 516 517 int 518 agp_generic_bind_memory(device_t dev, struct agp_memory *mem, 519 vm_offset_t offset) 520 { 521 struct agp_softc *sc = device_get_softc(dev); 522 vm_offset_t i, j, k; 523 vm_page_t m; 524 int error; 525 526 lockmgr(&sc->as_lock, LK_EXCLUSIVE); 527 528 if (mem->am_is_bound) { 529 device_printf(dev, "memory already bound\n"); 530 lockmgr(&sc->as_lock, LK_RELEASE); 531 return EINVAL; 532 } 533 534 if (offset < 0 535 || (offset & (AGP_PAGE_SIZE - 1)) != 0 536 || offset + mem->am_size > AGP_GET_APERTURE(dev)) { 537 device_printf(dev, "binding memory at bad offset %#x,%#x,%#x\n", 538 (int) offset, (int)mem->am_size, 539 (int)AGP_GET_APERTURE(dev)); 540 kprintf("Check BIOS's aperature size vs X\n"); 541 lockmgr(&sc->as_lock, LK_RELEASE); 542 return EINVAL; 543 } 544 545 /* 546 * Bind the individual pages and flush the chipset's 547 * TLB. 548 */ 549 for (i = 0; i < mem->am_size; i += PAGE_SIZE) { 550 /* 551 * Find a page from the object and wire it 552 * down. This page will be mapped using one or more 553 * entries in the GATT (assuming that PAGE_SIZE >= 554 * AGP_PAGE_SIZE. If this is the first call to bind, 555 * the pages will be allocated and zeroed. 556 */ 557 m = vm_page_grab(mem->am_obj, OFF_TO_IDX(i), 558 VM_ALLOC_NORMAL | VM_ALLOC_ZERO | VM_ALLOC_RETRY); 559 if ((m->flags & PG_ZERO) == 0) 560 vm_page_zero_fill(m); 561 AGP_DPF("found page pa=%#x\n", VM_PAGE_TO_PHYS(m)); 562 vm_page_wire(m); 563 564 /* 565 * Install entries in the GATT, making sure that if 566 * AGP_PAGE_SIZE < PAGE_SIZE and mem->am_size is not 567 * aligned to PAGE_SIZE, we don't modify too many GATT 568 * entries. 569 */ 570 for (j = 0; j < PAGE_SIZE && i + j < mem->am_size; 571 j += AGP_PAGE_SIZE) { 572 vm_offset_t pa = VM_PAGE_TO_PHYS(m) + j; 573 AGP_DPF("binding offset %#x to pa %#x\n", 574 offset + i + j, pa); 575 error = AGP_BIND_PAGE(dev, offset + i + j, pa); 576 if (error) { 577 /* 578 * Bail out. Reverse all the mappings 579 * and unwire the pages. 580 */ 581 vm_page_wakeup(m); 582 for (k = 0; k < i + j; k += AGP_PAGE_SIZE) 583 AGP_UNBIND_PAGE(dev, offset + k); 584 for (k = 0; k <= i; k += PAGE_SIZE) { 585 m = vm_page_lookup(mem->am_obj, 586 OFF_TO_IDX(k)); 587 vm_page_unwire(m, 0); 588 } 589 lockmgr(&sc->as_lock, LK_RELEASE); 590 return error; 591 } 592 } 593 vm_page_wakeup(m); 594 } 595 596 /* 597 * Flush the cpu cache since we are providing a new mapping 598 * for these pages. 599 */ 600 agp_flush_cache(); 601 602 /* 603 * Make sure the chipset gets the new mappings. 604 */ 605 AGP_FLUSH_TLB(dev); 606 607 mem->am_offset = offset; 608 mem->am_is_bound = 1; 609 610 lockmgr(&sc->as_lock, LK_RELEASE); 611 612 return 0; 613 } 614 615 int 616 agp_generic_unbind_memory(device_t dev, struct agp_memory *mem) 617 { 618 struct agp_softc *sc = device_get_softc(dev); 619 vm_page_t m; 620 int i; 621 622 lockmgr(&sc->as_lock, LK_EXCLUSIVE); 623 624 if (!mem->am_is_bound) { 625 device_printf(dev, "memory is not bound\n"); 626 lockmgr(&sc->as_lock, LK_RELEASE); 627 return EINVAL; 628 } 629 630 631 /* 632 * Unbind the individual pages and flush the chipset's 633 * TLB. Unwire the pages so they can be swapped. 634 */ 635 for (i = 0; i < mem->am_size; i += AGP_PAGE_SIZE) 636 AGP_UNBIND_PAGE(dev, mem->am_offset + i); 637 for (i = 0; i < mem->am_size; i += PAGE_SIZE) { 638 m = vm_page_lookup(mem->am_obj, atop(i)); 639 vm_page_unwire(m, 0); 640 } 641 642 agp_flush_cache(); 643 AGP_FLUSH_TLB(dev); 644 645 mem->am_offset = 0; 646 mem->am_is_bound = 0; 647 648 lockmgr(&sc->as_lock, LK_RELEASE); 649 650 return 0; 651 } 652 653 /* Helper functions for implementing user/kernel api */ 654 655 static int 656 agp_acquire_helper(device_t dev, enum agp_acquire_state state) 657 { 658 struct agp_softc *sc = device_get_softc(dev); 659 660 if (sc->as_state != AGP_ACQUIRE_FREE) 661 return EBUSY; 662 sc->as_state = state; 663 664 return 0; 665 } 666 667 static int 668 agp_release_helper(device_t dev, enum agp_acquire_state state) 669 { 670 struct agp_softc *sc = device_get_softc(dev); 671 672 if (sc->as_state == AGP_ACQUIRE_FREE) 673 return 0; 674 675 if (sc->as_state != state) 676 return EBUSY; 677 678 sc->as_state = AGP_ACQUIRE_FREE; 679 return 0; 680 } 681 682 static struct agp_memory * 683 agp_find_memory(device_t dev, int id) 684 { 685 struct agp_softc *sc = device_get_softc(dev); 686 struct agp_memory *mem; 687 688 AGP_DPF("searching for memory block %d\n", id); 689 TAILQ_FOREACH(mem, &sc->as_memory, am_link) { 690 AGP_DPF("considering memory block %d\n", mem->am_id); 691 if (mem->am_id == id) 692 return mem; 693 } 694 return 0; 695 } 696 697 /* Implementation of the userland ioctl api */ 698 699 static int 700 agp_info_user(device_t dev, agp_info *info) 701 { 702 struct agp_softc *sc = device_get_softc(dev); 703 704 bzero(info, sizeof *info); 705 info->bridge_id = pci_get_devid(dev); 706 info->agp_mode = 707 pci_read_config(dev, agp_find_caps(dev) + AGP_STATUS, 4); 708 info->aper_base = rman_get_start(sc->as_aperture); 709 info->aper_size = AGP_GET_APERTURE(dev) >> 20; 710 info->pg_total = info->pg_system = sc->as_maxmem >> AGP_PAGE_SHIFT; 711 info->pg_used = sc->as_allocated >> AGP_PAGE_SHIFT; 712 713 return 0; 714 } 715 716 static int 717 agp_setup_user(device_t dev, agp_setup *setup) 718 { 719 return AGP_ENABLE(dev, setup->agp_mode); 720 } 721 722 static int 723 agp_allocate_user(device_t dev, agp_allocate *alloc) 724 { 725 struct agp_memory *mem; 726 727 mem = AGP_ALLOC_MEMORY(dev, 728 alloc->type, 729 alloc->pg_count << AGP_PAGE_SHIFT); 730 if (mem) { 731 alloc->key = mem->am_id; 732 alloc->physical = mem->am_physical; 733 return 0; 734 } else { 735 return ENOMEM; 736 } 737 } 738 739 static int 740 agp_deallocate_user(device_t dev, int id) 741 { 742 struct agp_memory *mem = agp_find_memory(dev, id); 743 744 if (mem) { 745 AGP_FREE_MEMORY(dev, mem); 746 return 0; 747 } else { 748 return ENOENT; 749 } 750 } 751 752 static int 753 agp_bind_user(device_t dev, agp_bind *bind) 754 { 755 struct agp_memory *mem = agp_find_memory(dev, bind->key); 756 757 if (!mem) 758 return ENOENT; 759 760 return AGP_BIND_MEMORY(dev, mem, bind->pg_start << AGP_PAGE_SHIFT); 761 } 762 763 static int 764 agp_unbind_user(device_t dev, agp_unbind *unbind) 765 { 766 struct agp_memory *mem = agp_find_memory(dev, unbind->key); 767 768 if (!mem) 769 return ENOENT; 770 771 return AGP_UNBIND_MEMORY(dev, mem); 772 } 773 774 static int 775 agp_open(struct dev_open_args *ap) 776 { 777 cdev_t kdev = ap->a_head.a_dev; 778 device_t dev = KDEV2DEV(kdev); 779 struct agp_softc *sc = device_get_softc(dev); 780 781 if (!sc->as_isopen) { 782 sc->as_isopen = 1; 783 device_busy(dev); 784 } 785 786 return 0; 787 } 788 789 static int 790 agp_close(struct dev_close_args *ap) 791 { 792 cdev_t kdev = ap->a_head.a_dev; 793 device_t dev = KDEV2DEV(kdev); 794 struct agp_softc *sc = device_get_softc(dev); 795 struct agp_memory *mem; 796 797 /* 798 * Clear the GATT and force release on last close 799 */ 800 while ((mem = TAILQ_FIRST(&sc->as_memory)) != 0) { 801 if (mem->am_is_bound) 802 AGP_UNBIND_MEMORY(dev, mem); 803 AGP_FREE_MEMORY(dev, mem); 804 } 805 if (sc->as_state == AGP_ACQUIRE_USER) 806 agp_release_helper(dev, AGP_ACQUIRE_USER); 807 sc->as_isopen = 0; 808 device_unbusy(dev); 809 810 return 0; 811 } 812 813 static int 814 agp_ioctl(struct dev_ioctl_args *ap) 815 { 816 cdev_t kdev = ap->a_head.a_dev; 817 device_t dev = KDEV2DEV(kdev); 818 819 switch (ap->a_cmd) { 820 case AGPIOC_INFO: 821 return agp_info_user(dev, (agp_info *)ap->a_data); 822 823 case AGPIOC_ACQUIRE: 824 return agp_acquire_helper(dev, AGP_ACQUIRE_USER); 825 826 case AGPIOC_RELEASE: 827 return agp_release_helper(dev, AGP_ACQUIRE_USER); 828 829 case AGPIOC_SETUP: 830 return agp_setup_user(dev, (agp_setup *)ap->a_data); 831 832 case AGPIOC_ALLOCATE: 833 return agp_allocate_user(dev, (agp_allocate *)ap->a_data); 834 835 case AGPIOC_DEALLOCATE: 836 return agp_deallocate_user(dev, *(int *)ap->a_data); 837 838 case AGPIOC_BIND: 839 return agp_bind_user(dev, (agp_bind *)ap->a_data); 840 841 case AGPIOC_UNBIND: 842 return agp_unbind_user(dev, (agp_unbind *)ap->a_data); 843 844 } 845 846 return EINVAL; 847 } 848 849 static int 850 agp_mmap(struct dev_mmap_args *ap) 851 { 852 cdev_t kdev = ap->a_head.a_dev; 853 device_t dev = KDEV2DEV(kdev); 854 struct agp_softc *sc = device_get_softc(dev); 855 856 if (ap->a_offset > AGP_GET_APERTURE(dev)) 857 return EINVAL; 858 ap->a_result = atop(rman_get_start(sc->as_aperture) + ap->a_offset); 859 return 0; 860 } 861 862 /* Implementation of the kernel api */ 863 864 device_t 865 agp_find_device(void) 866 { 867 device_t *children, child; 868 int i, count; 869 870 if (!agp_devclass) 871 return NULL; 872 if (devclass_get_devices(agp_devclass, &children, &count) != 0) 873 return NULL; 874 child = NULL; 875 for (i = 0; i < count; i++) { 876 if (device_is_attached(children[i])) { 877 child = children[i]; 878 break; 879 } 880 } 881 kfree(children, M_TEMP); 882 return child; 883 } 884 885 enum agp_acquire_state 886 agp_state(device_t dev) 887 { 888 struct agp_softc *sc = device_get_softc(dev); 889 return sc->as_state; 890 } 891 892 void 893 agp_get_info(device_t dev, struct agp_info *info) 894 { 895 struct agp_softc *sc = device_get_softc(dev); 896 897 info->ai_mode = 898 pci_read_config(dev, agp_find_caps(dev) + AGP_STATUS, 4); 899 info->ai_aperture_base = rman_get_start(sc->as_aperture); 900 info->ai_aperture_size = rman_get_size(sc->as_aperture); 901 info->ai_memory_allowed = sc->as_maxmem; 902 info->ai_memory_used = sc->as_allocated; 903 } 904 905 int 906 agp_acquire(device_t dev) 907 { 908 return agp_acquire_helper(dev, AGP_ACQUIRE_KERNEL); 909 } 910 911 int 912 agp_release(device_t dev) 913 { 914 return agp_release_helper(dev, AGP_ACQUIRE_KERNEL); 915 } 916 917 int 918 agp_enable(device_t dev, u_int32_t mode) 919 { 920 return AGP_ENABLE(dev, mode); 921 } 922 923 void *agp_alloc_memory(device_t dev, int type, vm_size_t bytes) 924 { 925 return (void *) AGP_ALLOC_MEMORY(dev, type, bytes); 926 } 927 928 void agp_free_memory(device_t dev, void *handle) 929 { 930 struct agp_memory *mem = (struct agp_memory *) handle; 931 AGP_FREE_MEMORY(dev, mem); 932 } 933 934 int agp_bind_memory(device_t dev, void *handle, vm_offset_t offset) 935 { 936 struct agp_memory *mem = (struct agp_memory *) handle; 937 return AGP_BIND_MEMORY(dev, mem, offset); 938 } 939 940 int agp_unbind_memory(device_t dev, void *handle) 941 { 942 struct agp_memory *mem = (struct agp_memory *) handle; 943 return AGP_UNBIND_MEMORY(dev, mem); 944 } 945 946 void agp_memory_info(device_t dev, void *handle, struct 947 agp_memory_info *mi) 948 { 949 struct agp_memory *mem = (struct agp_memory *) handle; 950 951 mi->ami_size = mem->am_size; 952 mi->ami_physical = mem->am_physical; 953 mi->ami_offset = mem->am_offset; 954 mi->ami_is_bound = mem->am_is_bound; 955 } 956