1b7d5e03cSMatthew Dillon #ifndef __AR9300_FREEBSD_H__ 2b7d5e03cSMatthew Dillon #define __AR9300_FREEBSD_H__ 3b7d5e03cSMatthew Dillon 4b7d5e03cSMatthew Dillon extern void ar9300_attach_freebsd_ops(struct ath_hal *ah); 5b7d5e03cSMatthew Dillon extern HAL_BOOL ar9300_reset_freebsd(struct ath_hal *ah, HAL_OPMODE opmode, 6b7d5e03cSMatthew Dillon struct ieee80211_channel *chan, HAL_BOOL bChannelChange, 7*a20e5e51SMatthew Dillon HAL_RESET_TYPE resetType, HAL_STATUS *status); 8b7d5e03cSMatthew Dillon extern void ar9300_config_pcie_freebsd(struct ath_hal *, HAL_BOOL, HAL_BOOL); 9b7d5e03cSMatthew Dillon extern HAL_STATUS ar9300_eeprom_get_freebsd(struct ath_hal *, int param, 10b7d5e03cSMatthew Dillon void *val); 11b7d5e03cSMatthew Dillon extern HAL_BOOL ar9300_stop_tx_dma_freebsd(struct ath_hal *ah, u_int q); 12b7d5e03cSMatthew Dillon extern void ar9300_ani_poll_freebsd(struct ath_hal *ah, 13b7d5e03cSMatthew Dillon const struct ieee80211_channel *chan); 14848b370cSMatthew Dillon extern void ar9300_config_defaults_freebsd(struct ath_hal *ah, 15848b370cSMatthew Dillon HAL_OPS_CONFIG *ah_config); 16b7d5e03cSMatthew Dillon extern HAL_BOOL ar9300_stop_dma_receive_freebsd(struct ath_hal *ah); 17b7d5e03cSMatthew Dillon extern HAL_BOOL ar9300_get_pending_interrupts_freebsd(struct ath_hal *ah, 18b7d5e03cSMatthew Dillon HAL_INT *masked); 19b7d5e03cSMatthew Dillon extern HAL_INT ar9300_set_interrupts_freebsd(struct ath_hal *ah, 20b7d5e03cSMatthew Dillon HAL_INT mask); 21b7d5e03cSMatthew Dillon extern HAL_BOOL ar9300_per_calibration_freebsd(struct ath_hal *ah, 22b7d5e03cSMatthew Dillon struct ieee80211_channel *chan, u_int rxchainmask, 23b7d5e03cSMatthew Dillon HAL_BOOL longCal, HAL_BOOL *isCalDone); 24b7d5e03cSMatthew Dillon extern HAL_BOOL ar9300_reset_cal_valid_freebsd(struct ath_hal *ah, 25b7d5e03cSMatthew Dillon const struct ieee80211_channel *chan); 26b7d5e03cSMatthew Dillon extern void ar9300_start_pcu_receive_freebsd(struct ath_hal *ah); 27b7d5e03cSMatthew Dillon extern HAL_STATUS ar9300_proc_rx_desc_freebsd(struct ath_hal *ah, 28b7d5e03cSMatthew Dillon struct ath_desc *ds, uint32_t pa, struct ath_desc *ds_next, 29b7d5e03cSMatthew Dillon uint64_t tsf, struct ath_rx_status *rxs); 30b7d5e03cSMatthew Dillon extern void ar9300_ani_rxmonitor_freebsd(struct ath_hal *ah, 31b7d5e03cSMatthew Dillon const HAL_NODE_STATS *stats, const struct ieee80211_channel *chan); 32b7d5e03cSMatthew Dillon extern void ar9300_freebsd_get_desc_link(struct ath_hal *, void *ds, 33b7d5e03cSMatthew Dillon uint32_t *); 34b7d5e03cSMatthew Dillon 35b7d5e03cSMatthew Dillon extern HAL_BOOL ar9300_freebsd_setup_tx_desc(struct ath_hal *ah, 36b7d5e03cSMatthew Dillon struct ath_desc *ds, u_int pktLen, u_int hdrLen, HAL_PKT_TYPE type, 37b7d5e03cSMatthew Dillon u_int txPower, u_int txRate0, u_int txTries0, u_int keyIx, 38b7d5e03cSMatthew Dillon u_int antMode, u_int flags, u_int rtsctsRate, u_int rtsCtsDuration, 39b7d5e03cSMatthew Dillon u_int compicvLen, u_int compivLen, u_int comp); 40b7d5e03cSMatthew Dillon extern HAL_BOOL ar9300_freebsd_setup_x_tx_desc(struct ath_hal *ah, 41b7d5e03cSMatthew Dillon struct ath_desc *ds, u_int txRate1, u_int txTries1, 42b7d5e03cSMatthew Dillon u_int txRate2, u_int txTries2, u_int txRate3, u_int txTries3); 43b7d5e03cSMatthew Dillon extern HAL_BOOL ar9300_freebsd_fill_tx_desc(struct ath_hal *ah, 44b7d5e03cSMatthew Dillon struct ath_desc *ds, HAL_DMA_ADDR *bufAddrList, 45b7d5e03cSMatthew Dillon uint32_t *segLenList, u_int descId, u_int qId, HAL_BOOL firstSeg, 46b7d5e03cSMatthew Dillon HAL_BOOL lastSeg, const struct ath_desc *ds0); 47b7d5e03cSMatthew Dillon extern HAL_BOOL ar9300_freebsd_get_tx_completion_rates(struct ath_hal *ah, 48b7d5e03cSMatthew Dillon const struct ath_desc *ds0, int *rates, int *tries); 49b7d5e03cSMatthew Dillon extern void ar9300_freebsd_set_11n_rate_scenario(struct ath_hal *, 50b7d5e03cSMatthew Dillon struct ath_desc *, u_int, u_int, HAL_11N_RATE_SERIES series[], 51b7d5e03cSMatthew Dillon u_int, u_int); 52b7d5e03cSMatthew Dillon 53b7d5e03cSMatthew Dillon extern HAL_BOOL ar9300_freebsd_chain_tx_desc(struct ath_hal *ah, 54b7d5e03cSMatthew Dillon struct ath_desc *ds, 55b7d5e03cSMatthew Dillon HAL_DMA_ADDR *bufAddrList, 56b7d5e03cSMatthew Dillon uint32_t *segLenList, 57b7d5e03cSMatthew Dillon u_int pktLen, u_int hdrLen, HAL_PKT_TYPE type, 58b7d5e03cSMatthew Dillon u_int keyIx, HAL_CIPHER cipher, uint8_t numDelims, 59b7d5e03cSMatthew Dillon HAL_BOOL firstSeg, HAL_BOOL lastSeg, HAL_BOOL lastAggr); 60b7d5e03cSMatthew Dillon extern HAL_BOOL ar9300_freebsd_setup_first_tx_desc(struct ath_hal *ah, 61b7d5e03cSMatthew Dillon struct ath_desc *ds, u_int aggrLen, u_int flags, u_int txPower, 62b7d5e03cSMatthew Dillon u_int txRate0, u_int txTries0, u_int antMode, u_int rtsctsRate, 63b7d5e03cSMatthew Dillon u_int rtsctsDuration); 64b7d5e03cSMatthew Dillon extern HAL_BOOL ar9300_freebsd_setup_last_tx_desc(struct ath_hal *ah, 65b7d5e03cSMatthew Dillon struct ath_desc *ds, const struct ath_desc *ds0); 66b7d5e03cSMatthew Dillon 67b7d5e03cSMatthew Dillon extern void ar9300_freebsd_setup_11n_desc(struct ath_hal *ah, 68b7d5e03cSMatthew Dillon void *ds, u_int pktLen, HAL_PKT_TYPE type, u_int txPower, 69b7d5e03cSMatthew Dillon u_int keyIx, u_int flags); 70b7d5e03cSMatthew Dillon 71b7d5e03cSMatthew Dillon extern HAL_STATUS ar9300_freebsd_proc_tx_desc(struct ath_hal *ah, 72b7d5e03cSMatthew Dillon struct ath_desc *ds, struct ath_tx_status *ts); 73b7d5e03cSMatthew Dillon 74b7d5e03cSMatthew Dillon extern void ar9300_freebsd_beacon_init(struct ath_hal *ah, 75b7d5e03cSMatthew Dillon uint32_t next_beacon, uint32_t beacon_period); 76b7d5e03cSMatthew Dillon 77b7d5e03cSMatthew Dillon extern HAL_BOOL ar9300_freebsd_get_mib_cycle_counts(struct ath_hal *ah, 78b7d5e03cSMatthew Dillon HAL_SURVEY_SAMPLE *); 79b7d5e03cSMatthew Dillon 80b7d5e03cSMatthew Dillon extern HAL_BOOL ar9300_freebsd_get_dfs_default_thresh(struct ath_hal *ah, 81b7d5e03cSMatthew Dillon HAL_PHYERR_PARAM *pe); 82b7d5e03cSMatthew Dillon 83b7d5e03cSMatthew Dillon #endif /* __AR9300_FREEBSD_H__ */ 84