1*326e57e8SMatthew Dillon /*- 2*326e57e8SMatthew Dillon * Copyright (c) 2010 Damien Bergamini <damien.bergamini@free.fr> 3*326e57e8SMatthew Dillon * 4*326e57e8SMatthew Dillon * Permission to use, copy, modify, and distribute this software for any 5*326e57e8SMatthew Dillon * purpose with or without fee is hereby granted, provided that the above 6*326e57e8SMatthew Dillon * copyright notice and this permission notice appear in all copies. 7*326e57e8SMatthew Dillon * 8*326e57e8SMatthew Dillon * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9*326e57e8SMatthew Dillon * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10*326e57e8SMatthew Dillon * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 11*326e57e8SMatthew Dillon * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12*326e57e8SMatthew Dillon * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 13*326e57e8SMatthew Dillon * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 14*326e57e8SMatthew Dillon * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15*326e57e8SMatthew Dillon * 16*326e57e8SMatthew Dillon * $OpenBSD: if_urtwnreg.h,v 1.3 2010/11/16 18:02:59 damien Exp $ 17*326e57e8SMatthew Dillon * $FreeBSD$ 18*326e57e8SMatthew Dillon */ 19*326e57e8SMatthew Dillon 20*326e57e8SMatthew Dillon #define URTWN_RX_LIST_COUNT 64 21*326e57e8SMatthew Dillon #define URTWN_TX_LIST_COUNT 8 22*326e57e8SMatthew Dillon #define URTWN_HOST_CMD_RING_COUNT 32 23*326e57e8SMatthew Dillon 24*326e57e8SMatthew Dillon #define URTWN_RXBUFSZ (8 * 1024) 25*326e57e8SMatthew Dillon //#define URTWN_TXBUFSZ (sizeof(struct r92c_tx_desc) + IEEE80211_MAX_LEN) 26*326e57e8SMatthew Dillon /* Leave enough space for an A-MSDU frame */ 27*326e57e8SMatthew Dillon #define URTWN_TXBUFSZ (16 * 1024) 28*326e57e8SMatthew Dillon #define URTWN_RX_DESC_SIZE (sizeof(struct r92c_rx_stat)) 29*326e57e8SMatthew Dillon #define URTWN_TX_DESC_SIZE (sizeof(struct r92c_tx_desc)) 30*326e57e8SMatthew Dillon 31*326e57e8SMatthew Dillon #define URTWN_TX_TIMEOUT 5000 /* ms */ 32*326e57e8SMatthew Dillon 33*326e57e8SMatthew Dillon #define URTWN_LED_LINK 0 34*326e57e8SMatthew Dillon #define URTWN_LED_DATA 1 35*326e57e8SMatthew Dillon 36*326e57e8SMatthew Dillon struct urtwn_rx_radiotap_header { 37*326e57e8SMatthew Dillon struct ieee80211_radiotap_header wr_ihdr; 38*326e57e8SMatthew Dillon uint64_t wr_tsft; 39*326e57e8SMatthew Dillon uint8_t wr_flags; 40*326e57e8SMatthew Dillon uint8_t wr_rate; 41*326e57e8SMatthew Dillon uint16_t wr_chan_freq; 42*326e57e8SMatthew Dillon uint16_t wr_chan_flags; 43*326e57e8SMatthew Dillon int8_t wr_dbm_antsignal; 44*326e57e8SMatthew Dillon int8_t wr_dbm_antnoise; 45*326e57e8SMatthew Dillon } __packed __aligned(8); 46*326e57e8SMatthew Dillon 47*326e57e8SMatthew Dillon #define URTWN_RX_RADIOTAP_PRESENT \ 48*326e57e8SMatthew Dillon (1 << IEEE80211_RADIOTAP_TSFT | \ 49*326e57e8SMatthew Dillon 1 << IEEE80211_RADIOTAP_FLAGS | \ 50*326e57e8SMatthew Dillon 1 << IEEE80211_RADIOTAP_RATE | \ 51*326e57e8SMatthew Dillon 1 << IEEE80211_RADIOTAP_CHANNEL | \ 52*326e57e8SMatthew Dillon 1 << IEEE80211_RADIOTAP_DBM_ANTSIGNAL | \ 53*326e57e8SMatthew Dillon 1 << IEEE80211_RADIOTAP_DBM_ANTNOISE) 54*326e57e8SMatthew Dillon 55*326e57e8SMatthew Dillon struct urtwn_tx_radiotap_header { 56*326e57e8SMatthew Dillon struct ieee80211_radiotap_header wt_ihdr; 57*326e57e8SMatthew Dillon uint8_t wt_flags; 58*326e57e8SMatthew Dillon uint16_t wt_chan_freq; 59*326e57e8SMatthew Dillon uint16_t wt_chan_flags; 60*326e57e8SMatthew Dillon } __packed __aligned(8); 61*326e57e8SMatthew Dillon 62*326e57e8SMatthew Dillon #define URTWN_TX_RADIOTAP_PRESENT \ 63*326e57e8SMatthew Dillon (1 << IEEE80211_RADIOTAP_FLAGS | \ 64*326e57e8SMatthew Dillon 1 << IEEE80211_RADIOTAP_CHANNEL) 65*326e57e8SMatthew Dillon 66*326e57e8SMatthew Dillon struct urtwn_softc; 67*326e57e8SMatthew Dillon 68*326e57e8SMatthew Dillon struct urtwn_data { 69*326e57e8SMatthew Dillon struct urtwn_softc *sc; 70*326e57e8SMatthew Dillon uint8_t *buf; 71*326e57e8SMatthew Dillon uint16_t buflen; 72*326e57e8SMatthew Dillon struct mbuf *m; 73*326e57e8SMatthew Dillon struct ieee80211_node *ni; 74*326e57e8SMatthew Dillon STAILQ_ENTRY(urtwn_data) next; 75*326e57e8SMatthew Dillon }; 76*326e57e8SMatthew Dillon typedef STAILQ_HEAD(, urtwn_data) urtwn_datahead; 77*326e57e8SMatthew Dillon 78*326e57e8SMatthew Dillon union sec_param { 79*326e57e8SMatthew Dillon struct ieee80211_key key; 80*326e57e8SMatthew Dillon }; 81*326e57e8SMatthew Dillon 82*326e57e8SMatthew Dillon #define CMD_FUNC_PROTO void (*func)(struct urtwn_softc *, \ 83*326e57e8SMatthew Dillon union sec_param *) 84*326e57e8SMatthew Dillon 85*326e57e8SMatthew Dillon struct urtwn_cmdq { 86*326e57e8SMatthew Dillon union sec_param data; 87*326e57e8SMatthew Dillon CMD_FUNC_PROTO; 88*326e57e8SMatthew Dillon }; 89*326e57e8SMatthew Dillon #define URTWN_CMDQ_SIZE 16 90*326e57e8SMatthew Dillon 91*326e57e8SMatthew Dillon struct urtwn_fw_info { 92*326e57e8SMatthew Dillon const uint8_t *data; 93*326e57e8SMatthew Dillon size_t size; 94*326e57e8SMatthew Dillon }; 95*326e57e8SMatthew Dillon 96*326e57e8SMatthew Dillon struct urtwn_node { 97*326e57e8SMatthew Dillon struct ieee80211_node ni; /* must be the first */ 98*326e57e8SMatthew Dillon uint8_t id; 99*326e57e8SMatthew Dillon int last_rssi; 100*326e57e8SMatthew Dillon }; 101*326e57e8SMatthew Dillon #define URTWN_NODE(ni) ((struct urtwn_node *)(ni)) 102*326e57e8SMatthew Dillon 103*326e57e8SMatthew Dillon struct urtwn_vap { 104*326e57e8SMatthew Dillon struct ieee80211vap vap; 105*326e57e8SMatthew Dillon 106*326e57e8SMatthew Dillon struct r92c_tx_desc bcn_desc; 107*326e57e8SMatthew Dillon struct mbuf *bcn_mbuf; 108*326e57e8SMatthew Dillon struct task tsf_task_adhoc; 109*326e57e8SMatthew Dillon 110*326e57e8SMatthew Dillon int (*newstate)(struct ieee80211vap *, 111*326e57e8SMatthew Dillon enum ieee80211_state, int); 112*326e57e8SMatthew Dillon void (*recv_mgmt)(struct ieee80211_node *, 113*326e57e8SMatthew Dillon struct mbuf *, int, 114*326e57e8SMatthew Dillon const struct ieee80211_rx_stats *, 115*326e57e8SMatthew Dillon int, int); 116*326e57e8SMatthew Dillon }; 117*326e57e8SMatthew Dillon #define URTWN_VAP(vap) ((struct urtwn_vap *)(vap)) 118*326e57e8SMatthew Dillon 119*326e57e8SMatthew Dillon struct urtwn_host_cmd { 120*326e57e8SMatthew Dillon void (*cb)(struct urtwn_softc *, void *); 121*326e57e8SMatthew Dillon uint8_t data[256]; 122*326e57e8SMatthew Dillon }; 123*326e57e8SMatthew Dillon 124*326e57e8SMatthew Dillon struct urtwn_cmd_newstate { 125*326e57e8SMatthew Dillon enum ieee80211_state state; 126*326e57e8SMatthew Dillon int arg; 127*326e57e8SMatthew Dillon }; 128*326e57e8SMatthew Dillon 129*326e57e8SMatthew Dillon struct urtwn_cmd_key { 130*326e57e8SMatthew Dillon struct ieee80211_key key; 131*326e57e8SMatthew Dillon uint16_t associd; 132*326e57e8SMatthew Dillon }; 133*326e57e8SMatthew Dillon 134*326e57e8SMatthew Dillon enum { 135*326e57e8SMatthew Dillon URTWN_BULK_RX, 136*326e57e8SMatthew Dillon URTWN_BULK_TX_BE, /* = WME_AC_BE */ 137*326e57e8SMatthew Dillon URTWN_BULK_TX_BK, /* = WME_AC_BK */ 138*326e57e8SMatthew Dillon URTWN_BULK_TX_VI, /* = WME_AC_VI */ 139*326e57e8SMatthew Dillon URTWN_BULK_TX_VO, /* = WME_AC_VI */ 140*326e57e8SMatthew Dillon URTWN_N_TRANSFER = 5, 141*326e57e8SMatthew Dillon }; 142*326e57e8SMatthew Dillon 143*326e57e8SMatthew Dillon #define URTWN_EP_QUEUES URTWN_BULK_RX 144*326e57e8SMatthew Dillon 145*326e57e8SMatthew Dillon union urtwn_rom { 146*326e57e8SMatthew Dillon struct r92c_rom r92c_rom; 147*326e57e8SMatthew Dillon struct r88e_rom r88e_rom; 148*326e57e8SMatthew Dillon }; 149*326e57e8SMatthew Dillon 150*326e57e8SMatthew Dillon struct urtwn_softc { 151*326e57e8SMatthew Dillon struct ieee80211com sc_ic; 152*326e57e8SMatthew Dillon struct mbufq sc_snd; 153*326e57e8SMatthew Dillon device_t sc_dev; 154*326e57e8SMatthew Dillon struct usb_device *sc_udev; 155*326e57e8SMatthew Dillon 156*326e57e8SMatthew Dillon uint32_t sc_debug; 157*326e57e8SMatthew Dillon uint8_t sc_iface_index; 158*326e57e8SMatthew Dillon uint8_t sc_flags; 159*326e57e8SMatthew Dillon #define URTWN_FLAG_CCK_HIPWR 0x01 160*326e57e8SMatthew Dillon #define URTWN_DETACHED 0x02 161*326e57e8SMatthew Dillon #define URTWN_RUNNING 0x04 162*326e57e8SMatthew Dillon #define URTWN_FW_LOADED 0x08 163*326e57e8SMatthew Dillon #define URTWN_TEMP_MEASURED 0x10 164*326e57e8SMatthew Dillon 165*326e57e8SMatthew Dillon u_int chip; 166*326e57e8SMatthew Dillon #define URTWN_CHIP_92C 0x01 167*326e57e8SMatthew Dillon #define URTWN_CHIP_92C_1T2R 0x02 168*326e57e8SMatthew Dillon #define URTWN_CHIP_UMC 0x04 169*326e57e8SMatthew Dillon #define URTWN_CHIP_UMC_A_CUT 0x08 170*326e57e8SMatthew Dillon #define URTWN_CHIP_88E 0x10 171*326e57e8SMatthew Dillon 172*326e57e8SMatthew Dillon #define URTWN_CHIP_HAS_RATECTL(_sc) (!!((_sc)->chip & URTWN_CHIP_88E)) 173*326e57e8SMatthew Dillon 174*326e57e8SMatthew Dillon void (*sc_node_free)(struct ieee80211_node *); 175*326e57e8SMatthew Dillon void (*sc_rf_write)(struct urtwn_softc *, 176*326e57e8SMatthew Dillon int, uint8_t, uint32_t); 177*326e57e8SMatthew Dillon int (*sc_power_on)(struct urtwn_softc *); 178*326e57e8SMatthew Dillon void (*sc_power_off)(struct urtwn_softc *); 179*326e57e8SMatthew Dillon 180*326e57e8SMatthew Dillon struct ieee80211_node *node_list[R88E_MACID_MAX + 1]; 181*326e57e8SMatthew Dillon #if defined(__DragonFly__) 182*326e57e8SMatthew Dillon struct lock nt_mtx; 183*326e57e8SMatthew Dillon #else 184*326e57e8SMatthew Dillon struct mtx nt_mtx; 185*326e57e8SMatthew Dillon #endif 186*326e57e8SMatthew Dillon 187*326e57e8SMatthew Dillon uint8_t board_type; 188*326e57e8SMatthew Dillon uint8_t regulatory; 189*326e57e8SMatthew Dillon uint8_t pa_setting; 190*326e57e8SMatthew Dillon int8_t ofdm_tx_pwr_diff; 191*326e57e8SMatthew Dillon int8_t bw20_tx_pwr_diff; 192*326e57e8SMatthew Dillon int avg_pwdb; 193*326e57e8SMatthew Dillon uint8_t thcal_lctemp; 194*326e57e8SMatthew Dillon int ntxchains; 195*326e57e8SMatthew Dillon int nrxchains; 196*326e57e8SMatthew Dillon int ledlink; 197*326e57e8SMatthew Dillon int sc_txtimer; 198*326e57e8SMatthew Dillon 199*326e57e8SMatthew Dillon int last_rssi; 200*326e57e8SMatthew Dillon 201*326e57e8SMatthew Dillon int fwcur; 202*326e57e8SMatthew Dillon struct urtwn_data sc_rx[URTWN_RX_LIST_COUNT]; 203*326e57e8SMatthew Dillon urtwn_datahead sc_rx_active; 204*326e57e8SMatthew Dillon urtwn_datahead sc_rx_inactive; 205*326e57e8SMatthew Dillon struct urtwn_data sc_tx[URTWN_TX_LIST_COUNT]; 206*326e57e8SMatthew Dillon urtwn_datahead sc_tx_active; 207*326e57e8SMatthew Dillon int sc_tx_n_active; 208*326e57e8SMatthew Dillon urtwn_datahead sc_tx_inactive; 209*326e57e8SMatthew Dillon urtwn_datahead sc_tx_pending; 210*326e57e8SMatthew Dillon 211*326e57e8SMatthew Dillon union urtwn_rom rom; 212*326e57e8SMatthew Dillon uint16_t last_rom_addr; 213*326e57e8SMatthew Dillon 214*326e57e8SMatthew Dillon struct callout sc_calib_to; 215*326e57e8SMatthew Dillon struct callout sc_watchdog_ch; 216*326e57e8SMatthew Dillon #if defined(__DragonFly__) 217*326e57e8SMatthew Dillon struct lock sc_mtx; 218*326e57e8SMatthew Dillon #else 219*326e57e8SMatthew Dillon struct mtx sc_mtx; 220*326e57e8SMatthew Dillon #endif 221*326e57e8SMatthew Dillon uint32_t keys_bmap; 222*326e57e8SMatthew Dillon 223*326e57e8SMatthew Dillon struct urtwn_cmdq cmdq[URTWN_CMDQ_SIZE]; 224*326e57e8SMatthew Dillon #if defined(__DragonFly__) 225*326e57e8SMatthew Dillon struct lock cmdq_mtx; 226*326e57e8SMatthew Dillon #else 227*326e57e8SMatthew Dillon struct mtx cmdq_mtx; 228*326e57e8SMatthew Dillon #endif 229*326e57e8SMatthew Dillon struct task cmdq_task; 230*326e57e8SMatthew Dillon uint8_t cmdq_first; 231*326e57e8SMatthew Dillon uint8_t cmdq_last; 232*326e57e8SMatthew Dillon 233*326e57e8SMatthew Dillon uint32_t rf_chnlbw[R92C_MAX_CHAINS]; 234*326e57e8SMatthew Dillon struct usb_xfer *sc_xfer[URTWN_N_TRANSFER]; 235*326e57e8SMatthew Dillon 236*326e57e8SMatthew Dillon struct urtwn_rx_radiotap_header sc_rxtap; 237*326e57e8SMatthew Dillon struct urtwn_tx_radiotap_header sc_txtap; 238*326e57e8SMatthew Dillon }; 239*326e57e8SMatthew Dillon 240*326e57e8SMatthew Dillon #if defined(__DragonFly__) 241*326e57e8SMatthew Dillon 242*326e57e8SMatthew Dillon #define URTWN_LOCK(sc) lockmgr(&(sc)->sc_mtx, LK_EXCLUSIVE) 243*326e57e8SMatthew Dillon #define URTWN_UNLOCK(sc) lockmgr(&(sc)->sc_mtx, LK_RELEASE) 244*326e57e8SMatthew Dillon #define URTWN_ASSERT_LOCKED(sc) KKASSERT(lockstatus(&(sc)->sc_mtx, curthread) == LK_EXCLUSIVE) 245*326e57e8SMatthew Dillon 246*326e57e8SMatthew Dillon #define URTWN_CMDQ_LOCK_INIT(sc) lockinit(&(sc)->cmdq_mtx, "cmdq lock", 0, 0); 247*326e57e8SMatthew Dillon #define URTWN_CMDQ_LOCK(sc) lockmgr(&(sc)->cmdq_mtx, LK_EXCLUSIVE) 248*326e57e8SMatthew Dillon #define URTWN_CMDQ_UNLOCK(sc) lockmgr(&(sc)->cmdq_mtx, LK_RELEASE) 249*326e57e8SMatthew Dillon #define URTWN_CMDQ_LOCK_DESTROY(sc) lockuninit(&(sc)->cmdq_mtx) 250*326e57e8SMatthew Dillon 251*326e57e8SMatthew Dillon #define URTWN_NT_LOCK_INIT(sc) lockinit(&(sc)->nt_mtx, "node table lock", 0, 0) 252*326e57e8SMatthew Dillon #define URTWN_NT_LOCK(sc) lockmgr(&(sc)->nt_mtx, LK_EXCLUSIVE) 253*326e57e8SMatthew Dillon #define URTWN_NT_UNLOCK(sc) lockmgr(&(sc)->nt_mtx, LK_RELEASE) 254*326e57e8SMatthew Dillon #define URTWN_NT_LOCK_DESTROY(sc) lockuninit(&(sc)->nt_mtx) 255*326e57e8SMatthew Dillon 256*326e57e8SMatthew Dillon #else 257*326e57e8SMatthew Dillon 258*326e57e8SMatthew Dillon #define URTWN_LOCK(sc) mtx_lock(&(sc)->sc_mtx) 259*326e57e8SMatthew Dillon #define URTWN_UNLOCK(sc) mtx_unlock(&(sc)->sc_mtx) 260*326e57e8SMatthew Dillon #define URTWN_ASSERT_LOCKED(sc) mtx_assert(&(sc)->sc_mtx, MA_OWNED) 261*326e57e8SMatthew Dillon 262*326e57e8SMatthew Dillon #define URTWN_CMDQ_LOCK_INIT(sc) \ 263*326e57e8SMatthew Dillon mtx_init(&(sc)->cmdq_mtx, "cmdq lock", NULL, MTX_DEF) 264*326e57e8SMatthew Dillon #define URTWN_CMDQ_LOCK(sc) mtx_lock(&(sc)->cmdq_mtx) 265*326e57e8SMatthew Dillon #define URTWN_CMDQ_UNLOCK(sc) mtx_unlock(&(sc)->cmdq_mtx) 266*326e57e8SMatthew Dillon #define URTWN_CMDQ_LOCK_DESTROY(sc) mtx_destroy(&(sc)->cmdq_mtx) 267*326e57e8SMatthew Dillon 268*326e57e8SMatthew Dillon #define URTWN_NT_LOCK_INIT(sc) \ 269*326e57e8SMatthew Dillon mtx_init(&(sc)->nt_mtx, "node table lock", NULL, MTX_DEF) 270*326e57e8SMatthew Dillon #define URTWN_NT_LOCK(sc) mtx_lock(&(sc)->nt_mtx) 271*326e57e8SMatthew Dillon #define URTWN_NT_UNLOCK(sc) mtx_unlock(&(sc)->nt_mtx) 272*326e57e8SMatthew Dillon #define URTWN_NT_LOCK_DESTROY(sc) mtx_destroy(&(sc)->nt_mtx) 273*326e57e8SMatthew Dillon 274*326e57e8SMatthew Dillon #endif 275