1*335b94f8SMatthew Dillon /*- 2*335b94f8SMatthew Dillon * ichsmb_reg.h 3*335b94f8SMatthew Dillon * 4*335b94f8SMatthew Dillon * Copyright (c) 2000 Whistle Communications, Inc. 5*335b94f8SMatthew Dillon * All rights reserved. 6*335b94f8SMatthew Dillon * 7*335b94f8SMatthew Dillon * Subject to the following obligations and disclaimer of warranty, use and 8*335b94f8SMatthew Dillon * redistribution of this software, in source or object code forms, with or 9*335b94f8SMatthew Dillon * without modifications are expressly permitted by Whistle Communications; 10*335b94f8SMatthew Dillon * provided, however, that: 11*335b94f8SMatthew Dillon * 1. Any and all reproductions of the source or object code must include the 12*335b94f8SMatthew Dillon * copyright notice above and the following disclaimer of warranties; and 13*335b94f8SMatthew Dillon * 2. No rights are granted, in any manner or form, to use Whistle 14*335b94f8SMatthew Dillon * Communications, Inc. trademarks, including the mark "WHISTLE 15*335b94f8SMatthew Dillon * COMMUNICATIONS" on advertising, endorsements, or otherwise except as 16*335b94f8SMatthew Dillon * such appears in the above copyright notice or in the software. 17*335b94f8SMatthew Dillon * 18*335b94f8SMatthew Dillon * THIS SOFTWARE IS BEING PROVIDED BY WHISTLE COMMUNICATIONS "AS IS", AND 19*335b94f8SMatthew Dillon * TO THE MAXIMUM EXTENT PERMITTED BY LAW, WHISTLE COMMUNICATIONS MAKES NO 20*335b94f8SMatthew Dillon * REPRESENTATIONS OR WARRANTIES, EXPRESS OR IMPLIED, REGARDING THIS SOFTWARE, 21*335b94f8SMatthew Dillon * INCLUDING WITHOUT LIMITATION, ANY AND ALL IMPLIED WARRANTIES OF 22*335b94f8SMatthew Dillon * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT. 23*335b94f8SMatthew Dillon * WHISTLE COMMUNICATIONS DOES NOT WARRANT, GUARANTEE, OR MAKE ANY 24*335b94f8SMatthew Dillon * REPRESENTATIONS REGARDING THE USE OF, OR THE RESULTS OF THE USE OF THIS 25*335b94f8SMatthew Dillon * SOFTWARE IN TERMS OF ITS CORRECTNESS, ACCURACY, RELIABILITY OR OTHERWISE. 26*335b94f8SMatthew Dillon * IN NO EVENT SHALL WHISTLE COMMUNICATIONS BE LIABLE FOR ANY DAMAGES 27*335b94f8SMatthew Dillon * RESULTING FROM OR ARISING OUT OF ANY USE OF THIS SOFTWARE, INCLUDING 28*335b94f8SMatthew Dillon * WITHOUT LIMITATION, ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, 29*335b94f8SMatthew Dillon * PUNITIVE, OR CONSEQUENTIAL DAMAGES, PROCUREMENT OF SUBSTITUTE GOODS OR 30*335b94f8SMatthew Dillon * SERVICES, LOSS OF USE, DATA OR PROFITS, HOWEVER CAUSED AND UNDER ANY 31*335b94f8SMatthew Dillon * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 32*335b94f8SMatthew Dillon * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 33*335b94f8SMatthew Dillon * THIS SOFTWARE, EVEN IF WHISTLE COMMUNICATIONS IS ADVISED OF THE POSSIBILITY 34*335b94f8SMatthew Dillon * OF SUCH DAMAGE. 35*335b94f8SMatthew Dillon * 36*335b94f8SMatthew Dillon * Author: Archie Cobbs <archie@freebsd.org> 37*335b94f8SMatthew Dillon * 38*335b94f8SMatthew Dillon * $FreeBSD: src/sys/dev/ichsmb/ichsmb_reg.h,v 1.2 2005/01/06 01:42:45 imp Exp $ 39*335b94f8SMatthew Dillon */ 40*335b94f8SMatthew Dillon 41*335b94f8SMatthew Dillon #ifndef _DEV_ICHSMB_ICHSMB_REG_H_ 42*335b94f8SMatthew Dillon #define _DEV_ICHSMB_ICHSMB_REG_H_ 43*335b94f8SMatthew Dillon 44*335b94f8SMatthew Dillon /* 45*335b94f8SMatthew Dillon * Definitions for the SMBus controller logical device which is part of the 46*335b94f8SMatthew Dillon * Intel 81801AA (ICH) and 81801AB (ICH0) I/O controller hub chips. 47*335b94f8SMatthew Dillon */ 48*335b94f8SMatthew Dillon 49*335b94f8SMatthew Dillon /* 50*335b94f8SMatthew Dillon * PCI configuration registers 51*335b94f8SMatthew Dillon */ 52*335b94f8SMatthew Dillon #define ICH_SMB_BASE 0x20 /* base address register */ 53*335b94f8SMatthew Dillon #define ICH_HOSTC 0x40 /* host config register */ 54*335b94f8SMatthew Dillon #define ICH_HOSTC_I2C_EN 0x04 /* enable i2c mode */ 55*335b94f8SMatthew Dillon #define ICH_HOSTC_SMB_SMI_EN 0x02 /* SMI# instead of irq */ 56*335b94f8SMatthew Dillon #define ICH_HOSTC_HST_EN 0x01 /* enable host cntrlr */ 57*335b94f8SMatthew Dillon 58*335b94f8SMatthew Dillon /* 59*335b94f8SMatthew Dillon * I/O registers 60*335b94f8SMatthew Dillon */ 61*335b94f8SMatthew Dillon #define ICH_HST_STA 0x00 /* host status */ 62*335b94f8SMatthew Dillon #define ICH_HST_STA_BYTE_DONE_STS 0x80 /* byte send/rec'd */ 63*335b94f8SMatthew Dillon #define ICH_HST_STA_INUSE_STS 0x40 /* device access mutex */ 64*335b94f8SMatthew Dillon #define ICH_HST_STA_SMBALERT_STS 0x20 /* SMBALERT# signal */ 65*335b94f8SMatthew Dillon #define ICH_HST_STA_FAILED 0x10 /* failed bus transaction */ 66*335b94f8SMatthew Dillon #define ICH_HST_STA_BUS_ERR 0x08 /* transaction collision */ 67*335b94f8SMatthew Dillon #define ICH_HST_STA_DEV_ERR 0x04 /* misc. smb device error */ 68*335b94f8SMatthew Dillon #define ICH_HST_STA_INTR 0x02 /* command completed ok */ 69*335b94f8SMatthew Dillon #define ICH_HST_STA_HOST_BUSY 0x01 /* command is running */ 70*335b94f8SMatthew Dillon #define ICH_HST_CNT 0x02 /* host control */ 71*335b94f8SMatthew Dillon #define ICH_HST_CNT_START 0x40 /* start command */ 72*335b94f8SMatthew Dillon #define ICH_HST_CNT_LAST_BYTE 0x20 /* indicate last byte */ 73*335b94f8SMatthew Dillon #define ICH_HST_CNT_SMB_CMD_QUICK 0x00 /* command: quick */ 74*335b94f8SMatthew Dillon #define ICH_HST_CNT_SMB_CMD_BYTE 0x04 /* command: byte */ 75*335b94f8SMatthew Dillon #define ICH_HST_CNT_SMB_CMD_BYTE_DATA 0x08 /* command: byte data */ 76*335b94f8SMatthew Dillon #define ICH_HST_CNT_SMB_CMD_WORD_DATA 0x0c /* command: word data */ 77*335b94f8SMatthew Dillon #define ICH_HST_CNT_SMB_CMD_PROC_CALL 0x10 /* command: process call */ 78*335b94f8SMatthew Dillon #define ICH_HST_CNT_SMB_CMD_BLOCK 0x14 /* command: block */ 79*335b94f8SMatthew Dillon #define ICH_HST_CNT_SMB_CMD_I2C_READ 0x18 /* command: i2c read */ 80*335b94f8SMatthew Dillon #define ICH_HST_CNT_KILL 0x02 /* kill current transaction */ 81*335b94f8SMatthew Dillon #define ICH_HST_CNT_INTREN 0x01 /* enable interrupt */ 82*335b94f8SMatthew Dillon #define ICH_HST_CMD 0x03 /* host command */ 83*335b94f8SMatthew Dillon #define ICH_XMIT_SLVA 0x04 /* transmit slave address */ 84*335b94f8SMatthew Dillon #define ICH_XMIT_SLVA_READ 0x01 /* direction: read */ 85*335b94f8SMatthew Dillon #define ICH_XMIT_SLVA_WRITE 0x00 /* direction: write */ 86*335b94f8SMatthew Dillon #define ICH_D0 0x05 /* host data 0 */ 87*335b94f8SMatthew Dillon #define ICH_D1 0x06 /* host data 1 */ 88*335b94f8SMatthew Dillon #define ICH_BLOCK_DB 0x07 /* block data byte */ 89*335b94f8SMatthew Dillon 90*335b94f8SMatthew Dillon #endif /* _DEV_ICHSMB_ICHSMB_REG_H_ */ 91