1335b94f8SMatthew Dillon /*-
2335b94f8SMatthew Dillon * Copyright (c) 2005 Ruslan Ermilov
3335b94f8SMatthew Dillon * All rights reserved.
4335b94f8SMatthew Dillon *
5335b94f8SMatthew Dillon * Redistribution and use in source and binary forms, with or without
6335b94f8SMatthew Dillon * modification, are permitted provided that the following conditions
7335b94f8SMatthew Dillon * are met:
8335b94f8SMatthew Dillon * 1. Redistributions of source code must retain the above copyright
9335b94f8SMatthew Dillon * notice, this list of conditions and the following disclaimer.
10335b94f8SMatthew Dillon * 2. Redistributions in binary form must reproduce the above copyright
11335b94f8SMatthew Dillon * notice, this list of conditions and the following disclaimer in the
12335b94f8SMatthew Dillon * documentation and/or other materials provided with the distribution.
13335b94f8SMatthew Dillon *
14335b94f8SMatthew Dillon * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15335b94f8SMatthew Dillon * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16335b94f8SMatthew Dillon * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17335b94f8SMatthew Dillon * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18335b94f8SMatthew Dillon * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19335b94f8SMatthew Dillon * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20335b94f8SMatthew Dillon * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21335b94f8SMatthew Dillon * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22335b94f8SMatthew Dillon * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23335b94f8SMatthew Dillon * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24335b94f8SMatthew Dillon * SUCH DAMAGE.
25335b94f8SMatthew Dillon *
26335b94f8SMatthew Dillon * $FreeBSD: src/sys/pci/amdsmb.c,v 1.6 2008/06/06 18:29:56 jhb Exp $
27335b94f8SMatthew Dillon */
28335b94f8SMatthew Dillon
29335b94f8SMatthew Dillon #include <sys/param.h>
30335b94f8SMatthew Dillon #include <sys/bus.h>
31335b94f8SMatthew Dillon #include <sys/globaldata.h>
32335b94f8SMatthew Dillon #include <sys/kernel.h>
33335b94f8SMatthew Dillon #include <sys/lock.h>
34335b94f8SMatthew Dillon #include <sys/module.h>
35335b94f8SMatthew Dillon #include <sys/systm.h>
36335b94f8SMatthew Dillon
37335b94f8SMatthew Dillon #include <sys/rman.h>
38335b94f8SMatthew Dillon
39335b94f8SMatthew Dillon #include <bus/pci/pcivar.h>
40335b94f8SMatthew Dillon #include <bus/pci/pcireg.h>
41335b94f8SMatthew Dillon
42335b94f8SMatthew Dillon #include <bus/smbus/smbconf.h>
43335b94f8SMatthew Dillon #include "smbus_if.h"
44335b94f8SMatthew Dillon
45335b94f8SMatthew Dillon #define AMDSMB_DEBUG(x) if (amdsmb_debug) (x)
46335b94f8SMatthew Dillon
47335b94f8SMatthew Dillon #ifdef DEBUG
48335b94f8SMatthew Dillon static int amdsmb_debug = 1;
49335b94f8SMatthew Dillon #else
50335b94f8SMatthew Dillon static int amdsmb_debug = 0;
51335b94f8SMatthew Dillon #endif
52335b94f8SMatthew Dillon
53335b94f8SMatthew Dillon #define AMDSMB_VENDORID_AMD 0x1022
54335b94f8SMatthew Dillon #define AMDSMB_DEVICEID_AMD8111_SMB2 0x746a
55335b94f8SMatthew Dillon
56335b94f8SMatthew Dillon /*
57335b94f8SMatthew Dillon * ACPI 3.0, Chapter 12, Embedded Controller Interface.
58335b94f8SMatthew Dillon */
59335b94f8SMatthew Dillon #define EC_DATA 0x00 /* data register */
60335b94f8SMatthew Dillon #define EC_SC 0x04 /* status of controller */
61335b94f8SMatthew Dillon #define EC_CMD 0x04 /* command register */
62335b94f8SMatthew Dillon
63335b94f8SMatthew Dillon #define EC_SC_IBF 0x02 /* data ready for embedded controller */
64335b94f8SMatthew Dillon #define EC_SC_OBF 0x01 /* data ready for host */
65335b94f8SMatthew Dillon #define EC_CMD_WR 0x81 /* write EC */
66335b94f8SMatthew Dillon #define EC_CMD_RD 0x80 /* read EC */
67335b94f8SMatthew Dillon
68335b94f8SMatthew Dillon /*
69335b94f8SMatthew Dillon * ACPI 3.0, Chapter 12, SMBus Host Controller Interface.
70335b94f8SMatthew Dillon */
71335b94f8SMatthew Dillon #define SMB_PRTCL 0x00 /* protocol */
72335b94f8SMatthew Dillon #define SMB_STS 0x01 /* status */
73335b94f8SMatthew Dillon #define SMB_ADDR 0x02 /* address */
74335b94f8SMatthew Dillon #define SMB_CMD 0x03 /* command */
75335b94f8SMatthew Dillon #define SMB_DATA 0x04 /* 32 data registers */
76335b94f8SMatthew Dillon #define SMB_BCNT 0x24 /* number of data bytes */
77335b94f8SMatthew Dillon #define SMB_ALRM_A 0x25 /* alarm address */
78335b94f8SMatthew Dillon #define SMB_ALRM_D 0x26 /* 2 bytes alarm data */
79335b94f8SMatthew Dillon
80335b94f8SMatthew Dillon #define SMB_STS_DONE 0x80
81335b94f8SMatthew Dillon #define SMB_STS_ALRM 0x40
82335b94f8SMatthew Dillon #define SMB_STS_RES 0x20
83335b94f8SMatthew Dillon #define SMB_STS_STATUS 0x1f
84335b94f8SMatthew Dillon #define SMB_STS_OK 0x00 /* OK */
85335b94f8SMatthew Dillon #define SMB_STS_UF 0x07 /* Unknown Failure */
86335b94f8SMatthew Dillon #define SMB_STS_DANA 0x10 /* Device Address Not Acknowledged */
87335b94f8SMatthew Dillon #define SMB_STS_DED 0x11 /* Device Error Detected */
88335b94f8SMatthew Dillon #define SMB_STS_DCAD 0x12 /* Device Command Access Denied */
89335b94f8SMatthew Dillon #define SMB_STS_UE 0x13 /* Unknown Error */
90335b94f8SMatthew Dillon #define SMB_STS_DAD 0x17 /* Device Access Denied */
91335b94f8SMatthew Dillon #define SMB_STS_T 0x18 /* Timeout */
92335b94f8SMatthew Dillon #define SMB_STS_HUP 0x19 /* Host Unsupported Protocol */
93335b94f8SMatthew Dillon #define SMB_STS_B 0x1a /* Busy */
94335b94f8SMatthew Dillon #define SMB_STS_PEC 0x1f /* PEC (CRC-8) Error */
95335b94f8SMatthew Dillon
96335b94f8SMatthew Dillon #define SMB_PRTCL_WRITE 0x00
97335b94f8SMatthew Dillon #define SMB_PRTCL_READ 0x01
98335b94f8SMatthew Dillon #define SMB_PRTCL_QUICK 0x02
99335b94f8SMatthew Dillon #define SMB_PRTCL_BYTE 0x04
100335b94f8SMatthew Dillon #define SMB_PRTCL_BYTE_DATA 0x06
101335b94f8SMatthew Dillon #define SMB_PRTCL_WORD_DATA 0x08
102335b94f8SMatthew Dillon #define SMB_PRTCL_BLOCK_DATA 0x0a
103335b94f8SMatthew Dillon #define SMB_PRTCL_PROC_CALL 0x0c
104335b94f8SMatthew Dillon #define SMB_PRTCL_BLOCK_PROC_CALL 0x0d
105335b94f8SMatthew Dillon #define SMB_PRTCL_PEC 0x80
106335b94f8SMatthew Dillon
107335b94f8SMatthew Dillon struct amdsmb_softc {
108335b94f8SMatthew Dillon int rid;
109335b94f8SMatthew Dillon struct resource *res;
110335b94f8SMatthew Dillon device_t smbus;
111335b94f8SMatthew Dillon struct lock lock;
112335b94f8SMatthew Dillon };
113335b94f8SMatthew Dillon
114335b94f8SMatthew Dillon #define AMDSMB_LOCK(amdsmb) lockmgr(&(amdsmb)->lock, LK_EXCLUSIVE)
115335b94f8SMatthew Dillon #define AMDSMB_UNLOCK(amdsmb) lockmgr(&(amdsmb)->lock, LK_RELEASE)
116335b94f8SMatthew Dillon #define AMDSMB_LOCK_ASSERT(amdsmb) KKASSERT(lockstatus(&(amdsmb)->lock, curthread) != 0)
117335b94f8SMatthew Dillon
118335b94f8SMatthew Dillon #define AMDSMB_ECINB(amdsmb, register) \
119335b94f8SMatthew Dillon (bus_read_1(amdsmb->res, register))
120335b94f8SMatthew Dillon #define AMDSMB_ECOUTB(amdsmb, register, value) \
121335b94f8SMatthew Dillon (bus_write_1(amdsmb->res, register, value))
122335b94f8SMatthew Dillon
123335b94f8SMatthew Dillon static int amdsmb_detach(device_t dev);
124335b94f8SMatthew Dillon
125335b94f8SMatthew Dillon static int
amdsmb_probe(device_t dev)126335b94f8SMatthew Dillon amdsmb_probe(device_t dev)
127335b94f8SMatthew Dillon {
128335b94f8SMatthew Dillon u_int16_t vid;
129335b94f8SMatthew Dillon u_int16_t did;
130335b94f8SMatthew Dillon
131335b94f8SMatthew Dillon vid = pci_get_vendor(dev);
132335b94f8SMatthew Dillon did = pci_get_device(dev);
133335b94f8SMatthew Dillon
134335b94f8SMatthew Dillon if (vid == AMDSMB_VENDORID_AMD) {
135335b94f8SMatthew Dillon switch(did) {
136335b94f8SMatthew Dillon case AMDSMB_DEVICEID_AMD8111_SMB2:
137335b94f8SMatthew Dillon device_set_desc(dev, "AMD-8111 SMBus 2.0 Controller");
138335b94f8SMatthew Dillon return (BUS_PROBE_DEFAULT);
139335b94f8SMatthew Dillon }
140335b94f8SMatthew Dillon }
141335b94f8SMatthew Dillon
142335b94f8SMatthew Dillon return (ENXIO);
143335b94f8SMatthew Dillon }
144335b94f8SMatthew Dillon
145335b94f8SMatthew Dillon static int
amdsmb_attach(device_t dev)146335b94f8SMatthew Dillon amdsmb_attach(device_t dev)
147335b94f8SMatthew Dillon {
148335b94f8SMatthew Dillon struct amdsmb_softc *amdsmb_sc = device_get_softc(dev);
149335b94f8SMatthew Dillon
150335b94f8SMatthew Dillon /* Allocate I/O space */
151335b94f8SMatthew Dillon amdsmb_sc->rid = PCIR_BAR(0);
152335b94f8SMatthew Dillon
153335b94f8SMatthew Dillon amdsmb_sc->res = bus_alloc_resource_any(dev, SYS_RES_IOPORT,
154335b94f8SMatthew Dillon &amdsmb_sc->rid, RF_ACTIVE);
155335b94f8SMatthew Dillon
156335b94f8SMatthew Dillon if (amdsmb_sc->res == NULL) {
157335b94f8SMatthew Dillon device_printf(dev, "could not map i/o space\n");
158335b94f8SMatthew Dillon return (ENXIO);
159335b94f8SMatthew Dillon }
160335b94f8SMatthew Dillon
161335b94f8SMatthew Dillon lockinit(&amdsmb_sc->lock, "amdsmb", 0, LK_CANRECURSE);
162335b94f8SMatthew Dillon
163335b94f8SMatthew Dillon /* Allocate a new smbus device */
164335b94f8SMatthew Dillon amdsmb_sc->smbus = device_add_child(dev, "smbus", -1);
165335b94f8SMatthew Dillon if (!amdsmb_sc->smbus) {
166335b94f8SMatthew Dillon amdsmb_detach(dev);
167335b94f8SMatthew Dillon return (EINVAL);
168335b94f8SMatthew Dillon }
169335b94f8SMatthew Dillon
170335b94f8SMatthew Dillon bus_generic_attach(dev);
171335b94f8SMatthew Dillon
172335b94f8SMatthew Dillon return (0);
173335b94f8SMatthew Dillon }
174335b94f8SMatthew Dillon
175335b94f8SMatthew Dillon static int
amdsmb_detach(device_t dev)176335b94f8SMatthew Dillon amdsmb_detach(device_t dev)
177335b94f8SMatthew Dillon {
178335b94f8SMatthew Dillon struct amdsmb_softc *amdsmb_sc = device_get_softc(dev);
179335b94f8SMatthew Dillon
180335b94f8SMatthew Dillon if (amdsmb_sc->smbus) {
181335b94f8SMatthew Dillon device_delete_child(dev, amdsmb_sc->smbus);
182335b94f8SMatthew Dillon amdsmb_sc->smbus = NULL;
183335b94f8SMatthew Dillon }
184335b94f8SMatthew Dillon
185335b94f8SMatthew Dillon lockuninit(&amdsmb_sc->lock);
186335b94f8SMatthew Dillon if (amdsmb_sc->res)
187335b94f8SMatthew Dillon bus_release_resource(dev, SYS_RES_IOPORT, amdsmb_sc->rid,
188335b94f8SMatthew Dillon amdsmb_sc->res);
189335b94f8SMatthew Dillon
190335b94f8SMatthew Dillon return (0);
191335b94f8SMatthew Dillon }
192335b94f8SMatthew Dillon
193335b94f8SMatthew Dillon static int
amdsmb_callback(device_t dev,int index,void * data)194335b94f8SMatthew Dillon amdsmb_callback(device_t dev, int index, void *data)
195335b94f8SMatthew Dillon {
196335b94f8SMatthew Dillon int error = 0;
197335b94f8SMatthew Dillon
198335b94f8SMatthew Dillon switch (index) {
199335b94f8SMatthew Dillon case SMB_REQUEST_BUS:
200335b94f8SMatthew Dillon case SMB_RELEASE_BUS:
201335b94f8SMatthew Dillon break;
202335b94f8SMatthew Dillon default:
203335b94f8SMatthew Dillon error = EINVAL;
204335b94f8SMatthew Dillon }
205335b94f8SMatthew Dillon
206335b94f8SMatthew Dillon return (error);
207335b94f8SMatthew Dillon }
208335b94f8SMatthew Dillon
209335b94f8SMatthew Dillon static int
amdsmb_ec_wait_write(struct amdsmb_softc * sc)210335b94f8SMatthew Dillon amdsmb_ec_wait_write(struct amdsmb_softc *sc)
211335b94f8SMatthew Dillon {
212335b94f8SMatthew Dillon int timeout = 500;
213335b94f8SMatthew Dillon
214335b94f8SMatthew Dillon while (timeout-- && AMDSMB_ECINB(sc, EC_SC) & EC_SC_IBF)
215335b94f8SMatthew Dillon DELAY(1);
216335b94f8SMatthew Dillon if (timeout == 0) {
217335b94f8SMatthew Dillon device_printf(sc->smbus, "timeout waiting for IBF to clear\n");
218335b94f8SMatthew Dillon return (1);
219335b94f8SMatthew Dillon }
220335b94f8SMatthew Dillon return (0);
221335b94f8SMatthew Dillon }
222335b94f8SMatthew Dillon
223335b94f8SMatthew Dillon static int
amdsmb_ec_wait_read(struct amdsmb_softc * sc)224335b94f8SMatthew Dillon amdsmb_ec_wait_read(struct amdsmb_softc *sc)
225335b94f8SMatthew Dillon {
226335b94f8SMatthew Dillon int timeout = 500;
227335b94f8SMatthew Dillon
228335b94f8SMatthew Dillon while (timeout-- && ~AMDSMB_ECINB(sc, EC_SC) & EC_SC_OBF)
229335b94f8SMatthew Dillon DELAY(1);
230335b94f8SMatthew Dillon if (timeout == 0) {
231335b94f8SMatthew Dillon device_printf(sc->smbus, "timeout waiting for OBF to set\n");
232335b94f8SMatthew Dillon return (1);
233335b94f8SMatthew Dillon }
234335b94f8SMatthew Dillon return (0);
235335b94f8SMatthew Dillon }
236335b94f8SMatthew Dillon
237335b94f8SMatthew Dillon static int
amdsmb_ec_read(struct amdsmb_softc * sc,u_char addr,u_char * data)238335b94f8SMatthew Dillon amdsmb_ec_read(struct amdsmb_softc *sc, u_char addr, u_char *data)
239335b94f8SMatthew Dillon {
240*57e09377SMatthew Dillon *data = 0;
241335b94f8SMatthew Dillon AMDSMB_LOCK_ASSERT(sc);
242335b94f8SMatthew Dillon if (amdsmb_ec_wait_write(sc))
243335b94f8SMatthew Dillon return (1);
244335b94f8SMatthew Dillon AMDSMB_ECOUTB(sc, EC_CMD, EC_CMD_RD);
245335b94f8SMatthew Dillon
246335b94f8SMatthew Dillon if (amdsmb_ec_wait_write(sc))
247335b94f8SMatthew Dillon return (1);
248335b94f8SMatthew Dillon AMDSMB_ECOUTB(sc, EC_DATA, addr);
249335b94f8SMatthew Dillon
250335b94f8SMatthew Dillon if (amdsmb_ec_wait_read(sc))
251335b94f8SMatthew Dillon return (1);
252335b94f8SMatthew Dillon *data = AMDSMB_ECINB(sc, EC_DATA);
253335b94f8SMatthew Dillon
254335b94f8SMatthew Dillon return (0);
255335b94f8SMatthew Dillon }
256335b94f8SMatthew Dillon
257335b94f8SMatthew Dillon static int
amdsmb_ec_write(struct amdsmb_softc * sc,u_char addr,u_char data)258335b94f8SMatthew Dillon amdsmb_ec_write(struct amdsmb_softc *sc, u_char addr, u_char data)
259335b94f8SMatthew Dillon {
260335b94f8SMatthew Dillon
261335b94f8SMatthew Dillon AMDSMB_LOCK_ASSERT(sc);
262335b94f8SMatthew Dillon if (amdsmb_ec_wait_write(sc))
263335b94f8SMatthew Dillon return (1);
264335b94f8SMatthew Dillon AMDSMB_ECOUTB(sc, EC_CMD, EC_CMD_WR);
265335b94f8SMatthew Dillon
266335b94f8SMatthew Dillon if (amdsmb_ec_wait_write(sc))
267335b94f8SMatthew Dillon return (1);
268335b94f8SMatthew Dillon AMDSMB_ECOUTB(sc, EC_DATA, addr);
269335b94f8SMatthew Dillon
270335b94f8SMatthew Dillon if (amdsmb_ec_wait_write(sc))
271335b94f8SMatthew Dillon return (1);
272335b94f8SMatthew Dillon AMDSMB_ECOUTB(sc, EC_DATA, data);
273335b94f8SMatthew Dillon
274335b94f8SMatthew Dillon return (0);
275335b94f8SMatthew Dillon }
276335b94f8SMatthew Dillon
277335b94f8SMatthew Dillon static int
amdsmb_wait(struct amdsmb_softc * sc)278335b94f8SMatthew Dillon amdsmb_wait(struct amdsmb_softc *sc)
279335b94f8SMatthew Dillon {
280335b94f8SMatthew Dillon u_char sts, temp;
281335b94f8SMatthew Dillon int error, count;
282335b94f8SMatthew Dillon
283335b94f8SMatthew Dillon AMDSMB_LOCK_ASSERT(sc);
284335b94f8SMatthew Dillon amdsmb_ec_read(sc, SMB_PRTCL, &temp);
285335b94f8SMatthew Dillon if (temp != 0)
286335b94f8SMatthew Dillon {
287335b94f8SMatthew Dillon count = 10000;
288335b94f8SMatthew Dillon do {
289335b94f8SMatthew Dillon DELAY(500);
290335b94f8SMatthew Dillon amdsmb_ec_read(sc, SMB_PRTCL, &temp);
291335b94f8SMatthew Dillon } while (temp != 0 && count--);
292335b94f8SMatthew Dillon if (count == 0)
293335b94f8SMatthew Dillon return (SMB_ETIMEOUT);
294335b94f8SMatthew Dillon }
295335b94f8SMatthew Dillon
296*57e09377SMatthew Dillon sts = 0;
297335b94f8SMatthew Dillon amdsmb_ec_read(sc, SMB_STS, &sts);
298335b94f8SMatthew Dillon sts &= SMB_STS_STATUS;
299335b94f8SMatthew Dillon AMDSMB_DEBUG(kprintf("amdsmb: STS=0x%x\n", sts));
300335b94f8SMatthew Dillon
301335b94f8SMatthew Dillon switch (sts) {
302335b94f8SMatthew Dillon case SMB_STS_OK:
303335b94f8SMatthew Dillon error = SMB_ENOERR;
304335b94f8SMatthew Dillon break;
305335b94f8SMatthew Dillon case SMB_STS_DANA:
306335b94f8SMatthew Dillon error = SMB_ENOACK;
307335b94f8SMatthew Dillon break;
308335b94f8SMatthew Dillon case SMB_STS_B:
309335b94f8SMatthew Dillon error = SMB_EBUSY;
310335b94f8SMatthew Dillon break;
311335b94f8SMatthew Dillon case SMB_STS_T:
312335b94f8SMatthew Dillon error = SMB_ETIMEOUT;
313335b94f8SMatthew Dillon break;
314335b94f8SMatthew Dillon case SMB_STS_DCAD:
315335b94f8SMatthew Dillon case SMB_STS_DAD:
316335b94f8SMatthew Dillon case SMB_STS_HUP:
317335b94f8SMatthew Dillon error = SMB_ENOTSUPP;
318335b94f8SMatthew Dillon break;
319335b94f8SMatthew Dillon default:
320335b94f8SMatthew Dillon error = SMB_EBUSERR;
321335b94f8SMatthew Dillon break;
322335b94f8SMatthew Dillon }
323335b94f8SMatthew Dillon
324335b94f8SMatthew Dillon return (error);
325335b94f8SMatthew Dillon }
326335b94f8SMatthew Dillon
327335b94f8SMatthew Dillon static int
amdsmb_quick(device_t dev,u_char slave,int how)328335b94f8SMatthew Dillon amdsmb_quick(device_t dev, u_char slave, int how)
329335b94f8SMatthew Dillon {
330335b94f8SMatthew Dillon struct amdsmb_softc *sc = (struct amdsmb_softc *)device_get_softc(dev);
331335b94f8SMatthew Dillon u_char protocol;
332335b94f8SMatthew Dillon int error;
333335b94f8SMatthew Dillon
334335b94f8SMatthew Dillon protocol = SMB_PRTCL_QUICK;
335335b94f8SMatthew Dillon
336335b94f8SMatthew Dillon switch (how) {
337335b94f8SMatthew Dillon case SMB_QWRITE:
338335b94f8SMatthew Dillon protocol |= SMB_PRTCL_WRITE;
339335b94f8SMatthew Dillon AMDSMB_DEBUG(kprintf("amdsmb: QWRITE to 0x%x", slave));
340335b94f8SMatthew Dillon break;
341335b94f8SMatthew Dillon case SMB_QREAD:
342335b94f8SMatthew Dillon protocol |= SMB_PRTCL_READ;
343335b94f8SMatthew Dillon AMDSMB_DEBUG(kprintf("amdsmb: QREAD to 0x%x", slave));
344335b94f8SMatthew Dillon break;
345335b94f8SMatthew Dillon default:
346335b94f8SMatthew Dillon panic("%s: unknown QUICK command (%x)!", __func__, how);
347335b94f8SMatthew Dillon }
348335b94f8SMatthew Dillon
349335b94f8SMatthew Dillon AMDSMB_LOCK(sc);
350335b94f8SMatthew Dillon amdsmb_ec_write(sc, SMB_ADDR, slave);
351335b94f8SMatthew Dillon amdsmb_ec_write(sc, SMB_PRTCL, protocol);
352335b94f8SMatthew Dillon
353335b94f8SMatthew Dillon error = amdsmb_wait(sc);
354335b94f8SMatthew Dillon
355335b94f8SMatthew Dillon AMDSMB_DEBUG(kprintf(", error=0x%x\n", error));
356335b94f8SMatthew Dillon AMDSMB_UNLOCK(sc);
357335b94f8SMatthew Dillon
358335b94f8SMatthew Dillon return (error);
359335b94f8SMatthew Dillon }
360335b94f8SMatthew Dillon
361335b94f8SMatthew Dillon static int
amdsmb_sendb(device_t dev,u_char slave,char byte)362335b94f8SMatthew Dillon amdsmb_sendb(device_t dev, u_char slave, char byte)
363335b94f8SMatthew Dillon {
364335b94f8SMatthew Dillon struct amdsmb_softc *sc = (struct amdsmb_softc *)device_get_softc(dev);
365335b94f8SMatthew Dillon int error;
366335b94f8SMatthew Dillon
367335b94f8SMatthew Dillon AMDSMB_LOCK(sc);
368335b94f8SMatthew Dillon amdsmb_ec_write(sc, SMB_CMD, byte);
369335b94f8SMatthew Dillon amdsmb_ec_write(sc, SMB_ADDR, slave);
370335b94f8SMatthew Dillon amdsmb_ec_write(sc, SMB_PRTCL, SMB_PRTCL_WRITE | SMB_PRTCL_BYTE);
371335b94f8SMatthew Dillon
372335b94f8SMatthew Dillon error = amdsmb_wait(sc);
373335b94f8SMatthew Dillon
374335b94f8SMatthew Dillon AMDSMB_DEBUG(kprintf("amdsmb: SENDB to 0x%x, byte=0x%x, error=0x%x\n",
375335b94f8SMatthew Dillon slave, byte, error));
376335b94f8SMatthew Dillon AMDSMB_UNLOCK(sc);
377335b94f8SMatthew Dillon
378335b94f8SMatthew Dillon return (error);
379335b94f8SMatthew Dillon }
380335b94f8SMatthew Dillon
381335b94f8SMatthew Dillon static int
amdsmb_recvb(device_t dev,u_char slave,char * byte)382335b94f8SMatthew Dillon amdsmb_recvb(device_t dev, u_char slave, char *byte)
383335b94f8SMatthew Dillon {
384335b94f8SMatthew Dillon struct amdsmb_softc *sc = (struct amdsmb_softc *)device_get_softc(dev);
385335b94f8SMatthew Dillon int error;
386335b94f8SMatthew Dillon
387335b94f8SMatthew Dillon AMDSMB_LOCK(sc);
388335b94f8SMatthew Dillon amdsmb_ec_write(sc, SMB_ADDR, slave);
389335b94f8SMatthew Dillon amdsmb_ec_write(sc, SMB_PRTCL, SMB_PRTCL_READ | SMB_PRTCL_BYTE);
390335b94f8SMatthew Dillon
391335b94f8SMatthew Dillon if ((error = amdsmb_wait(sc)) == SMB_ENOERR)
392335b94f8SMatthew Dillon amdsmb_ec_read(sc, SMB_DATA, byte);
393335b94f8SMatthew Dillon
394335b94f8SMatthew Dillon AMDSMB_DEBUG(kprintf("amdsmb: RECVB from 0x%x, byte=0x%x, error=0x%x\n",
395335b94f8SMatthew Dillon slave, *byte, error));
396335b94f8SMatthew Dillon AMDSMB_UNLOCK(sc);
397335b94f8SMatthew Dillon
398335b94f8SMatthew Dillon return (error);
399335b94f8SMatthew Dillon }
400335b94f8SMatthew Dillon
401335b94f8SMatthew Dillon static int
amdsmb_writeb(device_t dev,u_char slave,char cmd,char byte)402335b94f8SMatthew Dillon amdsmb_writeb(device_t dev, u_char slave, char cmd, char byte)
403335b94f8SMatthew Dillon {
404335b94f8SMatthew Dillon struct amdsmb_softc *sc = (struct amdsmb_softc *)device_get_softc(dev);
405335b94f8SMatthew Dillon int error;
406335b94f8SMatthew Dillon
407335b94f8SMatthew Dillon AMDSMB_LOCK(sc);
408335b94f8SMatthew Dillon amdsmb_ec_write(sc, SMB_CMD, cmd);
409335b94f8SMatthew Dillon amdsmb_ec_write(sc, SMB_DATA, byte);
410335b94f8SMatthew Dillon amdsmb_ec_write(sc, SMB_ADDR, slave);
411335b94f8SMatthew Dillon amdsmb_ec_write(sc, SMB_PRTCL, SMB_PRTCL_WRITE | SMB_PRTCL_BYTE_DATA);
412335b94f8SMatthew Dillon
413335b94f8SMatthew Dillon error = amdsmb_wait(sc);
414335b94f8SMatthew Dillon
415335b94f8SMatthew Dillon AMDSMB_DEBUG(kprintf("amdsmb: WRITEB to 0x%x, cmd=0x%x, byte=0x%x, "
416335b94f8SMatthew Dillon "error=0x%x\n", slave, cmd, byte, error));
417335b94f8SMatthew Dillon AMDSMB_UNLOCK(sc);
418335b94f8SMatthew Dillon
419335b94f8SMatthew Dillon return (error);
420335b94f8SMatthew Dillon }
421335b94f8SMatthew Dillon
422335b94f8SMatthew Dillon static int
amdsmb_readb(device_t dev,u_char slave,char cmd,char * byte)423335b94f8SMatthew Dillon amdsmb_readb(device_t dev, u_char slave, char cmd, char *byte)
424335b94f8SMatthew Dillon {
425335b94f8SMatthew Dillon struct amdsmb_softc *sc = (struct amdsmb_softc *)device_get_softc(dev);
426335b94f8SMatthew Dillon int error;
427335b94f8SMatthew Dillon
428335b94f8SMatthew Dillon AMDSMB_LOCK(sc);
429335b94f8SMatthew Dillon amdsmb_ec_write(sc, SMB_CMD, cmd);
430335b94f8SMatthew Dillon amdsmb_ec_write(sc, SMB_ADDR, slave);
431335b94f8SMatthew Dillon amdsmb_ec_write(sc, SMB_PRTCL, SMB_PRTCL_READ | SMB_PRTCL_BYTE_DATA);
432335b94f8SMatthew Dillon
433335b94f8SMatthew Dillon if ((error = amdsmb_wait(sc)) == SMB_ENOERR)
434335b94f8SMatthew Dillon amdsmb_ec_read(sc, SMB_DATA, byte);
435335b94f8SMatthew Dillon
436335b94f8SMatthew Dillon AMDSMB_DEBUG(kprintf("amdsmb: READB from 0x%x, cmd=0x%x, byte=0x%x, "
437335b94f8SMatthew Dillon "error=0x%x\n", slave, cmd, (unsigned char)*byte, error));
438335b94f8SMatthew Dillon AMDSMB_UNLOCK(sc);
439335b94f8SMatthew Dillon
440335b94f8SMatthew Dillon return (error);
441335b94f8SMatthew Dillon }
442335b94f8SMatthew Dillon
443335b94f8SMatthew Dillon static int
amdsmb_writew(device_t dev,u_char slave,char cmd,short word)444335b94f8SMatthew Dillon amdsmb_writew(device_t dev, u_char slave, char cmd, short word)
445335b94f8SMatthew Dillon {
446335b94f8SMatthew Dillon struct amdsmb_softc *sc = (struct amdsmb_softc *)device_get_softc(dev);
447335b94f8SMatthew Dillon int error;
448335b94f8SMatthew Dillon
449335b94f8SMatthew Dillon AMDSMB_LOCK(sc);
450335b94f8SMatthew Dillon amdsmb_ec_write(sc, SMB_CMD, cmd);
451335b94f8SMatthew Dillon amdsmb_ec_write(sc, SMB_DATA, word);
452335b94f8SMatthew Dillon amdsmb_ec_write(sc, SMB_DATA + 1, word >> 8);
453335b94f8SMatthew Dillon amdsmb_ec_write(sc, SMB_ADDR, slave);
454335b94f8SMatthew Dillon amdsmb_ec_write(sc, SMB_PRTCL, SMB_PRTCL_WRITE | SMB_PRTCL_WORD_DATA);
455335b94f8SMatthew Dillon
456335b94f8SMatthew Dillon error = amdsmb_wait(sc);
457335b94f8SMatthew Dillon
458335b94f8SMatthew Dillon AMDSMB_DEBUG(kprintf("amdsmb: WRITEW to 0x%x, cmd=0x%x, word=0x%x, "
459335b94f8SMatthew Dillon "error=0x%x\n", slave, cmd, word, error));
460335b94f8SMatthew Dillon AMDSMB_UNLOCK(sc);
461335b94f8SMatthew Dillon
462335b94f8SMatthew Dillon return (error);
463335b94f8SMatthew Dillon }
464335b94f8SMatthew Dillon
465335b94f8SMatthew Dillon static int
amdsmb_readw(device_t dev,u_char slave,char cmd,short * word)466335b94f8SMatthew Dillon amdsmb_readw(device_t dev, u_char slave, char cmd, short *word)
467335b94f8SMatthew Dillon {
468335b94f8SMatthew Dillon struct amdsmb_softc *sc = (struct amdsmb_softc *)device_get_softc(dev);
469335b94f8SMatthew Dillon u_char temp[2];
470335b94f8SMatthew Dillon int error;
471335b94f8SMatthew Dillon
472335b94f8SMatthew Dillon AMDSMB_LOCK(sc);
473335b94f8SMatthew Dillon amdsmb_ec_write(sc, SMB_CMD, cmd);
474335b94f8SMatthew Dillon amdsmb_ec_write(sc, SMB_ADDR, slave);
475335b94f8SMatthew Dillon amdsmb_ec_write(sc, SMB_PRTCL, SMB_PRTCL_READ | SMB_PRTCL_WORD_DATA);
476335b94f8SMatthew Dillon
477335b94f8SMatthew Dillon if ((error = amdsmb_wait(sc)) == SMB_ENOERR) {
478335b94f8SMatthew Dillon amdsmb_ec_read(sc, SMB_DATA + 0, &temp[0]);
479335b94f8SMatthew Dillon amdsmb_ec_read(sc, SMB_DATA + 1, &temp[1]);
480335b94f8SMatthew Dillon *word = temp[0] | (temp[1] << 8);
481335b94f8SMatthew Dillon }
482335b94f8SMatthew Dillon
483335b94f8SMatthew Dillon AMDSMB_DEBUG(kprintf("amdsmb: READW from 0x%x, cmd=0x%x, word=0x%x, "
484335b94f8SMatthew Dillon "error=0x%x\n", slave, cmd, (unsigned short)*word, error));
485335b94f8SMatthew Dillon AMDSMB_UNLOCK(sc);
486335b94f8SMatthew Dillon
487335b94f8SMatthew Dillon return (error);
488335b94f8SMatthew Dillon }
489335b94f8SMatthew Dillon
490335b94f8SMatthew Dillon static int
amdsmb_bwrite(device_t dev,u_char slave,char cmd,u_char count,char * buf)491335b94f8SMatthew Dillon amdsmb_bwrite(device_t dev, u_char slave, char cmd, u_char count, char *buf)
492335b94f8SMatthew Dillon {
493335b94f8SMatthew Dillon struct amdsmb_softc *sc = (struct amdsmb_softc *)device_get_softc(dev);
494335b94f8SMatthew Dillon u_char i;
495335b94f8SMatthew Dillon int error;
496335b94f8SMatthew Dillon
497335b94f8SMatthew Dillon if (count < 1 || count > 32)
498335b94f8SMatthew Dillon return (SMB_EINVAL);
499335b94f8SMatthew Dillon
500335b94f8SMatthew Dillon AMDSMB_LOCK(sc);
501335b94f8SMatthew Dillon amdsmb_ec_write(sc, SMB_CMD, cmd);
502335b94f8SMatthew Dillon amdsmb_ec_write(sc, SMB_BCNT, count);
503335b94f8SMatthew Dillon for (i = 0; i < count; i++)
504335b94f8SMatthew Dillon amdsmb_ec_write(sc, SMB_DATA + i, buf[i]);
505335b94f8SMatthew Dillon amdsmb_ec_write(sc, SMB_ADDR, slave);
506335b94f8SMatthew Dillon amdsmb_ec_write(sc, SMB_PRTCL, SMB_PRTCL_WRITE | SMB_PRTCL_BLOCK_DATA);
507335b94f8SMatthew Dillon
508335b94f8SMatthew Dillon error = amdsmb_wait(sc);
509335b94f8SMatthew Dillon
510335b94f8SMatthew Dillon AMDSMB_DEBUG(kprintf("amdsmb: WRITEBLK to 0x%x, count=0x%x, cmd=0x%x, "
511335b94f8SMatthew Dillon "error=0x%x", slave, count, cmd, error));
512335b94f8SMatthew Dillon AMDSMB_UNLOCK(sc);
513335b94f8SMatthew Dillon
514335b94f8SMatthew Dillon return (error);
515335b94f8SMatthew Dillon }
516335b94f8SMatthew Dillon
517335b94f8SMatthew Dillon static int
amdsmb_bread(device_t dev,u_char slave,char cmd,u_char * count,char * buf)518335b94f8SMatthew Dillon amdsmb_bread(device_t dev, u_char slave, char cmd, u_char *count, char *buf)
519335b94f8SMatthew Dillon {
520335b94f8SMatthew Dillon struct amdsmb_softc *sc = (struct amdsmb_softc *)device_get_softc(dev);
521335b94f8SMatthew Dillon u_char data, len, i;
522335b94f8SMatthew Dillon int error;
523335b94f8SMatthew Dillon
524335b94f8SMatthew Dillon if (*count < 1 || *count > 32)
525335b94f8SMatthew Dillon return (SMB_EINVAL);
526335b94f8SMatthew Dillon
527335b94f8SMatthew Dillon AMDSMB_LOCK(sc);
528335b94f8SMatthew Dillon amdsmb_ec_write(sc, SMB_CMD, cmd);
529335b94f8SMatthew Dillon amdsmb_ec_write(sc, SMB_ADDR, slave);
530335b94f8SMatthew Dillon amdsmb_ec_write(sc, SMB_PRTCL, SMB_PRTCL_READ | SMB_PRTCL_BLOCK_DATA);
531335b94f8SMatthew Dillon
532335b94f8SMatthew Dillon if ((error = amdsmb_wait(sc)) == SMB_ENOERR) {
533335b94f8SMatthew Dillon amdsmb_ec_read(sc, SMB_BCNT, &len);
534335b94f8SMatthew Dillon for (i = 0; i < len; i++) {
535335b94f8SMatthew Dillon amdsmb_ec_read(sc, SMB_DATA + i, &data);
536335b94f8SMatthew Dillon if (i < *count)
537335b94f8SMatthew Dillon buf[i] = data;
538335b94f8SMatthew Dillon }
539335b94f8SMatthew Dillon *count = len;
540335b94f8SMatthew Dillon }
541335b94f8SMatthew Dillon
542335b94f8SMatthew Dillon AMDSMB_DEBUG(kprintf("amdsmb: READBLK to 0x%x, count=0x%x, cmd=0x%x, "
543335b94f8SMatthew Dillon "error=0x%x", slave, *count, cmd, error));
544335b94f8SMatthew Dillon AMDSMB_UNLOCK(sc);
545335b94f8SMatthew Dillon
546335b94f8SMatthew Dillon return (error);
547335b94f8SMatthew Dillon }
548335b94f8SMatthew Dillon
549335b94f8SMatthew Dillon static device_method_t amdsmb_methods[] = {
550335b94f8SMatthew Dillon /* Device interface */
551335b94f8SMatthew Dillon DEVMETHOD(device_probe, amdsmb_probe),
552335b94f8SMatthew Dillon DEVMETHOD(device_attach, amdsmb_attach),
553335b94f8SMatthew Dillon DEVMETHOD(device_detach, amdsmb_detach),
554335b94f8SMatthew Dillon
555335b94f8SMatthew Dillon /* SMBus interface */
556335b94f8SMatthew Dillon DEVMETHOD(smbus_callback, amdsmb_callback),
557335b94f8SMatthew Dillon DEVMETHOD(smbus_quick, amdsmb_quick),
558335b94f8SMatthew Dillon DEVMETHOD(smbus_sendb, amdsmb_sendb),
559335b94f8SMatthew Dillon DEVMETHOD(smbus_recvb, amdsmb_recvb),
560335b94f8SMatthew Dillon DEVMETHOD(smbus_writeb, amdsmb_writeb),
561335b94f8SMatthew Dillon DEVMETHOD(smbus_readb, amdsmb_readb),
562335b94f8SMatthew Dillon DEVMETHOD(smbus_writew, amdsmb_writew),
563335b94f8SMatthew Dillon DEVMETHOD(smbus_readw, amdsmb_readw),
564335b94f8SMatthew Dillon DEVMETHOD(smbus_bwrite, amdsmb_bwrite),
565335b94f8SMatthew Dillon DEVMETHOD(smbus_bread, amdsmb_bread),
566335b94f8SMatthew Dillon
567335b94f8SMatthew Dillon DEVMETHOD_END
568335b94f8SMatthew Dillon };
569335b94f8SMatthew Dillon
570335b94f8SMatthew Dillon static devclass_t amdsmb_devclass;
571335b94f8SMatthew Dillon
572335b94f8SMatthew Dillon static driver_t amdsmb_driver = {
573335b94f8SMatthew Dillon "amdsmb",
574335b94f8SMatthew Dillon amdsmb_methods,
575335b94f8SMatthew Dillon sizeof(struct amdsmb_softc),
576335b94f8SMatthew Dillon };
577335b94f8SMatthew Dillon
578335b94f8SMatthew Dillon DRIVER_MODULE(amdsmb, pci, amdsmb_driver, amdsmb_devclass, NULL, NULL);
579335b94f8SMatthew Dillon DRIVER_MODULE(smbus, amdsmb, smbus_driver, smbus_devclass, NULL, NULL);
580335b94f8SMatthew Dillon
581335b94f8SMatthew Dillon MODULE_DEPEND(amdsmb, pci, 1, 1, 1);
582335b94f8SMatthew Dillon MODULE_DEPEND(amdsmb, smbus, SMBUS_MINVER, SMBUS_PREFVER, SMBUS_MAXVER);
583335b94f8SMatthew Dillon MODULE_VERSION(amdsmb, 1);
584