1.\" Copyright (c) 2001-2008, Intel Corporation 2.\" All rights reserved. 3.\" 4.\" Redistribution and use in source and binary forms, with or without 5.\" modification, are permitted provided that the following conditions are met: 6.\" 7.\" 1. Redistributions of source code must retain the above copyright notice, 8.\" this list of conditions and the following disclaimer. 9.\" 10.\" 2. Redistributions in binary form must reproduce the above copyright 11.\" notice, this list of conditions and the following disclaimer in the 12.\" documentation and/or other materials provided with the distribution. 13.\" 14.\" 3. Neither the name of the Intel Corporation nor the names of its 15.\" contributors may be used to endorse or promote products derived from 16.\" this software without specific prior written permission. 17.\" 18.\" THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 19.\" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 20.\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 21.\" ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 22.\" LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 23.\" CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 24.\" SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 25.\" INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 26.\" CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 27.\" ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 28.\" POSSIBILITY OF SUCH DAMAGE. 29.\" 30.\" * Other names and brands may be claimed as the property of others. 31.\" 32.\" $FreeBSD: src/share/man/man4/ixgbe.4,v 1.2 2008/06/17 21:14:02 brueffer Exp $ 33.\" 34.Dd November 26, 2015 35.Dt IX 4 36.Os 37.Sh NAME 38.Nm ix 39.Nd "Intel(R) 10Gb Ethernet driver" 40.Sh SYNOPSIS 41To compile this driver into the kernel, 42place the following line in your 43kernel configuration file: 44.Bd -ragged -offset indent 45.Cd "device ix" 46.Ed 47.Pp 48Alternatively, to load the driver as a 49module at boot time, place the following line in 50.Xr loader.conf 5 : 51.Bd -literal -offset indent 52if_ix_load="YES" 53.Ed 54.Sh DESCRIPTION 55The 56.Nm 57driver provides support for PCI Express 10Gb Ethernet adapters based on 58the Intel 5982598, 6082599, 61and 62X540 63Ethernet controller chips. 64The 65.Nm 66driver supports: 67.Pp 68.Bl -item -offset indent -compact 69.It 70Transmit/Receive checksum offload for IP/UDP/TCP. 71.\"Jumbo Frames. 72.It 73Interrupt moderation 74.It 75TCP segmentation offload (TSO) 76.It 77Receive side scaling (RSS) 78.It 79Multiple tranmission queues 80.It 81Multiple vector MSI-X 82.It 83VLAN tag stripping and inserting 84.El 85.Pp 86If 87.Xr polling 4 88or MSI-X is used, 89by default, 90the 91.Nm 92driver will try enabling as many reception queues and transmission queues 93as are allowed by the number of CPUs in the system. 94.Pp 95If multiple transmission queues are used, 96the round-robin arbitration is performed among the transmission queues. 97And if both TSO and multiple tranmission queues are used, 98the round-robin arbitration between transmission queues is done at the 99TCP segment boundary after the hardware segmentation is performed. 100.Pp 10182598 supports 16 reception queues and 32 transmission queues. 102MSI-X is not enabled due to hardware errata. 103Under MSI or legacy interrupt mode, 1042 reception queues are enabled for hardware RSS hash 105and only 1 transmission queue is enable. 106.Pp 10782599 and X540 supports 16 reception queues and 64 transmission queues. 108MSI-X is enable by default. 109However, 110due to the number of MSI-X vectors is 64, 111at most 16 reception queues and 32 transmission queues will be enabled 112under MSI-X mode. 113.Pp 114The 115.Nm 116driver supports the following media types: 117.Bl -tag -width ".Cm autoselect" 118.It Cm autoselect 119Enables auto-negotiation for speed and duplex. 120.El 121.Pp 122The 123.Nm 124driver supports the following media options: 125.Bl -tag -width ".Cm forcepause" 126.It Cm rxpause 127Enable flow control PAUSE reception. 128.It Cm txpause 129Enable flow control PAUSE transmission. 130.It Cm forcepause 131Force flow control PAUSE operation as configured by 132.Cm rxpause 133and 134.Cm txpause 135media options. 136.El 137.Pp 138For more information on configuring this device, see 139.Xr ifconfig 8 . 140The 141.Nm 142driver supports 143.Xr polling 4 . 144.Sh HARDWARE 145The 146.Nm 147driver supports Gigabit Ethernet adapters based on the Intel 14882598, 14982599, 150and 151X540 152controller chips: 153.Pp 154.Bl -bullet -compact 155.It 156Intel 10 Gigabit AF DA Dual Port Server Adapter 157.It 158Intel 10 Gigabit AT Server Adapter 159.It 160Intel 10 Gigabit AT2 Server Adapter 161.It 162Intel 10 Gigabit CX4 Dual Port Server Adapter 163.It 164Intel 10 Gigabit XF LR Server Adapter 165.It 166Intel 10 Gigabit XF SR Dual Port Server Adapter 167.It 168Intel 10 Gigabit XF SR Server Adapter 169.It 170Intel 82598 10 Gigabit Ethernet Controller 171.It 172Intel 82599 10 Gigabit Ethernet Controller 173.It 174Intel Ethernet Controller X540-AT2 175.It 176Intel Ethernet Converged Network Adapter X520 Series 177.It 178Intel Ethernet Converged Network Adapter X540-T1 179.It 180Intel Ethernet Converged Network Adapter X540-T2 181.It 182Intel Ethernet Server Adapter X520 Series 183.It 184Intel Ethernet Server Adapter X520-DA2 185.It 186Intel Ethernet Server Adapter X520-LR1 187.It 188Intel Ethernet Server Adapter X520-SR1 189.It 190Intel Ethernet Server Adapter X520-SR2 191.It 192Intel Ethernet Server Adapter X520-T2 193.El 194.Sh TUNABLES 195Tunables can be set at the 196.Xr loader 8 197prompt before booting the kernel or stored in 198.Xr loader.conf 5 . 199.Em Y 200is the device unit number. 201.Bl -tag -width ".Va hw.ixY.unsupported_sfp" 202.It Va hw.ix.rxd Va hw.ixY.rxd 203Number of receive descriptors allocated by the driver. 204The default value is 2048. 205The minimum is 64, 206and the maximum is 4096. 207.It Va hw.ix.txd Va hw.ixY.txd 208Number of transmit descriptors allocated by the driver. 209The default value is 2048. 210The minimum is 64, 211and the maximum is 4096. 212.It Va hw.ix.rxr Va hw.ixY.rxr 213This tunable specifies the number of reception queues could be enabled. 214Maximum allowed value for these tunables is device specific 215and it must be power of 2 aligned. 216Setting these tunables to 0 allows the driver to make 217as many reception queues ready-for-use as allowed by the number of CPUs. 218.It Va hw.ix.txr Va hw.ixY.txr 219This tunable specifies the number of transmission queues could be enabled. 220Maximum allowed value for these tunables is device specific 221and it must be power of 2 aligned. 222Setting these tunables to 0 allows the driver to make 223as many transmission queues ready-for-use as allowed by the number of CPUs. 224.It Va hw.ix.msix.enable Va hw.ixY.msix.enable 225By default, 226the driver will use MSI-X if it is supported. 227This behaviour can be turned off by setting this tunable to 0. 228.It Va hw.ix.msix.agg_rxtx Va hw.ixY.msix.agg_rxtx 229If MSI-X is used, 230the driver aggregates transmission queue and reception queue processing 231by default. 232This behaviour could be turned off by setting this tunable to 0. 233If the number of MSI-X vectors is not enough to 234put transmission queue processing and reception queue processing 235onto independent MSI-X vector, 236then transmission queue and reception queue processing are always 237aggregated. 238.It Va hw.ixY.msix.off 239If MSI-X is used, 240and transmission queue and reception queue processing are aggregated, 241this tunable specifies the leading target CPU for 242transmission and reception queues processing. 243The value specificed must be aligned to the maximum of 244the number of reception queues 245and the number of transmission queues enabled, 246and must be less than the power of 2 number of CPUs. 247.It Va hw.ixY.msix.rxoff 248If MSI-X is used, 249and transmission queue and reception queue processing are not aggregated, 250this tunable specifies the leading target CPU for reception queues processing. 251The value specificed must be aligned to the number of reception queues enabled 252and must be less than the power of 2 number of CPUs. 253.It Va hw.ixY.msix.txoff 254If MSI-X is used, 255and transmission queue and reception queue processing are not aggregated, 256this tunable specifies the leading target CPU 257for transmission queues processing. 258The value specificed must be aligned to 259the number of transmission queues enabled 260and must be less than the power of 2 number of CPUs. 261.It Va hw.ix.msi.enable Va hw.ixY.msi.enable 262If MSI-X is disabled and MSI is supported, 263the driver will use MSI. 264This behavior can be turned off by setting this tunable to 0. 265.It Va hw.ixY.msi.cpu 266If MSI is used, 267it specifies the MSI's target CPU. 268.It Va hw.ixY.npoll.txoff 269This tunable specifies the leading target CPU for 270transmission queue 271.Xr polling 4 272processing. 273The value specificed must be aligned to the number of transmission queues 274enabled and must be less than the power of 2 number of CPUs. 275.It Va hw.ixY.npoll.rxoff 276This tunable specifies the leading target CPU for 277reception queue 278.Xr polling 4 279processing. 280The value specificed must be aligned to the number of reception queues 281enabled and must be less than the power of 2 number of CPUs. 282.It Va hw.ix.unsupported_sfp 283By default, 284this driver does not allow "unsupported" SFP modules. 285This behavior can be changed by setting this tunable to 1. 286.It Va hw.ix.flow_ctrl Va hw.ixY.flow_ctrl 287The default flow control settings. 288Supported values are: 289rxpause (only enable PAUSE reception), 290txpause (only enable PAUSE transmission), 291full (enable PAUSE reception and transmission), 292none (disable flow control PAUSE operation), 293force-rxpause (force PAUSE reception), 294force-txpause (force PAUSE transmission), 295force-full (forcefully enable PAUSE reception and transmission), 296force-none (forcefully disable flow control PAUSE operation). 297Default is full. 298.El 299.Sh MIB Variables 300A number of per-interface variables are implemented in the 301.Va dev.ix. Ns Em Y 302branch of the 303.Xr sysctl 3 304MIB. 305.Bl -tag -width "rxtx_intr_rate" 306.It Va rxr 307Number of reception queues could be enabled (read-only). 308Use the tunable 309.Va hw.ix.rxr 310or 311.Va hw.ixY.rxr 312to configure it. 313.It Va rxr_inuse 314Number of reception queues being used (read-only). 315.It Va txr 316Number of transmission queues could be enabled (read-only). 317Use the tunable 318.Va hw.ix.txr 319or 320.Va hw.ixY.txr 321to configure it. 322.It Va txr_inuse 323Number of transmission queues being used (read-only). 324.It Va rxd 325Number of descriptors per reception queue (read-only). 326Use the tunable 327.Va hw.ix.rxd 328or 329.Va hw.ixY.rxd 330to configure it. 331.It Va txd 332Number of descriptors per transmission queue (read-only). 333Use the tunable 334.Va hw.ix.txd 335or 336.Va hw.ixY.txd 337to configure it. 338.It Va rxtx_intr_rate 339If MSI or legacy interrupt is used, 340this sysctl controls the highest possible frequency 341that interrupt could be generated by the device. 342If MSI-X is used, 343this sysctl controls the highest possible frequency 344that interrupt could be generated by the MSI-X vectors, 345which aggregate transmission queue and reception queue procecssing. 346It is 8000 by default (125us). 347.It Va rx_intr_rate 348If MSI-X is used, 349this sysctl controls the highest possible frequency 350that interrupt could be generated by the MSI-X vectors, 351which only process reception queue. 352It is 8000 by default (125us). 353.It Va tx_intr_rate 354If MSI-X is used, 355this sysctl controls the highest possible frequency 356that interrupt could be generated by the MSI-X vectors, 357which only process transmission queue. 358It is 6000 by default (~150us). 359.It Va sts_intr_rate 360If MSI-X is used, 361this sysctl controls the highest possible frequency 362that interrupt could be generated by the MSI-X vectors, 363which only process chip status changes. 364It is 8000 by default (125us). 365.It Va tx_intr_nsegs 366Transmission interrupt is asked to be generated upon every 367.Va tx_intr_nsegs 368transmission descritors having been setup. 369The default value is 1/16 of the number of transmission descriptors per queue. 370.It Va tx_wreg_nsegs 371The number of transmission descriptors should be setup 372before the hardware register is written. 373Setting this value too high will have negative effect 374on transmission timeliness. 375Setting this value too low will hurt overall transmission performance 376due to the frequent hardware register writing. 377The default value is 8. 378.It Va rx_wreg_nsegs 379The number of reception descriptors should be setup 380before the hardware register is written. 381Setting this value too high will make device drop incoming packets. 382Setting this value too low will hurt overall reception performance 383due to the frequent hardware register writing. 384The default value is 32. 385.It Va npoll_rxoff 386See the tunable 387.Va hw.ixY.npoll.rxoff . 388The set value will take effect the next time 389.Xr polling 4 390is enabled on the device. 391.It Va npoll_txoff 392See the tunable 393.Va hw.ixY.npoll.txoff . 394The set value will take effect the next time 395.Xr polling 4 396is enabled on the device. 397.El 398.Sh SEE ALSO 399.Xr altq 4 , 400.Xr arp 4 , 401.Xr ifmedia 4 , 402.Xr netintro 4 , 403.Xr ng_ether 4 , 404.Xr polling 4 , 405.Xr vlan 4 , 406.Xr ifconfig 8 407.Sh HISTORY 408The 409.Nm 410device driver first appeared in 411.Dx 3.1 . 412.Sh AUTHORS 413The 414.Nm 415driver was written by 416.An Intel Corporation Aq Mt freebsdnic@mailbox.intel.com . 417