1*38fd1498Szrj /* Prototypes of memory model helper functions.
2*38fd1498Szrj Copyright (C) 2011-2018 Free Software Foundation, Inc.
3*38fd1498Szrj
4*38fd1498Szrj This file is part of GCC.
5*38fd1498Szrj
6*38fd1498Szrj GCC is free software; you can redistribute it and/or modify it under
7*38fd1498Szrj the terms of the GNU General Public License as published by the Free
8*38fd1498Szrj Software Foundation; either version 3, or (at your option) any later
9*38fd1498Szrj version.
10*38fd1498Szrj
11*38fd1498Szrj GCC is distributed in the hope that it will be useful, but WITHOUT ANY
12*38fd1498Szrj WARRANTY; without even the implied warranty of MERCHANTABILITY or
13*38fd1498Szrj FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
14*38fd1498Szrj for more details.
15*38fd1498Szrj
16*38fd1498Szrj You should have received a copy of the GNU General Public License
17*38fd1498Szrj along with GCC; see the file COPYING3. If not see
18*38fd1498Szrj <http://www.gnu.org/licenses/>. */
19*38fd1498Szrj
20*38fd1498Szrj #ifndef GCC_MEMMODEL_H
21*38fd1498Szrj #define GCC_MEMMODEL_H
22*38fd1498Szrj
23*38fd1498Szrj /* Suppose that higher bits are target dependent. */
24*38fd1498Szrj #define MEMMODEL_MASK ((1<<16)-1)
25*38fd1498Szrj
26*38fd1498Szrj /* Legacy sync operations set this upper flag in the memory model. This allows
27*38fd1498Szrj targets that need to do something stronger for sync operations to
28*38fd1498Szrj differentiate with their target patterns and issue a more appropriate insn
29*38fd1498Szrj sequence. See bugzilla 65697 for background. */
30*38fd1498Szrj #define MEMMODEL_SYNC (1<<15)
31*38fd1498Szrj
32*38fd1498Szrj /* Memory model without SYNC bit for targets/operations that do not care. */
33*38fd1498Szrj #define MEMMODEL_BASE_MASK (MEMMODEL_SYNC-1)
34*38fd1498Szrj
35*38fd1498Szrj /* Memory model types for the __atomic* builtins.
36*38fd1498Szrj This must match the order in libstdc++-v3/include/bits/atomic_base.h. */
37*38fd1498Szrj enum memmodel
38*38fd1498Szrj {
39*38fd1498Szrj MEMMODEL_RELAXED = 0,
40*38fd1498Szrj MEMMODEL_CONSUME = 1,
41*38fd1498Szrj MEMMODEL_ACQUIRE = 2,
42*38fd1498Szrj MEMMODEL_RELEASE = 3,
43*38fd1498Szrj MEMMODEL_ACQ_REL = 4,
44*38fd1498Szrj MEMMODEL_SEQ_CST = 5,
45*38fd1498Szrj MEMMODEL_LAST = 6,
46*38fd1498Szrj MEMMODEL_SYNC_ACQUIRE = MEMMODEL_ACQUIRE | MEMMODEL_SYNC,
47*38fd1498Szrj MEMMODEL_SYNC_RELEASE = MEMMODEL_RELEASE | MEMMODEL_SYNC,
48*38fd1498Szrj MEMMODEL_SYNC_SEQ_CST = MEMMODEL_SEQ_CST | MEMMODEL_SYNC,
49*38fd1498Szrj /* Say that all the higher bits are valid target extensions. */
50*38fd1498Szrj MEMMODEL_MAX = INTTYPE_MAXIMUM (int)
51*38fd1498Szrj };
52*38fd1498Szrj
53*38fd1498Szrj /* Return the memory model from a host integer. */
54*38fd1498Szrj static inline enum memmodel
memmodel_from_int(unsigned HOST_WIDE_INT val)55*38fd1498Szrj memmodel_from_int (unsigned HOST_WIDE_INT val)
56*38fd1498Szrj {
57*38fd1498Szrj return (enum memmodel) (val & MEMMODEL_MASK);
58*38fd1498Szrj }
59*38fd1498Szrj
60*38fd1498Szrj /* Return the base memory model from a host integer. */
61*38fd1498Szrj static inline enum memmodel
memmodel_base(unsigned HOST_WIDE_INT val)62*38fd1498Szrj memmodel_base (unsigned HOST_WIDE_INT val)
63*38fd1498Szrj {
64*38fd1498Szrj return (enum memmodel) (val & MEMMODEL_BASE_MASK);
65*38fd1498Szrj }
66*38fd1498Szrj
67*38fd1498Szrj /* Return TRUE if the memory model is RELAXED. */
68*38fd1498Szrj static inline bool
is_mm_relaxed(enum memmodel model)69*38fd1498Szrj is_mm_relaxed (enum memmodel model)
70*38fd1498Szrj {
71*38fd1498Szrj return (model & MEMMODEL_BASE_MASK) == MEMMODEL_RELAXED;
72*38fd1498Szrj }
73*38fd1498Szrj
74*38fd1498Szrj /* Return TRUE if the memory model is CONSUME. */
75*38fd1498Szrj static inline bool
is_mm_consume(enum memmodel model)76*38fd1498Szrj is_mm_consume (enum memmodel model)
77*38fd1498Szrj {
78*38fd1498Szrj return (model & MEMMODEL_BASE_MASK) == MEMMODEL_CONSUME;
79*38fd1498Szrj }
80*38fd1498Szrj
81*38fd1498Szrj /* Return TRUE if the memory model is ACQUIRE. */
82*38fd1498Szrj static inline bool
is_mm_acquire(enum memmodel model)83*38fd1498Szrj is_mm_acquire (enum memmodel model)
84*38fd1498Szrj {
85*38fd1498Szrj return (model & MEMMODEL_BASE_MASK) == MEMMODEL_ACQUIRE;
86*38fd1498Szrj }
87*38fd1498Szrj
88*38fd1498Szrj /* Return TRUE if the memory model is RELEASE. */
89*38fd1498Szrj static inline bool
is_mm_release(enum memmodel model)90*38fd1498Szrj is_mm_release (enum memmodel model)
91*38fd1498Szrj {
92*38fd1498Szrj return (model & MEMMODEL_BASE_MASK) == MEMMODEL_RELEASE;
93*38fd1498Szrj }
94*38fd1498Szrj
95*38fd1498Szrj /* Return TRUE if the memory model is ACQ_REL. */
96*38fd1498Szrj static inline bool
is_mm_acq_rel(enum memmodel model)97*38fd1498Szrj is_mm_acq_rel (enum memmodel model)
98*38fd1498Szrj {
99*38fd1498Szrj return (model & MEMMODEL_BASE_MASK) == MEMMODEL_ACQ_REL;
100*38fd1498Szrj }
101*38fd1498Szrj
102*38fd1498Szrj /* Return TRUE if the memory model is SEQ_CST. */
103*38fd1498Szrj static inline bool
is_mm_seq_cst(enum memmodel model)104*38fd1498Szrj is_mm_seq_cst (enum memmodel model)
105*38fd1498Szrj {
106*38fd1498Szrj return (model & MEMMODEL_BASE_MASK) == MEMMODEL_SEQ_CST;
107*38fd1498Szrj }
108*38fd1498Szrj
109*38fd1498Szrj /* Return TRUE if the memory model is a SYNC variant. */
110*38fd1498Szrj static inline bool
is_mm_sync(enum memmodel model)111*38fd1498Szrj is_mm_sync (enum memmodel model)
112*38fd1498Szrj {
113*38fd1498Szrj return (model & MEMMODEL_SYNC);
114*38fd1498Szrj }
115*38fd1498Szrj
116*38fd1498Szrj #endif /* GCC_MEMMODEL_H */
117