1*38fd1498SzrjDEF_TM_BUILTIN (BUILT_IN_TM_START, "_ITM_beginTransaction", 2*38fd1498Szrj BT_FN_UINT32_UINT32_VAR, ATTR_TM_NOTHROW_RT_LIST) 3*38fd1498Szrj 4*38fd1498SzrjDEF_TM_BUILTIN (BUILT_IN_TM_COMMIT, "_ITM_commitTransaction", 5*38fd1498Szrj BT_FN_VOID, ATTR_TM_NOTHROW_LIST) 6*38fd1498SzrjDEF_TM_BUILTIN (BUILT_IN_TM_COMMIT_EH, "_ITM_commitTransactionEH", 7*38fd1498Szrj BT_FN_VOID_PTR, ATTR_TM_NOTHROW_LIST) 8*38fd1498SzrjDEF_TM_BUILTIN (BUILT_IN_TM_ABORT, "_ITM_abortTransaction", 9*38fd1498Szrj BT_FN_VOID_INT, ATTR_TM_NORETURN_NOTHROW_LIST) 10*38fd1498SzrjDEF_TM_BUILTIN (BUILT_IN_TM_IRREVOCABLE, "_ITM_changeTransactionMode", 11*38fd1498Szrj BT_FN_VOID_INT, ATTR_TM_NOTHROW_LIST) 12*38fd1498Szrj 13*38fd1498SzrjDEF_TM_BUILTIN (BUILT_IN_TM_MEMCPY, "_ITM_memcpyRtWt", 14*38fd1498Szrj BT_FN_VOID_PTR_CONST_PTR_SIZE, ATTR_TM_TMPURE_NOTHROW_LIST) 15*38fd1498SzrjDEF_TM_BUILTIN (BUILT_IN_TM_MEMCPY_RNWT, "_ITM_memcpyRnWt", 16*38fd1498Szrj BT_FN_VOID_PTR_CONST_PTR_SIZE, ATTR_TM_TMPURE_NOTHROW_LIST) 17*38fd1498SzrjDEF_TM_BUILTIN (BUILT_IN_TM_MEMCPY_RTWN, "_ITM_memcpyRtWn", 18*38fd1498Szrj BT_FN_VOID_PTR_CONST_PTR_SIZE, ATTR_TM_TMPURE_NOTHROW_LIST) 19*38fd1498SzrjDEF_TM_BUILTIN (BUILT_IN_TM_MEMMOVE, "_ITM_memmoveRtWt", 20*38fd1498Szrj BT_FN_VOID_PTR_CONST_PTR_SIZE, ATTR_TM_TMPURE_NOTHROW_LIST) 21*38fd1498SzrjDEF_TM_BUILTIN (BUILT_IN_TM_MEMSET, "_ITM_memsetW", 22*38fd1498Szrj BT_FN_VOID_PTR_INT_SIZE, ATTR_TM_TMPURE_NOTHROW_LIST) 23*38fd1498Szrj 24*38fd1498SzrjDEF_TM_BUILTIN (BUILT_IN_TM_GETTMCLONE_IRR, "_ITM_getTMCloneOrIrrevocable", 25*38fd1498Szrj BT_FN_PTR_PTR, ATTR_TM_CONST_NOTHROW_LIST) 26*38fd1498SzrjDEF_TM_BUILTIN (BUILT_IN_TM_GETTMCLONE_SAFE, "_ITM_getTMCloneSafe", 27*38fd1498Szrj BT_FN_PTR_PTR, ATTR_TM_CONST_NOTHROW_LIST) 28*38fd1498Szrj 29*38fd1498Szrj/* Memory allocation builtins. */ 30*38fd1498SzrjDEF_TM_BUILTIN (BUILT_IN_TM_MALLOC, "_ITM_malloc", 31*38fd1498Szrj BT_FN_PTR_SIZE, ATTR_TMPURE_MALLOC_NOTHROW_LIST) 32*38fd1498SzrjDEF_TM_BUILTIN (BUILT_IN_TM_CALLOC, "_ITM_calloc", 33*38fd1498Szrj BT_FN_PTR_SIZE_SIZE, ATTR_TMPURE_MALLOC_NOTHROW_LIST) 34*38fd1498SzrjDEF_TM_BUILTIN (BUILT_IN_TM_FREE, "_ITM_free", 35*38fd1498Szrj BT_FN_VOID_PTR, ATTR_TMPURE_NOTHROW_LEAF_LIST) 36*38fd1498Szrj 37*38fd1498Szrj/* Logging builtins. */ 38*38fd1498SzrjDEF_TM_BUILTIN (BUILT_IN_TM_LOG_1, "_ITM_LU1", 39*38fd1498Szrj BT_FN_VOID_VPTR, ATTR_TM_TMPURE_NOTHROW_LIST) 40*38fd1498SzrjDEF_TM_BUILTIN (BUILT_IN_TM_LOG_2, "_ITM_LU2", 41*38fd1498Szrj BT_FN_VOID_VPTR, ATTR_TM_TMPURE_NOTHROW_LIST) 42*38fd1498SzrjDEF_TM_BUILTIN (BUILT_IN_TM_LOG_4, "_ITM_LU4", 43*38fd1498Szrj BT_FN_VOID_VPTR, ATTR_TM_TMPURE_NOTHROW_LIST) 44*38fd1498SzrjDEF_TM_BUILTIN (BUILT_IN_TM_LOG_8, "_ITM_LU8", 45*38fd1498Szrj BT_FN_VOID_VPTR, ATTR_TM_TMPURE_NOTHROW_LIST) 46*38fd1498SzrjDEF_TM_BUILTIN (BUILT_IN_TM_LOG_FLOAT, "_ITM_LF", 47*38fd1498Szrj BT_FN_VOID_VPTR, ATTR_TM_TMPURE_NOTHROW_LIST) 48*38fd1498SzrjDEF_TM_BUILTIN (BUILT_IN_TM_LOG_DOUBLE, "_ITM_LD", 49*38fd1498Szrj BT_FN_VOID_VPTR, ATTR_TM_TMPURE_NOTHROW_LIST) 50*38fd1498SzrjDEF_TM_BUILTIN (BUILT_IN_TM_LOG_LDOUBLE, "_ITM_LE", 51*38fd1498Szrj BT_FN_VOID_VPTR, ATTR_TM_TMPURE_NOTHROW_LIST) 52*38fd1498SzrjDEF_TM_BUILTIN (BUILT_IN_TM_LOG, "_ITM_LB", 53*38fd1498Szrj BT_FN_VOID_VPTR_SIZE, ATTR_TM_TMPURE_NOTHROW_LIST) 54*38fd1498Szrj 55*38fd1498Szrj/* These stubs should get defined in the backend if applicable. */ 56*38fd1498SzrjDEF_BUILTIN_STUB (BUILT_IN_TM_LOG_M64, "__builtin__ITM_LM64") 57*38fd1498SzrjDEF_BUILTIN_STUB (BUILT_IN_TM_LOG_M128, "__builtin__ITM_LM128") 58*38fd1498SzrjDEF_BUILTIN_STUB (BUILT_IN_TM_LOG_M256, "__builtin__ITM_LM256") 59*38fd1498Szrj 60*38fd1498Szrj/* Writes. 61*38fd1498Szrj 62*38fd1498Szrj Note: The writes must follow the following order: STORE, WAR, WAW. 63*38fd1498Szrj The TM optimizations depend on this order. 64*38fd1498Szrj 65*38fd1498Szrj BUILT_IN_TM_STORE_1 must be the first builtin. 66*38fd1498Szrj BUILTIN_TM_LOAD_STORE_P depends on this. */ 67*38fd1498SzrjDEF_TM_BUILTIN (BUILT_IN_TM_STORE_1, "_ITM_WU1", 68*38fd1498Szrj BT_FN_VOID_VPTR_I1, ATTR_TM_NOTHROW_LIST) 69*38fd1498SzrjDEF_TM_BUILTIN (BUILT_IN_TM_STORE_WAR_1, "_ITM_WaRU1", 70*38fd1498Szrj BT_FN_VOID_VPTR_I1, ATTR_TM_NOTHROW_LIST) 71*38fd1498SzrjDEF_TM_BUILTIN (BUILT_IN_TM_STORE_WAW_1, "_ITM_WaWU1", 72*38fd1498Szrj BT_FN_VOID_VPTR_I1, ATTR_TM_NOTHROW_LIST) 73*38fd1498Szrj 74*38fd1498SzrjDEF_TM_BUILTIN (BUILT_IN_TM_STORE_2, "_ITM_WU2", 75*38fd1498Szrj BT_FN_VOID_VPTR_I2, ATTR_TM_NOTHROW_LIST) 76*38fd1498SzrjDEF_TM_BUILTIN (BUILT_IN_TM_STORE_WAR_2, "_ITM_WaRU2", 77*38fd1498Szrj BT_FN_VOID_VPTR_I2, ATTR_TM_NOTHROW_LIST) 78*38fd1498SzrjDEF_TM_BUILTIN (BUILT_IN_TM_STORE_WAW_2, "_ITM_WaWU2", 79*38fd1498Szrj BT_FN_VOID_VPTR_I2, ATTR_TM_NOTHROW_LIST) 80*38fd1498Szrj 81*38fd1498SzrjDEF_TM_BUILTIN (BUILT_IN_TM_STORE_4, "_ITM_WU4", 82*38fd1498Szrj BT_FN_VOID_VPTR_I4, ATTR_TM_NOTHROW_LIST) 83*38fd1498SzrjDEF_TM_BUILTIN (BUILT_IN_TM_STORE_WAR_4, "_ITM_WaRU4", 84*38fd1498Szrj BT_FN_VOID_VPTR_I4, ATTR_TM_NOTHROW_LIST) 85*38fd1498SzrjDEF_TM_BUILTIN (BUILT_IN_TM_STORE_WAW_4, "_ITM_WaWU4", 86*38fd1498Szrj BT_FN_VOID_VPTR_I4, ATTR_TM_NOTHROW_LIST) 87*38fd1498Szrj 88*38fd1498SzrjDEF_TM_BUILTIN (BUILT_IN_TM_STORE_8, "_ITM_WU8", 89*38fd1498Szrj BT_FN_VOID_VPTR_I8, ATTR_TM_NOTHROW_LIST) 90*38fd1498SzrjDEF_TM_BUILTIN (BUILT_IN_TM_STORE_WAR_8, "_ITM_WaRU8", 91*38fd1498Szrj BT_FN_VOID_VPTR_I8, ATTR_TM_NOTHROW_LIST) 92*38fd1498SzrjDEF_TM_BUILTIN (BUILT_IN_TM_STORE_WAW_8, "_ITM_WaWU8", 93*38fd1498Szrj BT_FN_VOID_VPTR_I8, ATTR_TM_NOTHROW_LIST) 94*38fd1498Szrj 95*38fd1498SzrjDEF_TM_BUILTIN (BUILT_IN_TM_STORE_FLOAT, "_ITM_WF", 96*38fd1498Szrj BT_FN_VOID_VPTR_FLOAT, ATTR_TM_NOTHROW_LIST) 97*38fd1498SzrjDEF_TM_BUILTIN (BUILT_IN_TM_STORE_WAR_FLOAT, "_ITM_WaRF", 98*38fd1498Szrj BT_FN_VOID_VPTR_FLOAT, ATTR_TM_NOTHROW_LIST) 99*38fd1498SzrjDEF_TM_BUILTIN (BUILT_IN_TM_STORE_WAW_FLOAT, "_ITM_WaWF", 100*38fd1498Szrj BT_FN_VOID_VPTR_FLOAT, ATTR_TM_NOTHROW_LIST) 101*38fd1498Szrj 102*38fd1498SzrjDEF_TM_BUILTIN (BUILT_IN_TM_STORE_DOUBLE, "_ITM_WD", 103*38fd1498Szrj BT_FN_VOID_VPTR_DOUBLE, ATTR_TM_NOTHROW_LIST) 104*38fd1498SzrjDEF_TM_BUILTIN (BUILT_IN_TM_STORE_WAR_DOUBLE, "_ITM_WaRD", 105*38fd1498Szrj BT_FN_VOID_VPTR_DOUBLE, ATTR_TM_NOTHROW_LIST) 106*38fd1498SzrjDEF_TM_BUILTIN (BUILT_IN_TM_STORE_WAW_DOUBLE, "_ITM_WaWD", 107*38fd1498Szrj BT_FN_VOID_VPTR_DOUBLE, ATTR_TM_NOTHROW_LIST) 108*38fd1498Szrj 109*38fd1498Szrj/* These stubs should get defined in the backend if applicable. */ 110*38fd1498SzrjDEF_BUILTIN_STUB (BUILT_IN_TM_STORE_M64, "__builtin__ITM_WM64") 111*38fd1498SzrjDEF_BUILTIN_STUB (BUILT_IN_TM_STORE_WAR_M64, "__builtin__ITM_WaRM64") 112*38fd1498SzrjDEF_BUILTIN_STUB (BUILT_IN_TM_STORE_WAW_M64, "__builtin__ITM_WaWM64") 113*38fd1498SzrjDEF_BUILTIN_STUB (BUILT_IN_TM_STORE_M128, "__builtin__ITM_WM128") 114*38fd1498SzrjDEF_BUILTIN_STUB (BUILT_IN_TM_STORE_WAR_M128, "__builtin__ITM_WaRM128") 115*38fd1498SzrjDEF_BUILTIN_STUB (BUILT_IN_TM_STORE_WAW_M128, "__builtin__ITM_WaWM128") 116*38fd1498SzrjDEF_BUILTIN_STUB (BUILT_IN_TM_STORE_M256, "__builtin__ITM_WM256") 117*38fd1498SzrjDEF_BUILTIN_STUB (BUILT_IN_TM_STORE_WAR_M256, "__builtin__ITM_WaRM256") 118*38fd1498SzrjDEF_BUILTIN_STUB (BUILT_IN_TM_STORE_WAW_M256, "__builtin__ITM_WaWM256") 119*38fd1498Szrj 120*38fd1498SzrjDEF_TM_BUILTIN (BUILT_IN_TM_STORE_LDOUBLE, "_ITM_WE", 121*38fd1498Szrj BT_FN_VOID_VPTR_LDOUBLE, ATTR_TM_NOTHROW_LIST) 122*38fd1498SzrjDEF_TM_BUILTIN (BUILT_IN_TM_STORE_WAR_LDOUBLE, "_ITM_WaRE", 123*38fd1498Szrj BT_FN_VOID_VPTR_LDOUBLE, ATTR_TM_NOTHROW_LIST) 124*38fd1498SzrjDEF_TM_BUILTIN (BUILT_IN_TM_STORE_WAW_LDOUBLE, "_ITM_WaWE", 125*38fd1498Szrj BT_FN_VOID_VPTR_LDOUBLE, ATTR_TM_NOTHROW_LIST) 126*38fd1498Szrj/* Note: BUILT_IN_TM_STORE_WAW_LDOUBLE must be the last TM store. 127*38fd1498Szrj BUILTIN_TM_STORE_P depends on this. */ 128*38fd1498Szrj 129*38fd1498Szrj/* Reads. 130*38fd1498Szrj 131*38fd1498Szrj Note: The reads must follow the following order: LOAD, RAR, RAW, RFW. 132*38fd1498Szrj The TM optimizations depend on this order. */ 133*38fd1498SzrjDEF_TM_BUILTIN (BUILT_IN_TM_LOAD_1, "_ITM_RU1", 134*38fd1498Szrj BT_FN_I1_VPTR, ATTR_TM_PURE_TMPURE_NOTHROW_LIST) 135*38fd1498SzrjDEF_TM_BUILTIN (BUILT_IN_TM_LOAD_RAR_1, "_ITM_RaRU1", 136*38fd1498Szrj BT_FN_I1_VPTR, ATTR_TM_PURE_TMPURE_NOTHROW_LIST) 137*38fd1498SzrjDEF_TM_BUILTIN (BUILT_IN_TM_LOAD_RAW_1, "_ITM_RaWU1", 138*38fd1498Szrj BT_FN_I1_VPTR, ATTR_TM_PURE_TMPURE_NOTHROW_LIST) 139*38fd1498SzrjDEF_TM_BUILTIN (BUILT_IN_TM_LOAD_RFW_1, "_ITM_RfWU1", 140*38fd1498Szrj BT_FN_I1_VPTR, ATTR_TM_PURE_TMPURE_NOTHROW_LIST) 141*38fd1498Szrj 142*38fd1498SzrjDEF_TM_BUILTIN (BUILT_IN_TM_LOAD_2, "_ITM_RU2", 143*38fd1498Szrj BT_FN_I2_VPTR, ATTR_TM_PURE_TMPURE_NOTHROW_LIST) 144*38fd1498SzrjDEF_TM_BUILTIN (BUILT_IN_TM_LOAD_RAR_2, "_ITM_RaRU2", 145*38fd1498Szrj BT_FN_I2_VPTR, ATTR_TM_PURE_TMPURE_NOTHROW_LIST) 146*38fd1498SzrjDEF_TM_BUILTIN (BUILT_IN_TM_LOAD_RAW_2, "_ITM_RaWU2", 147*38fd1498Szrj BT_FN_I2_VPTR, ATTR_TM_PURE_TMPURE_NOTHROW_LIST) 148*38fd1498SzrjDEF_TM_BUILTIN (BUILT_IN_TM_LOAD_RFW_2, "_ITM_RfWU2", 149*38fd1498Szrj BT_FN_I2_VPTR, ATTR_TM_PURE_TMPURE_NOTHROW_LIST) 150*38fd1498Szrj 151*38fd1498SzrjDEF_TM_BUILTIN (BUILT_IN_TM_LOAD_4, "_ITM_RU4", 152*38fd1498Szrj BT_FN_I4_VPTR, ATTR_TM_PURE_TMPURE_NOTHROW_LIST) 153*38fd1498SzrjDEF_TM_BUILTIN (BUILT_IN_TM_LOAD_RAR_4, "_ITM_RaRU4", 154*38fd1498Szrj BT_FN_I4_VPTR, ATTR_TM_PURE_TMPURE_NOTHROW_LIST) 155*38fd1498SzrjDEF_TM_BUILTIN (BUILT_IN_TM_LOAD_RAW_4, "_ITM_RaWU4", 156*38fd1498Szrj BT_FN_I4_VPTR, ATTR_TM_PURE_TMPURE_NOTHROW_LIST) 157*38fd1498SzrjDEF_TM_BUILTIN (BUILT_IN_TM_LOAD_RFW_4, "_ITM_RfWU4", 158*38fd1498Szrj BT_FN_I4_VPTR, ATTR_TM_PURE_TMPURE_NOTHROW_LIST) 159*38fd1498Szrj 160*38fd1498SzrjDEF_TM_BUILTIN (BUILT_IN_TM_LOAD_8, "_ITM_RU8", 161*38fd1498Szrj BT_FN_I8_VPTR, ATTR_TM_PURE_TMPURE_NOTHROW_LIST) 162*38fd1498SzrjDEF_TM_BUILTIN (BUILT_IN_TM_LOAD_RAR_8, "_ITM_RaRU8", 163*38fd1498Szrj BT_FN_I8_VPTR, ATTR_TM_PURE_TMPURE_NOTHROW_LIST) 164*38fd1498SzrjDEF_TM_BUILTIN (BUILT_IN_TM_LOAD_RAW_8, "_ITM_RaWU8", 165*38fd1498Szrj BT_FN_I8_VPTR, ATTR_TM_PURE_TMPURE_NOTHROW_LIST) 166*38fd1498SzrjDEF_TM_BUILTIN (BUILT_IN_TM_LOAD_RFW_8, "_ITM_RfWU8", 167*38fd1498Szrj BT_FN_I8_VPTR, ATTR_TM_PURE_TMPURE_NOTHROW_LIST) 168*38fd1498Szrj 169*38fd1498SzrjDEF_TM_BUILTIN (BUILT_IN_TM_LOAD_FLOAT, "_ITM_RF", 170*38fd1498Szrj BT_FN_FLOAT_VPTR, ATTR_TM_PURE_TMPURE_NOTHROW_LIST) 171*38fd1498SzrjDEF_TM_BUILTIN (BUILT_IN_TM_LOAD_RAR_FLOAT, "_ITM_RaRF", 172*38fd1498Szrj BT_FN_FLOAT_VPTR, ATTR_TM_PURE_TMPURE_NOTHROW_LIST) 173*38fd1498SzrjDEF_TM_BUILTIN (BUILT_IN_TM_LOAD_RAW_FLOAT, "_ITM_RaWF", 174*38fd1498Szrj BT_FN_FLOAT_VPTR, ATTR_TM_PURE_TMPURE_NOTHROW_LIST) 175*38fd1498SzrjDEF_TM_BUILTIN (BUILT_IN_TM_LOAD_RFW_FLOAT, "_ITM_RfWF", 176*38fd1498Szrj BT_FN_FLOAT_VPTR, ATTR_TM_PURE_TMPURE_NOTHROW_LIST) 177*38fd1498Szrj 178*38fd1498SzrjDEF_TM_BUILTIN (BUILT_IN_TM_LOAD_DOUBLE, "_ITM_RD", 179*38fd1498Szrj BT_FN_DOUBLE_CONST_DOUBLE_PTR, ATTR_TM_PURE_TMPURE_NOTHROW_LIST) 180*38fd1498SzrjDEF_TM_BUILTIN (BUILT_IN_TM_LOAD_RAR_DOUBLE, "_ITM_RaRD", 181*38fd1498Szrj BT_FN_DOUBLE_CONST_DOUBLE_PTR, ATTR_TM_PURE_TMPURE_NOTHROW_LIST) 182*38fd1498SzrjDEF_TM_BUILTIN (BUILT_IN_TM_LOAD_RAW_DOUBLE, "_ITM_RaWD", 183*38fd1498Szrj BT_FN_DOUBLE_CONST_DOUBLE_PTR, ATTR_TM_PURE_TMPURE_NOTHROW_LIST) 184*38fd1498SzrjDEF_TM_BUILTIN (BUILT_IN_TM_LOAD_RFW_DOUBLE, "_ITM_RfWD", 185*38fd1498Szrj BT_FN_DOUBLE_CONST_DOUBLE_PTR, ATTR_TM_PURE_TMPURE_NOTHROW_LIST) 186*38fd1498Szrj 187*38fd1498Szrj/* These stubs should get defined in the backend if applicable. */ 188*38fd1498SzrjDEF_BUILTIN_STUB (BUILT_IN_TM_LOAD_M64, "__builtin__ITM_RM64") 189*38fd1498SzrjDEF_BUILTIN_STUB (BUILT_IN_TM_LOAD_RAR_M64, "__builtin__ITM_RaRM64") 190*38fd1498SzrjDEF_BUILTIN_STUB (BUILT_IN_TM_LOAD_RAW_M64, "__builtin__ITM_RaRM64") 191*38fd1498SzrjDEF_BUILTIN_STUB (BUILT_IN_TM_LOAD_RFW_M64, "__builtin__ITM_RfWM64") 192*38fd1498SzrjDEF_BUILTIN_STUB (BUILT_IN_TM_LOAD_M128, "__builtin__ITM_RM128") 193*38fd1498SzrjDEF_BUILTIN_STUB (BUILT_IN_TM_LOAD_RAR_M128, "__builtin__ITM_RaRM128") 194*38fd1498SzrjDEF_BUILTIN_STUB (BUILT_IN_TM_LOAD_RAW_M128, "__builtin__ITM_RaRM128") 195*38fd1498SzrjDEF_BUILTIN_STUB (BUILT_IN_TM_LOAD_RFW_M128, "__builtin__ITM_RfWM128") 196*38fd1498SzrjDEF_BUILTIN_STUB (BUILT_IN_TM_LOAD_M256, "__builtin__ITM_RM256") 197*38fd1498SzrjDEF_BUILTIN_STUB (BUILT_IN_TM_LOAD_RAR_M256, "__builtin__ITM_RaRM256") 198*38fd1498SzrjDEF_BUILTIN_STUB (BUILT_IN_TM_LOAD_RAW_M256, "__builtin__ITM_RaRM256") 199*38fd1498SzrjDEF_BUILTIN_STUB (BUILT_IN_TM_LOAD_RFW_M256, "__builtin__ITM_RfWM256") 200*38fd1498Szrj 201*38fd1498SzrjDEF_TM_BUILTIN (BUILT_IN_TM_LOAD_LDOUBLE, "_ITM_RE", 202*38fd1498Szrj BT_FN_LDOUBLE_VPTR, ATTR_TM_PURE_TMPURE_NOTHROW_LIST) 203*38fd1498SzrjDEF_TM_BUILTIN (BUILT_IN_TM_LOAD_RAR_LDOUBLE, "_ITM_RaRE", 204*38fd1498Szrj BT_FN_LDOUBLE_VPTR, ATTR_TM_PURE_TMPURE_NOTHROW_LIST) 205*38fd1498SzrjDEF_TM_BUILTIN (BUILT_IN_TM_LOAD_RAW_LDOUBLE, "_ITM_RaWE", 206*38fd1498Szrj BT_FN_LDOUBLE_VPTR, ATTR_TM_PURE_TMPURE_NOTHROW_LIST) 207*38fd1498SzrjDEF_TM_BUILTIN (BUILT_IN_TM_LOAD_RFW_LDOUBLE, "_ITM_RfWE", 208*38fd1498Szrj BT_FN_LDOUBLE_VPTR, ATTR_TM_PURE_TMPURE_NOTHROW_LIST) 209*38fd1498Szrj 210*38fd1498Szrj/* Note: BUILT_IN_TM_LOAD_RFW_LDOUBLE must be the last TM load as well 211*38fd1498Szrj as the last builtin. BUILTIN_TM_LOAD_STORE_P and BUILTIN_TM_LOAD_P 212*38fd1498Szrj depend on this. */ 213