xref: /dflybsd-src/contrib/gcc-8.0/gcc/config/i386/lwpintrin.h (revision 38fd149817dfbff97799f62fcb70be98c4e32523)
1*38fd1498Szrj /* Copyright (C) 2007-2018 Free Software Foundation, Inc.
2*38fd1498Szrj 
3*38fd1498Szrj    This file is part of GCC.
4*38fd1498Szrj 
5*38fd1498Szrj    GCC is free software; you can redistribute it and/or modify
6*38fd1498Szrj    it under the terms of the GNU General Public License as published by
7*38fd1498Szrj    the Free Software Foundation; either version 3, or (at your option)
8*38fd1498Szrj    any later version.
9*38fd1498Szrj 
10*38fd1498Szrj    GCC is distributed in the hope that it will be useful,
11*38fd1498Szrj    but WITHOUT ANY WARRANTY; without even the implied warranty of
12*38fd1498Szrj    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
13*38fd1498Szrj    GNU General Public License for more details.
14*38fd1498Szrj 
15*38fd1498Szrj    Under Section 7 of GPL version 3, you are granted additional
16*38fd1498Szrj    permissions described in the GCC Runtime Library Exception, version
17*38fd1498Szrj    3.1, as published by the Free Software Foundation.
18*38fd1498Szrj 
19*38fd1498Szrj    You should have received a copy of the GNU General Public License and
20*38fd1498Szrj    a copy of the GCC Runtime Library Exception along with this program;
21*38fd1498Szrj    see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
22*38fd1498Szrj    <http://www.gnu.org/licenses/>.  */
23*38fd1498Szrj 
24*38fd1498Szrj #ifndef _X86INTRIN_H_INCLUDED
25*38fd1498Szrj # error "Never use <lwpintrin.h> directly; include <x86intrin.h> instead."
26*38fd1498Szrj #endif
27*38fd1498Szrj 
28*38fd1498Szrj #ifndef _LWPINTRIN_H_INCLUDED
29*38fd1498Szrj #define _LWPINTRIN_H_INCLUDED
30*38fd1498Szrj 
31*38fd1498Szrj #ifndef __LWP__
32*38fd1498Szrj #pragma GCC push_options
33*38fd1498Szrj #pragma GCC target("lwp")
34*38fd1498Szrj #define __DISABLE_LWP__
35*38fd1498Szrj #endif /* __LWP__ */
36*38fd1498Szrj 
37*38fd1498Szrj extern __inline void __attribute__((__gnu_inline__, __always_inline__, __artificial__))
__llwpcb(void * __pcbAddress)38*38fd1498Szrj __llwpcb (void *__pcbAddress)
39*38fd1498Szrj {
40*38fd1498Szrj   __builtin_ia32_llwpcb (__pcbAddress);
41*38fd1498Szrj }
42*38fd1498Szrj 
43*38fd1498Szrj extern __inline void * __attribute__((__gnu_inline__, __always_inline__, __artificial__))
__slwpcb(void)44*38fd1498Szrj __slwpcb (void)
45*38fd1498Szrj {
46*38fd1498Szrj   return __builtin_ia32_slwpcb ();
47*38fd1498Szrj }
48*38fd1498Szrj 
49*38fd1498Szrj #ifdef __OPTIMIZE__
50*38fd1498Szrj extern __inline void __attribute__((__gnu_inline__, __always_inline__, __artificial__))
__lwpval32(unsigned int __data2,unsigned int __data1,unsigned int __flags)51*38fd1498Szrj __lwpval32 (unsigned int __data2, unsigned int __data1, unsigned int __flags)
52*38fd1498Szrj {
53*38fd1498Szrj   __builtin_ia32_lwpval32 (__data2, __data1, __flags);
54*38fd1498Szrj }
55*38fd1498Szrj 
56*38fd1498Szrj #ifdef __x86_64__
57*38fd1498Szrj extern __inline void __attribute__((__gnu_inline__, __always_inline__, __artificial__))
__lwpval64(unsigned long long __data2,unsigned int __data1,unsigned int __flags)58*38fd1498Szrj __lwpval64 (unsigned long long __data2, unsigned int __data1,
59*38fd1498Szrj 	    unsigned int __flags)
60*38fd1498Szrj {
61*38fd1498Szrj   __builtin_ia32_lwpval64 (__data2, __data1, __flags);
62*38fd1498Szrj }
63*38fd1498Szrj #endif
64*38fd1498Szrj #else
65*38fd1498Szrj #define __lwpval32(D2, D1, F) \
66*38fd1498Szrj   (__builtin_ia32_lwpval32 ((unsigned int) (D2), (unsigned int) (D1), \
67*38fd1498Szrj 			    (unsigned int) (F)))
68*38fd1498Szrj #ifdef __x86_64__
69*38fd1498Szrj #define __lwpval64(D2, D1, F) \
70*38fd1498Szrj   (__builtin_ia32_lwpval64 ((unsigned long long) (D2), (unsigned int) (D1), \
71*38fd1498Szrj 			    (unsigned int) (F)))
72*38fd1498Szrj #endif
73*38fd1498Szrj #endif
74*38fd1498Szrj 
75*38fd1498Szrj 
76*38fd1498Szrj #ifdef __OPTIMIZE__
77*38fd1498Szrj extern __inline unsigned char __attribute__((__gnu_inline__, __always_inline__, __artificial__))
__lwpins32(unsigned int __data2,unsigned int __data1,unsigned int __flags)78*38fd1498Szrj __lwpins32 (unsigned int __data2, unsigned int __data1, unsigned int __flags)
79*38fd1498Szrj {
80*38fd1498Szrj   return __builtin_ia32_lwpins32 (__data2, __data1, __flags);
81*38fd1498Szrj }
82*38fd1498Szrj 
83*38fd1498Szrj #ifdef __x86_64__
84*38fd1498Szrj extern __inline unsigned char __attribute__((__gnu_inline__, __always_inline__, __artificial__))
__lwpins64(unsigned long long __data2,unsigned int __data1,unsigned int __flags)85*38fd1498Szrj __lwpins64 (unsigned long long __data2, unsigned int __data1,
86*38fd1498Szrj 	    unsigned int __flags)
87*38fd1498Szrj {
88*38fd1498Szrj   return __builtin_ia32_lwpins64 (__data2, __data1, __flags);
89*38fd1498Szrj }
90*38fd1498Szrj #endif
91*38fd1498Szrj #else
92*38fd1498Szrj #define __lwpins32(D2, D1, F) \
93*38fd1498Szrj   (__builtin_ia32_lwpins32 ((unsigned int) (D2), (unsigned int) (D1), \
94*38fd1498Szrj 			    (unsigned int) (F)))
95*38fd1498Szrj #ifdef __x86_64__
96*38fd1498Szrj #define __lwpins64(D2, D1, F) \
97*38fd1498Szrj   (__builtin_ia32_lwpins64 ((unsigned long long) (D2), (unsigned int) (D1), \
98*38fd1498Szrj 			    (unsigned int) (F)))
99*38fd1498Szrj #endif
100*38fd1498Szrj #endif
101*38fd1498Szrj 
102*38fd1498Szrj #ifdef __DISABLE_LWP__
103*38fd1498Szrj #undef __DISABLE_LWP__
104*38fd1498Szrj #pragma GCC pop_options
105*38fd1498Szrj #endif /* __DISABLE_LWP__ */
106*38fd1498Szrj 
107*38fd1498Szrj #endif /* _LWPINTRIN_H_INCLUDED */
108